GB2479067B - Antialiasing using multiple display heads of a graphics processor - Google Patents

Antialiasing using multiple display heads of a graphics processor

Info

Publication number
GB2479067B
GB2479067B GB1106653.7A GB201106653A GB2479067B GB 2479067 B GB2479067 B GB 2479067B GB 201106653 A GB201106653 A GB 201106653A GB 2479067 B GB2479067 B GB 2479067B
Authority
GB
United Kingdom
Prior art keywords
pixel
display
graphics processor
pixels
master
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
GB1106653.7A
Other versions
GB201106653D0 (en
GB2479067A (en
Inventor
Duncan A Riach
Brijesh Tripathi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nvidia Corp
Original Assignee
Nvidia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/383,048 external-priority patent/US8130227B2/en
Priority claimed from US11/680,554 external-priority patent/US20090085928A1/en
Application filed by Nvidia Corp filed Critical Nvidia Corp
Priority claimed from GB0709101A external-priority patent/GB2438087B/en
Publication of GB201106653D0 publication Critical patent/GB201106653D0/en
Publication of GB2479067A publication Critical patent/GB2479067A/en
Application granted granted Critical
Publication of GB2479067B publication Critical patent/GB2479067B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00General purpose image data processing
    • G06T1/20Processor architectures; Processor configuration, e.g. pipelining
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/003D [Three Dimensional] image rendering
    • G06T15/005General purpose rendering architectures
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/003D [Three Dimensional] image rendering
    • G06T15/50Lighting effects
    • G06T15/503Blending, e.g. for anti-aliasing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/395Arrangements specially adapted for transferring the contents of the bit-mapped memory to the screen
    • G09G5/397Arrangements specially adapted for transferring the contents of two or more bit-mapped memories to the screen simultaneously, e.g. for mixing or overlay
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/12Overlay of images, i.e. displayed pixel being the result of switching between the corresponding input pixels

Abstract

Multiple display heads of a single graphics processor are exploited to perform antialiasing and other processing tasks. In one embodiment, two display heads of the same graphics processor are coupled to each other in a master/slave configuration via a pixel transfer path. The "master" display head receives pixels from the "slave" display head in addition to its own pixels, and pixel selection logic in the master display head can blend the two pixels or select either one to the exclusion of the other. If the two pixels correspond to different sampling locations in the same display pixel, the blended pixel is an antialiased pixel.
GB1106653.7A 2006-05-12 2007-05-11 Antialiasing using multiple display heads of a graphics processor Active GB2479067B (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US74715406P 2006-05-12 2006-05-12
US11/383,048 US8130227B2 (en) 2006-05-12 2006-05-12 Distributed antialiasing in a multiprocessor graphics system
US11/680,554 US20090085928A1 (en) 2006-05-12 2007-02-28 Antialiasing using multiple display heads of a graphics processor
GB0709101A GB2438087B (en) 2006-05-12 2007-05-11 Antialiasing using multiple display heads of a graphics processor

Publications (3)

Publication Number Publication Date
GB201106653D0 GB201106653D0 (en) 2011-06-01
GB2479067A GB2479067A (en) 2011-09-28
GB2479067B true GB2479067B (en) 2012-10-03

Family

ID=44558217

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1106653.7A Active GB2479067B (en) 2006-05-12 2007-05-11 Antialiasing using multiple display heads of a graphics processor

Country Status (1)

Country Link
GB (1) GB2479067B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1883901A2 (en) * 2005-05-27 2008-02-06 ATI Technologies Inc. Antialiasing system and method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1883901A2 (en) * 2005-05-27 2008-02-06 ATI Technologies Inc. Antialiasing system and method

Also Published As

Publication number Publication date
GB201106653D0 (en) 2011-06-01
GB2479067A (en) 2011-09-28

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