GB2471308A

GB2471308A - Low voltage radio frequency power amplifier with modulation input

Info

Publication number: GB2471308A
Application number: GB0910953A
Authority: GB
Inventors: Mark Bolt; Peter James Topham; Joseph Chan; Terence Kwok; John Mather
Original assignee: RADIOSIS Ltd
Current assignee: RADIOSIS Ltd
Priority date: 2009-06-24
Filing date: 2009-06-24
Publication date: 2010-12-29
Also published as: GB0910953D0

Abstract

A radio frequency power amplifier (RFPA) accepts a carrier wave voltage input (105) to drive switches (102) at radio frequency. The RFPA circuit also accepts a modulation current input (104) connected to a transimpedance circuit (103) which provides a control voltage (112) to a transconductance circuit (101) with switched, complementary current outputs (113 and 114). The current outputs of the transconductance circuit are combined in centre-tapped transformer 100, whose secondary winding is connected to RF output (115). The transfer characteristics of the transimpedance and transconductance circuits are complementary, giving a linear relationship between the peak output current of the transconductance circuit and the input current of the transimpedance circuit. The use of a current mode circuit driving a transformer allows operation from a low voltage supply. The present RFPA may use the same supply as is used to run other digital circuits, avoiding power loss in a regulator or the need for a high bandwidth regulator to track the modulating signal.

Description

A low voltage radio frequency power amplifier with modulation.

This invention relates to a radio frequency power amplifier which can be modulated and can be integrated with digital processing circuits.

With ever cheaper, faster digital circuits available, a lot of wireless communications applications use digital signal processing but these usually operate at a lower voltage than the power amplifier used to boost the signal before transmission. To overcome this limitation, the present invention is for a novel circuit which gives the option for the power amplifier to use the same supply as the digital circuits. An existing solution could be to use a voltage regulator to drop the supply to run the digital circuits, but this wastes power and uses additional components, so adding to cost and complexity.

The conventional technique of generating a modulated waveform in a power amplifier is the envelope elimination and restoration method. Here, the required transmission signal is decomposed to a carrier signal and an envelope modulation signal. The carrier signal is amplified to the amplifier rail voltage by conventional means and a variable output voltage regulator connected between the amplifier supply and the raw supply rail tracks the modulation signal and modulates the peak carrier voltage to reconstruct the wanted transmitter signal. The disadvantage with this approach is that it needs an additional high bandwidth regulator to generate the modulating supply.

Another approach, since power is proportional to current, is the proposal from Stanford University in the paper "A Digitally Modulated Polar CMOS PA with 20MHz Signal Bandwidth" presented at ISSCC 2007 to digitally control numerous concurrent, carrier modulated current sources connected to the primary of the output transformer. The problem here is that because of the digital control, as well as the wanted signal, there is a risk of noise and spurious signals on the output.

To overcome these problems the present invention is for a radio frequency power amplifier which includes continuously variable (analogue) modulation as part of the amplifier and uses a novel current mode circuit configuration driving an output transformer allowing operation from a low voltage supply.

By incorporating the amplitude modulator as part of the circuit no external modulating components are needed. As the modulation is continuously variable, rather than switched, the output noise and spurious signals are greatly reduced. By using a current mode output and an output transformer the modulated amplifier can be made to operate off the same supply used for any digital processing circuits. This eliminates the need for additional power supply components.

Preferably, the invention can be fabricated using the CMOS semiconductor process which is commonly used for the digital processing circuits in wireless applications. The proposed circuits can take advantage of the different voltage rating devices available on many CMOS processes, giving the flexibility to trade off supply voltage against speed or power output.

The invention will now be described by way of non-limitation examples referring to the accompanying drawings: Figure 1 shows the architecture of the low voltage power amplifier; Figure 2 is the basic embodiment of the low voltage switching amplifier implemented with NMOS transistors with modulating transistors concurrently acting as output overvoltage protection devices; Figure 3 is an alternative embodiment of the low voltage power amplifier with enhanced modulation drive; Figure 4 is an alternative embodiment of the low voltage power amplifier with separate protection devices and modulating transistors; Figure 5 is an alternative embodiment of the low voltage power amplifier with separate modulation and protection devices and better matching of output and reference currents.

The basic architecture of the low voltage power amplifier is shown in Figure 1. This consists of the following elements: (i) a modulating transconductor (voltage to current converter) consisting of two separate but identical transconductors with a common voltage input control (101); (ii) a common transimpedance (current to voltage converter) bias with a current input and voltage output which supplies the common voltage input control of the modulating transconductor (103); (iii) a current switch (102) referenced to a second supply voltage (107); and (iv) a centre-tapped transformer (100) which collects the differential output of the common modulating transconductor in its primary windings and outputs a ground referenced combined current from its secondary windings. The transformer turns ratio between primary and secondary allows further flexibility in setting the amplifier output impedance for best amplifier efficiency.

The common modulating transconductor (101) is stacked on top of the switching elements (102) referenced to the second supply (107) and on top of this, its output current nodes are connected to the primary windings of a centre tapped transformer (100). The centre tap (116) of the transformer primary winding is connected to a first supply voltage (106) as in the example diagram shown in Figure 1.

In operation, the device is driven by two input signals, the carrier signal (105) and the modulating signal (104). These signals have to be supplied in voltage and current form respectively. The output signal from the device is a current whose characteristics are a superposition of the modulating signal as an envelope on the carrier signal. This is achieved in the following manner.

The switching element has two switching controls (108) and (109) which controls whether current entering ports (110) or (111) are connected to ground. The carrier signal and its inverse is supplied as a voltage to the control inputs (108) and (109) of the switching element. When input (108) is active, input (109) is inactive and vice-versa. The input controls (108) and (109) are operated in a complementary fashion and terminates the first current entering port (110) from the modulating transconductor to the second supply whilst simultaneously open circuiting the second current entering port (111) or open circuiting the first current in port (110) whilst connecting the second current in port (111) in an alternating fashion. In this way, current flowing through each arm of the common modulating transconductor is interrupted at the rate of the carrier voltage signal.

Simultaneously, the modulating signal is supplied to the transimpedance bias as a current.

Through the block, this signal is converted to a voltage and supplied to the common modulating input (112). Through the operation of the transconductors in the common modulating transconductor block, the modulating voltage input at (112) is converted to a corresponding current at the output current ports (113) and (114). However, with the action of the complementary switching elements, both currents are interrupted at the carrier rate and modified to give two complementary current signals, each active and carrying a current proportional to the modulating voltage when the other current is inactive and zero. The result is that two complementary currents with magnitudes either at zero or at the modulation amplitude are produced at the output of the common modulating transconductor.

If the transimpedance transformation in the transimpedance bias generator and the transconductance transformation in the common modulating transconductor are both monotonic but with the relationship that the transimpedance transformation is the unnormalised complement of the transconductance transformation, then, a signal undergoing a successive transimpedance transformation followed by a transconductance transformation will be left unchanged in form but changed in scale at the common modulating transconductor outputs. In this way, the transimpedance and transconductance transformations need not necessarily be linear to effect a linear transformation between the modulating signal and the output signal.

The centre tapped transformer receiving the output currents at its primary combines the two complementary single ended current signals to produce a differential signal of the carrier current with envelope modulation on both the peak and trough of the current waveform at the output of the secondary windings (115).

A preferred realization of the architectural blocks of the low voltage power amplifier is shown in Figure 2. All transistors used are of the NMOS type. Inputs (206) and (207) to ground referenced transistors 200 and 201, when driven to supply (209) and ground (208) potential by anti-phase signals, implement the complementary switching elements. Transistors 202 and 203 (stacked on top of transistors 200 and 201) share a commoned gate connection and implement the common modulating transconductors. The transistor stack of 204 and 205, with transistor 205 gate tied to supply, mimic the bias of transistors 202,200 or 203,201 when inputs (206) or (207) are connected to supply. Transistor 204 with gate drain connection together with transistor 205 form a transimpedance converter with approximately complementary characteristics to the transconductance of the cascode stack formed by transistors 202,200 and transistors 203,201. All transistors may be of the same type but advantageously, transistors 204, 202 & 203 may be of a higher voltage tolerant type available on some monolithic processes. These transistors are often used for input and output circuitry because they can withstand higher voltage stress across their terminals.

The reason why transistors 202 and 203 should preferably be high voltage types is so they can tolerate larger voltages on their output terminals. With 50% duty cycle on the carrier signal; negligible series switch resistance in transistors 200, 201 when conducting and the centre tap of the transformer connected to amplifier supply, the nodal voltages at (113) or (114) may reach the potential of double the voltage on the centre tapped supply. Therefore, by using the higher voltage tolerance devices for transistors 202 & 203, these transistors can both simultaneously perform modulation and protection of the switching transistors from the voltage swings at the transformer primary. Transistor 204 has to be of the same type to mimic the output cascode stacks so that the transimpedance function complements the transconductance transformation again. By stacking the modulation device above the switching device, this enables the fastest switching but lowest voltage stress tolerant transistor available in the silicon process to be used as the switching device.

An alternative realization is shown in Figure 3 where a Wilson current mirror configuration is used to assist the modulating current to drive the output cascode transistor stack of 302,300 and 303,301. Here, transistor 306 and resistor 307 acts as a unity voltage gain buffer amplifier which changes the driving resistance presented to the input capacitance of the common modulating transconductor.

If the input capacitance presented by gate input of transistor 306 to the output resistance of the transimpedance bias is smaller than that presented by the common modulating transconductor input and the effective output resistance of the buffer formed by transistor 306 and resistor 307 is smaller than the output resistance of the unbuffered transimpedance bias, then, more current becomes available to charge and discharge the input and output capacitances of the buffer, allowing both nodes to charge at a faster rate than the single node of the common modulating transconductor input driven directly by the transimpedance bias. This allows the common modulating transconductor input to be modulated at a higher rate than the previous circuit of Figure 2. However, the downside is that the voltage compliance of the new cell is at least a transistor threshold voltage higher than the previous circuit and the cell has a higher power dissipation due to the standing current through transistor 306 and resistor 307.

The circuit of Figure 4 separates the function of protection and modulation previously performed by transistors 302 and 303 of Figure 3 by adding transistors 407,408 to perform the voltage protection, which are biased by transistors 409,410 and a constant current source (411). Transistors 407,408 act as a cascode to reduce the output conductance at the transformer primary pins which improves the efficiency and linearity of the amplifier. Now transistors 400,401 could also be standard devices allowing much faster modulation to take place and transistors 409, 408 & 407 are preferably the high voltage type to tolerate the voltage swing at the transformer primary terminals.

Finally the circuit of Figure 5 addresses both the voltage compliance and current copying accuracy issue of the previous circuits by biasing transistors 509,510 from transistors 506,507 which are driven by a second modulated signal current (511) which is a scaled version of the first signal current (104). As with the circuit of Figure 4, preferably transistors 507, 508, 509 and 510 are the high voltage type devices so they can tolerate a larger voltage swing at the transformer primary terminals. In this case, the circuit voltage compliance is minimized to the threshold voltage of a high voltage device plus twice the saturation voltage of the standard voltage type device.

Claims

Claims A circuit comprising: a voltage supply node; a voltage return node; a two port transformer having a centre tap on its primary windings, the centre tap connected to the voltage supply node, the secondary connected to the RF output port; a common modulating transconductor having two independent current branches with two input current nodes; two corresponding current output nodes and a common voltage control input; a first switch electrically disposed between one of the current input nodes of the common modulating transconductor and the voltage return node forms a current branch from the voltage supply node to the voltage return node through one branch of the primary windings of the centre tapped transformer and through the corresponding current branch of the common modulating transconductor when the switch is activated; a second switch electrically disposed between the other current input node of the common modulating transconductor and the voltage return node forms a second current branch from the voltage supply node to the voltage return node through the other branch of the primary windings of the centre tapped transformer and through the other corresponding current branch of the common modulating transconductor when this switch is activated; complementary carrier signal inputs connect respectively to the first and second switches and initiate either one or the other current branches of the circuit in an alternating manner; a transimpedance bias with a current input and a voltage output, the voltage output couples to the common voltage control input of the common modulating transconductor; a modulating current is supplied to the current input of the transimpedance bias which produces a corresponding output voltage; the transimpedance bias circuit has an output voltage and input current which is complementary, yet monotonic to the relationship of the input voltage and peak output current of the modulating transconductor, so that the peak output current of the modulating transconductor has a linear scaled relationship to the input current of the transimpedance bias circuit.
2. A circuit according to claim 1 wherein the switch is at least one of a transistor, preferably an n-type MOS transistor and an element of an integrated circuit; the common modulating transconductor is also constructed preferably with n-type MOS transistors as an element of the same integrated circuit; the transimpedance bias is also constructed preferably with n-type MOS transistors as an element of the same integrated circuit; the centre tapped transformer is integrated on the same die as the power amplifier or is at least one of a discrete component and integrated on a second semiconductor die or a separate dielectric substrate; the integrated circuit is at least one of many semiconductor dice produced by a semiconductor process on a semiconductor wafer substrate, preferably silicon.
3. A circuit according to claim 2 wherein the common modulating transconductor comprises a single device for each of the two alternating current paths with a commoned bias gate control which modulates the peak current at the primary of the centre tapped transformer.
4. A circuit according to claim 3 where preferably, the output of the transimpedance bias is buffered by a unity gain amplifier before being received by the common modulating transconductor; the unity gain amplifier having a lower output impedance and higher drive current capability than the transimpedance bias.
5. A circuit according to claim 3 where preferably, the single device for each of the two alternating current paths is an n-type transistor which has a greater breakdown voltage than the current switching transistors; the transistor at the voltage output of the transimpedance bias is modified to also feature such a higher voltage breakdown device.
6. A circuit according to claim 2 wherein the common modulating transconductor comprises a stack of two devices for each of the two alternating current paths. Both the upper devices are commoned together at their gate controls as are the lower devices but the upper device gate and the tower device gates are not commoned together; the upper devices are connected to a constant voltage bias; the lower device, connected to the voltage output of the transimpedance bias modulates the peak current at the primary of the centre tapped transformer in accordance with the input modulation current in the transimpedance bias.
7. A circuit according to claim 6 where preferably, the upper device for each of the two alternating current paths is an n-type transistor which has a greater breakdown voltage than the current switching transistors; the constant bias chain biasing the gates of the upper devices features such a higher voltage breakdown device.
8. A circuit according to claim 2 wherein the common modulating transconductor comprises a stack of two devices for each of the two alternating current paths. Both the upper devices are commoned together at their gate controls as are the lower devices but the upper device gate and the lower device gates are not commoned together; the upper device are connected to a modulation current dependent voltage bias; the lower device, connected to the voltage output of the transimpedance bias modulates the peak current at the primary of the centre tapped transformer in accordance with the input modulation current in the transimpedance bias; the associated transimpedance bias mimics the common modulating transconductor operating condition by deriving its output voltage with an extra stacked device in series to maintain the current mirroring between the modulation current and the peak output current in the primary of the centre tapped transformer.
9. A circuit according to claim 8 where preferably, the upper device for each of the two alternating current paths is an n-type transistor which has a greater breakdown voltage than the current switching transistors; the associated transimpedance bias mimics the common modulating transconductor operating condition by deriving its output voltage with an extra greater breakdown voltage tolerant stacked device in series to maintain the current mirroring between the modulation current and the peak output current in the primary of the centre tapped transformer.
10. A circuit substantially as described with reference to and illustrated by the accompanying drawings.