GB2460272A

GB2460272A - Compensating for leakage inductance in a switch mode power supply

Info

Publication number: GB2460272A
Application number: GB0809410A
Authority: GB
Inventors: Johan Piper; Dave Coulson
Original assignee: Cambridge Semiconductor Ltd
Current assignee: Cambridge Semiconductor Ltd
Priority date: 2008-05-23
Filing date: 2008-05-23
Publication date: 2009-11-25
Anticipated expiration: 2028-05-23
Also published as: GB0809410D0; GB2460272B

Abstract

A switch mode power supply (SMPS) output current regulation system comprises a snubber circuit 17,18,19 providing a path for leakage inductance current to flow in the primary winding after a power switching device 15 has switched off; a controller 20 that senses currents in a transformer 11 of the SMPS and drives the power switching device to regulate the output current; and a system to compensate the current sense signal for the leakage inductance current. The amount of compensation can be determined from an initial value of leakage current when the switch is turned off and estimating the duration of the leakage current discharge time. A capacitor 19 of the snubber circuit can store a charge representing an average value of leakage current that is compensated by subtraction from the current sense signal, the capacitor being reset by a switch 22 while the leakage current discharges. The leakage discharge time may be estimated using a circuit (fig 4) that integrates the primary voltage VA at two rates depending on the drive pulse width. The circuit enables constant voltage and accurate current limiting operation (fig 10) using primary-side sensing.

Description

Switch Mode Power Supply Systems

FIELD OF THE INVENTION

This invention relates to methods and apparatus for regulating the output current in a switch mode power supply (SMPS), and in particular to improving the accuracy of primary-side sensing for such regulation.

BACKGROUND TO THE iNVENTION

Many switched-mode power supplies (SMPS) applications require the output current to be either limited to, or maintained at a particular value. Generally SMPS applications achieve this by including some form of output current sensing (located on the secondary side of the converter) and communicating this information back to the power converter controller (located on the primary side), providing an accurate method but incurring the cost of additional secondary side components. Where an output current limiter is not required to be particularly accurate, a crude current limit may be achieved by monitoring and limiting the primary side switch current to a particular value. Recent advances in design have achieved a more accurate output limit by sensing and integrating the current through the primary switch and correlating the time constant of the integrator to the switching period, thereby estimating the output current. However, the accuracy of the output current sensing is dependent upon the efficiency of power conversion, the switching time of the switch, and other factors.

We have previously described primary-side output current sensing/regulation techniques in GB 2,439,997 (US 7/342,812) and in GB 2,439,998 (US 11/490,877) hereby incorporated by reference. Further background prior art can be found in: U55757625A, U55457620A, US5841643A, US6867986B, US6977824B1, W02001018946A1, US20030080723A1, JP58012029A, US5138543A, US5717578A, US5757625A, US20030080723A1, US20060077697A1, US7O 1 6204B2, US20060056204A1, US20020071301A1, EP744818B1, US5995386A, US565721 1A.

One problem with the primary-side sensing tecirniques that we have previously described is that, due to the primary side sensing, energy losses in the leakage inductance of the transformer can make the estimated output current incorrect. There is therefore a need for improved culTent regulation techniques.

SUMMARY OF THE INVENTION

According to a first aspect of the invention there is therefore provided a switch mode power supply (SMPS) output current regulation system, said switch mode power supply including a transformer with at least a primary winding coupled to an input of the switch mode power supply and a secondary winding coupled to an output of the switch mode power supply and having a power switching device to switch power on and off to said primary winding of said transformer responsive to a drive signal, the output current regulation system comprising: a culTent sense input to receive a current sense signal sensing currents in said transformer; a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said switch mode power supply to flow in said primary winding after said power switching device has switched off power to said primary winding; a controller, coupled to said current sense input and having a drive output to provide said drive signal to said power switching device to control switching of said device to regulate said output current; and a system to compensate said current sense signal for said leakage inductance current such that said regulation of said output current compensates for said leakage inductance in said switch mode power supply.

In embodiments the sensed culTents comprise a combination of charging current in the primary winding of the transformer and current arising from leakage inductance in the power supply, more particularly the transformer. Thus whilst one current is sensed, it includes a component due to leakage inductance. Broadly speaking, by compensating for the leakage inductance losses when sensing the output current of an SMPS from the primary side the estimated output current model can be corrected for the losses in the leakage inductance. In some preferred embodiments this compensation is performed by effectively measuring the snubber current by re-directing the snubber current through the current sensing device used to sense the current in the primary winding, typically a resistor. In effect, therefore, the current in the snubber is measured and its effect is deducted from the sensed output current.

In embodiments a snubber current flows when the primary side switching device is turned off, the snubber current decreasing linearly from a peak defined by the peak primary winding current at the instant of switch-off, down to zero. In embodiments, therefore, a system is provided to subtract the area of this triangle from the rest of the primary side current sense waveform. Preferably, therefore, the controller takes an average of the current sense signal over a long period, preferably greater than one or more switching cycles of the SMPS.

In embodiments the snubber circuit comprises a coupled resistor and capacitor and the snubber circuit is coupled to the primary side current sensing device, typically a resistor, via the capacitor. Such an arrangement would have no average DC component over a cycle and therefore in embodiments the capacitor is effectively shorted out or blanked during part of the cycle, for example during the triangular waveform part of the snubber current flow. This effectively leaves a negative part of the snubber current, more particularly a steady negative current value which, averaged over a cycle, balances the area of the triangular portion of the snubber current waveform. Therefore by adding in this residual negative current portion the sensed current is effectively compensated for leakage inductance current. In effect the capacitor is recharging at times other than the triangular waveform portion of the snubber current. The snubber capacitor may be reset or blanked during the triangular portion of the snubber current waveform by colmecting one plate of the capacitor to a fixed voltage, for example ground. However this may involve shorting a culTent sense resistor which already has a low resistance and thus in other embodiments an equivalent approach may be adopted. For example a chopper stabilised amplifier/buffer may be used to buffer the current sense signal and the input of this amplifier may be reset to zero to blank the triangular portion of the snubber culTent waveform and at the same time reset any offsets within the amplifier.

The above-described tecimique effectively subtracts an average value of the leakage inductance culTent over a period when this current is flowing. However alternative techniques may also be employed. For example rather than re-arranging the snubber circuit to add the leakage current onto a common primary side current sensor the leakage current may be mirrored onto the culTent sensor using a current mirror.

Alternatively the leakage current may be estimated from the transformer voltage waveform, more particularly a primary side voltage waveform reflecting the secondary winding voltage and derived, for example, from the primary winding or an auxiliary winding, in combination with the leakage discharge time and an estimate of the leakage inductance value. The relationship between the transformer voltage waveform, the leakage inductance value and the leakage discharge time is given by the inductor equation V L dI/dt, and thus integrating over the leakage discharge time estimates the leakage current.

Here the leakage discharge time refers to the time from the moment that the primary switch is opened until the current in the primary side of the transformer has reached substantially zero; the charge time refers to the time that the primary side switch is conducting; the discharge time refers to the time that the secondary side switch or rectifier is conducting; the leakage current refers to the current which continues to flow through the primary side of the transformer after the primary side switch has opened; and, broadly speaking, the snubber circuit comprises a circuit which provides a path for the transformer current to flow in the primary side when the primary switch is open.

The skilled person will also understand that there are other techniques which may be employed to determine the average leakage current during the leakage discharge time.

For example the peak primary culTent may be measured or estimated and used to estimate the average leakage current using the equation for the area of a triangle, half base x height, where the base is the leakage discharge time.

In a simple embodiment a fixed time may be used as an estimate of the leakage discharge time, for example based upon a value previously measured for the design.

However, as noted later, some techniques are more sensitive to an error in the leakage discharge time than others. Thus the leakage discharge time may be estimated based on a proportion of the charge time or discharge time of the SMPS and/or by comparing the primary current or the leakage current to a current threshold. For example a comparator may be employed to determine when the triangular snubber current waveform has fallen to substantially zero or (preferably, to reduce noise) to a threshold just above zero, to detect the end of the triangular portion of this waveform.

In another approach the leakage discharge time may be estimated from the peak primary current, observing that the currents in the power supply are in proportion, based on the power delivered through the transformer. Then again the inductor equation V L dI/dt may be employed to estimate the leakage discharge time knowing the peak primary current and using an estimate of the leakage inductance. The primary inductance will generally be known; the leakage inductance is typically of order equal to or less than 5% of the total primary magnetising inductance (say in the range 1% -10%), and thus the quantities in this equation needed to estimate the leakage discharge time are known.

One preferred method to determine the leakage discharge time involves estimating the flux in the leakage inductance by asymmetric integration of a voltage waveform reflecting the secondary winding voltage, for example a primary or auxiliary winding voltage. The asymmetric integrating integrates with different up and down slopes, in embodiments integrating a voltage waveform reflecting the secondary winding voltage in a first direction, say upwards, with a first slope, during a period for which the primary side switch is on. The integrator then integrates in a second, opposite direction, for example down, with a second, steeper slope until the starting value is reached once again. The two slopes have a steepness in a ratio which is in proportion to the ratio of the leakage inductance to the overall inductance, for example a 20:1 ratio for a 5% (or less) leakage inductance. In practice the leakage inductance may be over-estimated and a ratio of 3:1 or 4:1 may be employed to provide a wide design tolerance, for example to take account of potentially very poor transformers. Broadly speaking this technique is based on the observation that the duration of the integration upwards whilst the primary switch is on is proportional to the duration of the integration back down, albeit both these times varying dependent on the input power and so forth. The skilled person will appreciate that if the sensed voltage is negative when the primary switch is on, integration can nonetheless be in a positive direction by applying this negative voltage to an inverting input of the integrator.

As noted above, the leakage discharge time may be employed to estimate an area of the triangular portion of the snubber current waveform, which can then be subtracted from a value of the current sense signal which is averaged over a cycle time of the SMPS. For example the leakage current may be integrated over the leakage discharge time to determine in effect, an area of this triangle which should be subtracted from the current sense signal to compensate for leakage inductance losses. However, also as noted above, a simple estimate of the leakage discharge time can be made assuming that this is one tenth -to one twentieth of the time take to discharge the whole transformer. Some subtraction I compensation techniques are more sensitive to the leakage discharge time than others. For example the technique mentioned above in which the triangular portion of the leakage inductance current is blanked and in which a substantially negative constant current is applied via a capacitor to the culTent sense resistor for the reminder of the cycle, is a technique which is relatively insensitive to inaccurate determination of the leakage discharge time. This is because a relatively small negative current value is added to the current sense resistor over a relatively long period of time (i.e. all the switching cycle except for the brief interval when the snubber current flows) and hence the estimate of the leakage discharge time can be extended substantially beyond its typical value without significantly affecting the colTection to the current sense signal (this colTection is small in any case). This allows a design to be tolerant to relatively substantial variations in leakage inductance. By contrast a method which, say, estimates the average height of the snubber current waveform and then multiplies this by the leakage discharge time to determine the area under the triangular portion of the waveform prior to subtracting this from the current sense signal is relatively more sensitive to variations in the leakage discharge time estimate.

Still other approaches will occur to those skilled in the art. For example, an estimate of the leakage discharge time could be determined from the two sharp transitions in the reflected secondary winding voltage, one when the primary side switch is opened, and a second at the point when the snubber current falls to zero when the reflected secondary winding voltage drops from a relatively high snubber voltage level towards the output voltage of the power supply.

In another approach in a snubber circuit comprising a rectifier coupled to the primary winding and then to a capacitor and resistor in parallel, the average snubber current through the diode is substantially equal to the average current through the resistor (since the capacitor has a zero average or DC current flow through it). Thus by sensing the current through such a resistor an average value of the leakage current over a switching cycle may be determined.

The skilled person will understand that there are yet further techniques employing a combination of the leakage culTent or average leakage current, leakage discharge time, and switching cycle time which may be employed to calculate the average leakage current during a complete switching cycle.

In some preferred embodiments the controller of the switch mode power supply has a voltage sense input to receive a voltage sense signal from the primary or an auxiliary winding of the transformer. The controller includes a signal averager to average the corrected current sense signal over at least a period when the drive signal is controlling the power switching device to apply power to the primary winding, optionally over one or more complete cycles of the switch mode power supply. A timing signal generator may also be included to generate from the voltage sensed from the primary/auxiliary winding a timing signal indicating a duration of a period during which the secondary winding is providing power to the switch mode power supply output, in a simple example a time from completion of the primary side drive to a first zero crossing of the reflected secondary winding voltage. Alternatively more sophisticated techniques may be employed to identify a knee in the primary/auxiliary winding voltage for a more accurate estimation of the secondary-side discharge time, for example by retreating one quarter of a ringing cycle from the first zero crossing, or by other techniques (see, for example, the applicant's co-pending UK patent application filed on the same day as this application entitled "Switch Mode Power Supply Systems", hereby incorporated by reference in its entirety). The controller may also include a multiplier coupled to an output of the signal averager and to an output of the timing signal generator to scale the averaged, corrected current sense signal by the secondary-side discharge time, to thereby provide a signal (optionally via a further signal averager) for estimating/regulating the output current of the power supply. Alternatively the corrected current sense signal averaged over a complete cycle of the power supply can be scaled by the secondary-side discharge time divided by the primary side charge time and, optionally, the turns ratio of the transformer, to provide a correct estimate of the average output current over one or more cycles of the power supply.

The invention also provides a switch mode power supply including a switch mode power supply current regulation system as described above.

In a related aspect the invention provides method of output current regulation in a switch mode power supply (SMPS), said switch mode power supply including a transformer with at least a primary winding coupled to an input of the switch mode power supply and a secondary winding coupled to an output of the switch mode power supply and having a power switching device to switch power on and off to said primary winding of said transformer responsive to a drive signal, the switch mode power supply further comprising a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said switch mode power supply to flow in said primary winding after said power switching device has switched off power to said primary winding, the method comprising: sensing currents in said transformer; and regulating an output current of said switch mode power supply responsive to said sensed currents; and wherein the method further comprises: compensating said sensed currents for said leakage inductance current when regulating said switch mode power supply output current.

In some preferred embodiments the method further comprises averaging the compensated sensed charging current over a period when current is flowing in the primary winding, for example when the primary side switch drive is on, determining an estimate of a discharge time of current through the secondary winding of the transformer, and scaling the compensated sensed charging current using the discharge time to estimate the SMPS output current.

The invention still further provides an output current regulation module for a switch mode power supply (SMPS), said SMPS including a transformer with at least a primary winding coupled to an input of the SMPS and a secondary winding coupled to an output of the SMP S and having a power switching device to switch power on and off to said primary winding of said transformer responsive to a drive signal, the SMPS further comprising a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said SMPS to flow in said primary winding, after said power switching device has switched off power to said primary winding the output current regulation module comprising: means for sensing currents in said transformer; means for regulating an output current of said SMPS responsive to said sensed currents; and means for compensating said sensed currents for said leakage inductance current when regulating said SMPS output current.

Embodiments of the above-described techniques may be employed with a wide variety of SMPS topologies including, but not limited to, a flyback converter and a direct-coupled boost converter. The transformer may comprise a conventional transformer or an auto-transformer, and the secondary side voltage may be sensed either on the primary winding (using a potential divider if the voltage is high) or using an auxiliary winding of the transformer.

BRIEF DESCRIPTION OF THE DRAWINGS

These and other aspects of the invention will now be further described, by way of example only, with reference to the accompanying figures in which: Figures 1 a to 1 c show, respectively, an example of a switch mode power supply (SMPS) including a modified snubber circuit and incorporating an output current regulation system according to an embodiment of the invention, an alternative current sensing arrangement for the SMPS of Figure 1 a, and an alternative voltage sensing arrangement for the SMPS of Figure la; Figure 2 shows waveforms illustrating the operation of the SMPS of Figure la; Figure 3 shows an example of a snubber circuit according to the prior art; Figure 4 shows an example of a blanking circuit for use with the timing SMPS of Figure 1 a; Figure 5 shows waveforms illustrating the operation of the blanking circuit of Figure 4; Figure 6 shows current waveforms for the SMPS of Figure 1 a, illustrating a theory of operation of an output current regulation system according to an embodiment of the invention; Figure 7 shows an example implementation of a timing signal generator for the SMPS controller of Figure 1 a; Figures 8a and 8b show alternative example implementations of a current model for the SMPS controller of Figure la; Figures 9a and 9b show alternative example implementations of a control and driver module for the SMPS controller of Figure 1 a; and Figure 10 shows a plot of output voltage (volts) against output current (amps) for a constructed example of the SMPS of Figure 1 a illustrating accurate output current regulation of the SMPS.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS

Referring to Figure 1 a this shows a simplified block diagram of a single-switch flyback switch mode power supply. A DC voltage source 10 is connected to the primary winding of a transformer 11 in series with a primary side switch 15 and a current sensor 16, here a current sensing resistor. The primary current IP produces a voltage across resistor 16 generating a primary winding current-sense (CS) signal used to control the power supply. The inductance 23 represents a lumped model of the leakage inductance of the transformer 11.

A secondary winding of the transformer 11 is connected to an output rectifier 12 in series with an output capacitor 13. A load 14 is connected across the output capacitor 13. An auxiliary winding on the transformer 11 is connected between ground (the negative terminal of DC supply 10) and a controller 20 generating a voltage-sense signal (VA). The controller 20 uses the signals VA and CS to generate a DRIVE signal.

The DRIVE signal controls the primary side switch 15. The DRIVE signal is a PWM/PFM (pulse width modulationlpulse frequency modulation) signal generated in such a way that the output voltage and/or current is controlled. We describe some controller examples later.

In the illustrated embodiment the current sensor signal CS can be forced to zero by the action of switch 22 (however the actual implementation of switch 22 is not important as long as CS is forced to zero and, for example, chopper stabilisation may be employed, as mentioned above). In the illustrated embodiment switch 22 is controlled by a signal CSBLANK from a blanking block 21. In embodiments this blanking block uses VA and DRIVE to generate CSBLANK, as described in more detail below.

The switch mode power supply includes a snubber circuit. An example of a conventional snubber circuit is shown in Figure 3. This comprises a rectifier 17 in series with a capacitor 24 connected in parallel with a resistor 18. The average current through rectifier 17 may be sensed by sensing the average current through resistor 18 (for example, via the voltage across this resistor). Preferably, however, the snubber circuit is modified as shown in Figure 1 a.

In Figure 1 a a snubber composed of rectifier 17, resistor 18, and capacitor 19 has been introduced to limit and dampen the overshoot of primary side voltage VP. The rectifier 17 and the capacitor 19 are connected in series with resistor 16. The resistor 18 is connected between the voltage source 10 and common node of the rectifier 17 and the capacitor 19. In this way the AC part of the snubber current, ISN, is directed to the current sensor 16, this improving on the arrangement of Figure 3.

Figure lb shows one alternative way to sense the current (omitting capacitor 19 and switch 22, for clarity); no doubt many other variations will occur to the skilled person.

Figure 1 c shows one way to sense the voltage on the primary side of the transformer without employing an auxiliary winding, using a resistive divider (resistors 25a,b); again no doubt many variations will occur to the skilled person.

Referring next to Figure 2, this shows voltage and current waveforms for the switch mode power supply of Figure 1 a. The primary winding voltage and current are denoted by VP and IP respectively and the output voltage reflected onto the primary side by VOprim; the snubber voltage and current are denoted by VSN and ISN respectively; the current sense signal is denoted by Cs; the drive signal by DRIVE, and the culTent sense blanking signal is denoted by CSBLANK.

When the DRIVE goes high at time 30 the switch 15 is closed and current starts to flow through the transformers primary side (IP). Then DRIVE goes low at time 31 and the switch 15 opens. Now the voltage on the primary side (VP) immediately rises over the snubber voltage VSN and the rectifiers 17 and 12 start to conduct. The primary winding current IP is now free-wheeling through the snubber. The current IP decreases and at the same time the current on the secondary side, IS, increases. As soon as IP (and 15N) reaches zero, at time 32, the rectifier 17 stops conducting and the primary winding voltage VP collapses to the output voltage reflected to the primary side (VO1). At this point IS starts to decrease. When IS reaches zero, at time 33, the transformer starts to oscillate with its natural frequency since both the primary and the secondary side are effectively disconnected.

During the time when the rectifier 17 is conducting the current sensor 16 is shorted by the switch 22 under control of the signal CSBLANK. The afterwards resulting CS signal can therefore be approximated to the primary current minus the average snubber current ISN.

Blanking Circuit The exact blanking time is dependent on several factors, more particularly the drive pulse width, the input voltage, the snubber voltage and the leakage inductance. However by assuming that the ratios between the main inductance and the leakage inductance and the input voltage and the snubber voltage are fixed an asymmetric flux model can be used to generate the CSBLANK signal. Figure 4 shows a circuit to generate the CSBLANK signal using such a flux model. Figure 5 shows waveforms illustrating the operation of the circuit of the blanking circuit of Figure 4.

Referring to Figures 4 and 5, when DRIVE is high the transformer's main inductance 11 and leakage inductance 23 are in series with the voltage source 10. The voltage across these inductances is VI. When DRIVE goes low the transformer's main inductance 11 is effectively clamped at the secondary side to the reflected output voltage VOprini and the voltage across the leakage inductance is VIVSNVOprim. Therefore the ratio of the current derivatives in the leakage inductance before and after DRIVE goes low is 1 to K, where K can be expressed as K =11+ LMAJN VSN -VI-VOpriin LLEAK). VI Equation 1 The current in the leakage inductance is modelled by integrating VA with two integration rates. The integrator is reset by RESET by the action of a switch 44. When DRIVE is high the integrator is composed of resistor 41, capacitor 45 and amplifier 46.

When DRIVE is low the resistor 41 is replaced by the resistor 42. The ratio between the resistors is R41R42K where K is given by the above equation. Comparator 47 compares the output of the integrator, TFMA, to zero. The output of comparator 47, TFM, is gated by the AND gate 48 and the inverse of the RESET and DRIVE signals to produce CSBLANK. RESET is generated by block 43 which may be implemented by a small state-machine with a truth table as shown in Table 1 below:

STATE DRIVE TFM RESET NEXT STATE

o o x 1 0 o i ___ i I 1 0 X 0 2 1 1 0 1 2 X 0 0 0 2 X 1 0 2 Table 1: State machine truth table Output CulTent Model -Theory It is helpful to consider the theory underlying embodiments of the invention. The relation between the primary and the secondary winding of the transfonner 11 can be used for estimating the output current. Figure 6 shows plots of input current (IP), snubber current (SN), output culTent (OC), the CSBLANK waveform, and a current sense signal (CS). The subscripts TO, Ti and T denote averages over TO, Ti and T respectively.

The average of the current in the primary winding during TO (IP-ro) equals the average of the current in the secondary winding plus the snubber current during Ti (OCT1) times a factor. We have: nIPTO = fl-'-JIPdt=L JOCdt=OCTI TOT0 Tl1 Equation 2 where n is the turns-ratio between the secondary and primary winding (i.e. number of primary turns � number of secondary turns). The average output current for the whole (SMPS cycle) period T(OCT) is: OCT = --J OCdt = ---fOCdt = OCT1 TT TT1TI T T Equation 3 The average input current during TO is the difference between the current in the primary winding and the culTent in the snubber: TO JIPdt=?i-i$(IP_SN)dt=L(IPT_SNT)

TOTO TOTT TO

Equation 4 Now Equation 3 can be rearranged into: OCT =nT(IP7, -SAlT) Equation 5 The current sensing signal CS is the primary current minus the average of the snubber current plus the AC part of the snubber current. Hence if CS is blanked during the time when there is a positive snubber current then the output current can be estimated as: Ti OC =n-CST

TO

Equation 6

Controller examples

The controller may be any SMPS controller that uses an average value of the CS signal to approximate the output current (explicitly or implicitly) and then uses this information to control the output current and/or voltage.

In embodiments the controller 20 may comprise a timer block coupled to VA, an output current model block coupled to the timer block and to CS, an error control and driver block coupled to an output of the output current model to drive the primary side switch responsive to the current error to regulate the output current. Timer

Figure 7 shows one example implementation of a suitable timer. In this example the signal DRIVE is used directly for generating a charge-time signal TO, representing the time when a current is flowing through the primary side of the transformer 11, and the reflected secondary-side voltage sensed on the auxiliary (or primary) winding of transformer 11 is used to generate a discharge-time signal Tl, representing the time when a current is flowing through the secondary side of the transformer 11. It is preferable to employ primary-side sensing for the discharge time since it is desirable to avoid the cost of secondary-side sensing components. One way in which the discharge time may be determined uses an output voltage model (OVM) block 40 which has an output, OV, which approximates the output voltage of the SMPS and which can be compared with the sensed voltage signal VA by comparator 41 to generate signal Ti.

In general, an SMPS controller which incorporates primary-side sensing for output voltage regulation will already include some form of output voltage model. An alternative to the use of an output voltage model per se is simply to compare the sensed voltage waveform with a reference level in order to generate the discharge-time signal Ti. For improved current regulation better techniques for the generation of the important timing signals TO and Ti may be employed, as described in the Applicant's co-pending UK patent application filed on the same day as this application and entitled "Switch Mode Power Supply Systems", hereby incorporated by reference.

Current model block The equation for estimating the output current is: 0CM = n < >< <7J> where X5 denotes the low-pass filtered (average) signal X. Figures 8a and 8b show some example implementations of some suitable current model block for modelling the output current. As illustrated this generates an error function signal ERR representing the difference between an estimated or modelled output current (0CM) of the SMPS and a desired target output current (OCT). For details of example implementations reference may be made to the applicant's patent applications GB2439997 and GB2439998, hereby incorporated by reference.

A first example implementation of such an error function is shown in Figure 8a. The error function for the first implementation (for simplicity disregarding n) is: ERR= <CS ><Tl> OCT <TO> In this implementation, CS, TO, and Ti are fed through respective low-pass filters 112, 113 and 114, to generate the average of the three signals: <CS>, <Ti>, and <TO>. The averaged signals are used in a multiplier/divider 111 to produce 0CM. 0CM is then compared to the output current target OCT in subtractor 115 to produce the error signal ERR.

A second example implementation of such an error function is shown in Figure 8b. By multiplying the right-hand side of the above equation for ERR by <TO>I<T 1> the error signal becomes: OCT<TO> ERR =<CS>-<Ti> In this implementation <TO> and <Ti> have been switched on the input of the multiplier/divider 111 and OCT and <CS> have also been switched. The signal path carrying OCT is subtracted from <CS> in subtracter 115. The ERR signal in this implementation will differ in magnitude to that of the first example implementation but this does not adversely affect the operation of the surrounding circuitry.

Error control and driver block The ERR signal is used to control the driver so that the error signal ERR converges towards zero and therefore the 0CM signal converges towards OCT. Example implementations are shown in Figures 9a and 9b. In Figure 9a the controller integrates the ERR signal; in Figure 9b the controller integrates the difference between the 0CM and OCT signals. In both cases the integration is performed by action of the resistor 70, the capacitor 72, and the amplifier 73. Together they form an inverting integrator. If the output culTent is too high, the error voltage ERR -or the difference 0CM-OCT -will be positive, and the signal CC will decrease which reduces the output power of the SMPS (and vice versa for a too low output current). In Figure 9b the purpose of the buffer 74 is to reduce the load on the low-pass filter 126 in the current model 28.

The purpose of resistor 71 is to cancel the pole from the CM 28 by inserting a zero. This way the transfer function from OC to CC only has one dominant pole at zero frequency.

The controller may be implemented without resistor 71 by replacing this with a wire. In this alternative implementation of the controller, the low-pass filter 114 in the current module CM 28 is no longer required. In effect, removing the low-pass filter 114, i.e. letting the time constant T3 go to zero, reduces the required value of the resistor 71 to zero.

The driver in Figures 9a,b may comprise a pulse-width and/or pulse-frequency modulator that controls the DRIVE signal. The DRIVE signal turns on and off the primary side switch 15. The width and frequency of the DRIVE signal controls the power delivered to the secondary side of the transformer 11. The input signal CC preferably controls the driver such that the power delivered to the secondary side is (linearly) dependent on (increases monotonically with respect to) the input signal CC.

For further details reference may be made to the applicant's co-pending applications PCT/GB2005/050244, PCT/GB2005/050242, GB 0526118.5 (all of which applications are hereby incorporated by reference in their entirety).

Results A feasibility study circuit was constructed and the results from this board, a constant-voltage/constant-current curve, are plotted in Figure 10. Figure 10 shows output voltage (volts) against output current (amps) for a range of voltages from 9OVac to 265Vac under varying load conditions, showing upper and lower limits of the variations. The results demonstrate that an error of the order of 10% or more is removed and indicate that a �5 % accuracy in the current regulation of a SMPS is feasible.

We have shown how the accuracy of a primary side sensing of the output current of an SMPS can be increased. In embodiments by rearranging the snubber circuit used to dampen the ringing of the leakage inductance of a transformer, the energy loss in the leakage inductance can be measured and compensated for. In this way much more accurate output current estimation can be achieved.

Embodiments of the SMPS we describe may include an output voltage control loop, preferably a primary-side sensing voltage control ioop. We have previously described a number of suitable techniques including, for example, that of in WO 2007/135452 (US 11/445,473) which samples the output voltage at the knee in the reflected secondary side voltage waveform (identified using a decaying peak detector to approximate a tangent to the decaying secondary side waveform), at which point because substantially no current is flowing to the SMPS output the secondary side voltage accurately reflects the output voltage of the SMPS.

We have described the operation of embodiments of the above-described output current estimation technique in the context of an example of an SMPS operating in a Discontinuous Conduction Mode (DCM), but the techniques also work in Critical Conduction Mode and in Continuous Conduction Mode (CCM) since no particular shape is assumed for the waveforms involved; instead the described signal processing employs the actual, sensed signal waveforms.

No doubt many other effective alternatives will occur to the skilled person. It will be understood that the invention is not limited to the described embodiments and encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.

Claims

CLAIMS: 1. A switch mode power supply (SMPS) output current regulation system, said switch mode power supply including a transformer with at least a primary winding coupled to an input of the switch mode power supply and a secondary winding coupled to an output of the switch mode power supply and having a power switching device to switch power on and off to said primary winding of said transfonner responsive to a drive signal, the output current regulation system comprising: a current sense input to receive a current sense signal sensing currents in said transformer; a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said switch mode power supply to flow in said primary winding after said power switching device has switched off power to said primary winding; a controller, coupled to said current sense input and having a drive output to provide said drive signal to said power switching device to control switching of said device to regulate said output current; and a system to compensate said current sense signal for said leakage inductance current such that said regulation of said output current compensates for said leakage inductance in said switch mode power supply.
2. A switch mode power supply output current regulation system as claimed in claim 1 wherein said system to compensate said current sense signal for said leakage inductance current comprises a system to determine a leakage value, said leakage value being proportional to an area of a right angled triangle having a height dependent on an initial value of said leakage inductance current when said switching device is switched off and a base dependent on a duration of a leakage current discharge time, said leakage current discharge time representing a time during which said leakage inductance current is flowing, and to subtract said leakage value from an average value of said current sense signal.
3. A switch mode power supply output current regulation system as claimed in claim 2 further comprising a system to determine a value of said base of said triangle responsive to an estimate of a duration of a leakage current discharge time, said leakage current discharge time representing a time during which said leakage inductance current is flowing.
4. A switch mode power supply output current regulation system as claimed in claim 1, 2 or 3 wherein said system to compensate said current sense signal for said leakage inductance current comprises a connection between said snubber circuit and a device sensing said currents in said transformer.
5. A switch mode power supply output current regulation system as claimed in claim 4 wherein said connection between said snubber circuit and said sensing device is configured to subtract from said current sense signal a value dependent on an average value of said leakage inductance current over a period when said leakage inductance current is flowing.
6. A switch mode power supply output current regulation system as claimed in claim 5 wherein said system to compensate said current sense signal for said leakage inductance current comprises a capacitor of said snubber circuit to store a charge dependent on said average value of said leakage inductance current over a period when said leakage inductance current is flowing, and a switch to enable a voltage represented by said stored charge to be impressed upon said current signal to subtract said average value of said leakage inductance current over a period when said leakage inductance culTent is flowing from said current sense signal.
7. A switch mode power supply output current regulation system as claimed in claim 4, 5 or 6 wherein said sensing device comprises a culTent sense resistor in series with said primary winding, wherein said snubber circuit comprises a capacitor and a resistor coupled to said primary winding via a rectifier, and wherein said connection of said snubber circuit to said current sense resistor comprises a series connection via said capacitor of said snubber circuit.
8. A switch mode power supply output culTent regulation system as claimed in any preceding claim further comprising a circuit to estimate a discharge time of said leakage inductance current, and wherein said system to compensate said current sense signal for said leakage inductance current is responsive to said leakage inductance current discharge time.
9. A switch mode power supply output culTent regulation system as claimed in any preceding claim further comprising a circuit to determine an average value of said leakage inductance current from a sensed primary side voltage or current, and wherein said system to compensate said culTent sense signal for said leakage inductance current comprises a system to subtract a value dependent on said determined average value of said leakage inductance current from said current sense signal.
10. A switch mode power supply output current regulation system as claimed in any preceding claim wherein said controller further comprises: a voltage sense input to receive a voltage sense signal from said primary or an auxiliary winding of said transformer; a signal averager coupled to said current sense input to average said current sense signal over at least a period when said drive signal is controlling said power switching device to apply power to said primary winding and to provide an averaged current sense signal; a timing signal generator coupled to said voltage sense input to generate a timing signal indicating a duration of a period during which said secondary winding is providing power to said switch mode power supply output; a multiplier coupled to an output of said signal averager and to an output of said timing signal generator to scale said averaged current sense signal by said timing signal indicating a duration of a period during which said secondary winding is providing power to said switch mode power supply output; and an output from said multiplier to provide a signal for regulating said output current of said switch mode power supply.
11. A switch mode power supply including the switch mode power supply output current regulation system f any preceding claim.
12. A method of output current regulation in a switch mode power supply (SMPS), said switch mode power supply including a transformer with at least a primary winding coupled to an input of the switch mode power supply and a secondary winding coupled to an output of the switch mode power supply and having a power switching device to switch power on and off to said primary winding of said transformer responsive to a drive signal, the switch mode power supply further comprising a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said switch mode power supply to flow in said primary winding after said power switching device has switched off power to said primary winding, the method comprising: sensing currents in said transformer; and regulating an output current of said switch mode power supply responsive to said sensed currents; and wherein the method further comprises: compensating said sensed currents for said leakage inductance current when regulating said switch mode power supply output current.
13. A method as claimed in claim 12 wherein said compensating comprises directing leakage inductance current from said snubber circuit to a device sensing said currents.
14. A method as claimed in claim 12 or 13 wherein said compensating comprises sensing said leakage inductance current in said snubber circuit and subtracting from said sensed currents a current component dependent on said sensed leakage inductance current.
15. A method as claimed in claim 14 wherein said sensing uses a current sense resistor in series with said primary winding, wherein said snubber circuit comprises a capacitor and a resistor coupled to said primary winding via a rectifier, and wherein said subtracting comprises coupling said capacitor of said snubber circuit to said current sense resistor.
16. A method as claimed in claim 14 or 15 wherein said subtracting further comprises resetting a voltage on or from said capacitor whilst said leakage inductance current is flowing and enabling said voltage on said capacitor to reduce a voltage on said current sense resistor after said leakage inductance current has substantially stopped flowing.
17. A method as claimed in claim 16 further comprising estimating a duration of a leakage current discharge time, said leakage current discharge time representing a time during which said leakage inductance current is flowing, and resetting said voltage on or from said capacitor for said duration of said leakage current discharge time.
18. A method as claimed in claim 17 wherein said estimating comprises integrating a primary side voltage waveform of said SMPS, during a period when a charging current is flowing in said primary winding, from a starting value to an end value, integrating from said end value back to said starting value at a rate dependent on an estimated value of said leakage inductance, and determining an estimate of said duration of said leakage current discharge time from said duration of said integrating from said end value back to said starting value.
19. A method as claimed in any one of claims 12 to 18 wherein said compensating of said sensed currents produces a compensated current sense signal, the method further comprising averaging said compensated current sense signal over at least a whole switching cycle period of said SMPS, and using said averaged compensated current sense signal to regulate said SMPS output current.
20. A method as claimed in any of claims 12 to 19 further comprising determining a leakage value, said leakage value being proportional to an area of a right angled triangle having a height dependent on an initial value of said leakage inductance current when said switching device is switched off and a base dependent on a duration of a leakage current discharge time, said leakage current discharge time representing a time during which said leakage inductance culTent is flowing, and wherein said compensating for said leakage inductance current comprises subtracting said leakage value from a value representing said sensed currents.
21. A method as claimed in claim 20 wherein said determining of said leakage value comprises one or more of: integrating said leakage inductance current, sensing a current flowing in said snubber circuit to determine a value of said leakage inductance current, and determining a peak a charging current flowing in said primary winding.
22. A method as claimed in claim 20 or 21 wherein said determining of said base of said triangle comprises sensing one or more of: sensing a current flowing in said snubber circuit, sensing charging current flowing in said primary winding, and sensing at a primary side of said SMPS a voltage reflected from said secondary winding of said SMPS.
23. An output culTent regulation module for a switch mode power supply (SMPS), said SMPS including a transformer with at least a primary winding coupled to an input of the SMPS and a secondary winding coupled to an output of the SMPS and having a power switching device to switch power on and off to said primary winding of said transformer responsive to a drive signal, the SMPS further comprising a snubber circuit coupled to said primary winding to provide a path for leakage inductance current due to leakage inductance in said SMPS to flow in said primary winding, after said power switching device has switched off power to said primary winding the output current regulation module comprising: means for sensing currents in said transformer; means for regulating an output current of said SMPS responsive to said sensed currents; and means for compensating said sensed currents for said leakage inductance current when regulating said SMPS output current.