GB2458442A

GB2458442A - Wide band gap nanostructured devices

Info

Publication number: GB2458442A
Application number: GB0803709A
Authority: GB
Inventors: Enda Mcglynn; Rajendra Kumar Ramasamy Thangavelu
Original assignee: Dublin City University
Current assignee: Dublin City University
Priority date: 2008-02-29
Filing date: 2008-02-29
Publication date: 2009-09-23
Also published as: GB0803709D0; WO2009106636A1

Abstract

A light emitting or detecting device with an array of elongate ZnO nanorods 48 having a first end supported by a substrate and a thin insulating layer 45 which is used as a growth mask to form the ZnO nanorods grown on the substrate surface. A p-type PEDOT layer 46 surrounds the ZnO nanorod array. The device structure prevents charge being introduced into the p-type PEDOT layer from the buffer layer 43 and allows for greater contact between the nanorods and improves the efficiency of the device.

Description

1 2458442 Title Wide Band-Gap Nanostructures

Field of the Invention

[0001] The present invention relates to wide band-gap nanostructures. In particular the present invention relates to wide band-gap nanostructures which are useful in optoelectronic devices. In particular the present invention relates to nanostructures for example semiconductor nanostructures, such as compound nanostructures. The invention relates to nanostructures which emit or detect light including those constructed from ZnO and other semiconductor materials.

Description of Related Art

[0002] A great deal of effort has been devoted to the development of blue/ultra-violet (UV) emitting solid-state devices. This is at least in part due to their application in high density electronic storage. Examples include data storage, such as CD-ROM, white light arrays (such as those utilising using blue, red and green pixels), UV laser diodes and bio-photonic devices.

[00031 ZnO has long been a potential candidate among (compound) semiconducting UV-emitting materials. It is generally regarded as possessing excellent optoelectronic properties which may be imparted to an electronic device. It is generally thought to be stable so that an optoelectronic device comprising it, is stable when under operation.

This may be due to its high exciton binding energy. It is also thought that ZnO optical pumping occurs at a low power threshold. Devices based on ZnO are thought to be superior in terms of device longevity, even if operated in robust and high temperature conditions. Moreover, ZnO is a bio-compatible material, and has comparably small environmental risks both in terms of processing and ultimate device disposal. Devices based on this material are thus advantageous as compared to other materials such as the more toxic Ga-based wide band-gap semiconductors. If ZnO nanostructures could be more easily formed then they would become a mainstay of UV photonic devices.

[0004] Some work has been done on use of ZnO materials in electronic devices. For example, Konenkamp eta! in Applied Physics Letters 85 (2004) 6004, Nano Letters 5 (2005) 2005, and Won et al in Advanced Materials 16 (2004) 87, discuss the fabrication of vertically aligned ZnO nanowire-or nanorod-based light emitting devices. The well aligned ZnO nanorods were grown using metal organic vapour phase epitaxy (MOVPE). The gaps between the individual nanorods are filled by insulating polymer and a thin layer of p-type polymer is deposited on top of the insulating polymer to the nanorods tips and finally a metal electrode (typically Au) is coated onto the p-type polymer for carrier injection. A major performance limiting factor of the certain of the existing devices is the fact that a considerable fraction of the UV emission from the embedded nanorods is blocked by the Au layer deposited on the top surface of the nanorod/ p-type polymer layer. Another important issue arising with such a device is unnecessarily high, series contact resistance during device operation and consequent lower device efficiency.

[00051 Another ZnO nanowire-based light emitting device is described by Bao et al., in Nano Letters 6 (2006)1719. In this device, a single ZnO nanowire has been dispersed in a p-type silicon substrate followed by coating the substrate and the nanowire with an insulating polymer. Selective etching of the insulating polymer is performed use e-beam lithography. Metal electrodes are then deposited. This device utilises a greater surface area associated with the nanowire for carrier injection (p-n junction formation) when compared with the device described by Konenkainp et a! supra. However, this device structure cannot be adapted for mass production with current technology since it has been found to be practically difficult to assemble an array of nanowires in an ordered fashion with existing techniques such as those used by the authors of this paper. The use of single nanowires dispersed randomly on a substrate means that each nanowire has to be individually located using some form of microscopy (e.g. SEM). Any contact for the nanowire need to be made individually using an e-beam lithography process which is expensive and time consuming and ill-suited to formation of arrays or for mass production. The use of an e-beam lithography process is expensive and time consuming.

[0006] The inventive device structure described herein is related to the area of wide band-gap nanostructures vertically grown on substrates and related to the development of light emitting device using the same. In the present invention the nanostructures such as nanorods grow naturally with a strong "texture", i.e. meaning that they tend to align mostly quite close to vertical to the substrate.

[0007] Typically they are not all perfectly vertical but rather are described by a distribution (usually Gaussian) for example with z maximum at 90° to the surface and a full width at half maximum to indicate the spread of alignments. This is usually measured by a so-called x-ray diffraction "rocking curve". The width of this distribution of alignments could be up to 400 for example up to 30° such as up to 20°. Accordingly the word vertical when used in the context of the present invention should be interpreted as including such a distribution of alignments. It will clear to those skilled in the art that a device will be perfectly functional even with such a distribution. The improved device structure aims to solve existing problems which reduce the ultimate device performance and prevent cost effective large scale production of vertically aligned wide band-gap semiconductor nanostructure based nano-photonic devices. Notwithstanding the various proposals above there are still performance limiting issues in the device itself and/or issues with ease of production of the devices. Light blockage, utilisation of expensive materials such as sapphire, materials not suited to clean room environments such as glass or sapphire substrates are all to be avoided. E-beam lithography is expensive.

Therefore, it is necessary to provide a solution to the problems encountered with such devices.

Summary of the Invention

[0008] The present invention provides an improved device structure to overcome the above-mentioned performance limiting issues. In particular, the present invention allows mass production using existing and well-established device fabrication technologies. Expensive procedures involving techniques such as e-beam lithography are not required. It is thus possible to provide an improved device structure which is inexpensive to make and which can be fabricated with high throughput. For example the devices of the invention can be constructed utilising optical lithography techniques.

[0009] In particular, the present invention provides a device which allows utilisation of the maximum surface area of nanostructures, such as nanowires, nanorods, nanowalls or nanobelts. This allows for efficient carrier recombination (high surface area of p-n junctions) and thus increases the performance of the device. To achieve the aforementioned objectives, the present invention provides a simple structure for a light emission or detection device fabricated by using semiconductor nanostructures which are vertically grown on substrates. The inventive device structure can be easily fabricated by conventional semiconductor and optoelectronic industrial processes. The nanostructures such as well aligned nanorods, for example those formed of ZnO, can be grown using metal organic vapour phase epitaxy (MOYPE).

[0010] The present invention provides a device, such as a light-emitting device, for example a UV-light emitting device, comprising: (I) a substrate having a surface, (ii) a array of elongate nanostructures supported on the surface (for example grown upon the substrate) and having a first end supported by (for example attached to) the surface and a second free end projecting away from the surface; (iii) a thin insulating layer supported on (for example formed on) the surface and about the nanostructures, the insulating layer being arranged so that a substantial portion of the nanostructures extend through the insulating layer.

[0011] In contrast with prior art devices, the present invention utilises the high surface area associated with nanostructures such as nanorods or nanowires to form a superior device. For example, the greater surface areas of the p-n junction (for example p-type polymer, n-type ZnO nanorods) in such a device allows for more efficient carrier recombination and thus greater device performance. This is due to the greater intimate surface area contact between the nanostructures and a p-type layer above the insulator (insulating layer) and surrounding the nanostructures.

[0012] It will be appreciated that devices with different morphology such as rods, wires, belts and walls on different substrates can be made thus allowing for great advancement in UV photonic devices.

[0013] Desirably the material employed to form the nanostructures is a suitable semiconductor materials such as ZnO. It Will be appreciated that any suitable material may be employed.

[0014] In the context of the present invention a substantial portion of the nanostructures will include structures in which at least 85% of the (height) of the nanostructures. This means that at least 85%, for example at least 87% such as at least 90% of the height extends through the insulating layer. Generally the array of nanostructures will be substantially vertical (relative to the substrate). This will generally mean the nanostructures will be sufficiently aligned to each other. As above the array of nanostructure.s may have a distribution of vertical alignments.

[0015] The device may further comprise a p-type layer that is formed on the insulating layer and about the nanostructures, the p-type layer being arranged so that a substantial portion of the substantial portion of the nanostructures which extends through the insulating layer, is buried in the p-type layer. Generally the insulating layer will extend along less than 15%, for example less than 13%, such as less than 12%, desirably less than 10% of the nanostructures (the average height fraction in the insulating layer may be considered here). Generally then the insulating layer is thin relative to the height of the nanostructures. As above, this allows for large surface area contact between the nanostructures and a further layer such as that of a p-type material for example a p-type polymer. For the reasons already presented, this results in a far superior device.

[0016] Of the substantial portion extending through the insulating layer it is desirable that a substantial portion of that is buried in a further layer such as a p-type layer. In particular it is desirable that the p-type layer will extend along greater than 65%, for example greater than 70% such as greater than 75% of the total length of the nanostructures. Because the amount of contact between the nanostructures and the p-type layer is great the device is much more efficient.

[0017] In one configuration, substantially only the tips of the free-ends of the nanostructures are exposed through the p-type layer. This means that light can be emitted from nanostructures through the tips without being impeded by, for example, a further surface layer such as p-type material or anode.

[0018] If desirable the free ends of the nanostructure array can be placed in contact with another material such as a phosphor material. In such a case it may be desirable to have from about 10% to about 36% such as about 15% to about 25% such as about 20% of the nanostructures extending through the p-type layer. Suitable phosphor materials include those based on cadmium, manganese, zinc, aluminum, silicon, and rare earth metals.

[00191 It may be desirable to include a (semiconductor) buffer layer on the substrate arid to provide (for example grow) the nanostructures on the buffer layer. For example the buffer layer may be formed on a support such as support made from silicon, sapphire, plastics, glass or other materials. For commercial reasons including clean-room compatibility silicon substrates may be preferred. In such a case the insulating layer will be provided on the buffer layer and extend about the nanostructures. This insulates the buffer layer from the p-type layer. A preferred material for forming the buffer layer is ZnO. It will be appreciated that any suitable material may be employed.

[0020] The array will generally be a light-emitting or light-detecting array depending on the semiconducting materials used. An electrode is provided on the p-type layer for supply of electrical power. It is desirable that the electrode is arranged so as not to interfere to any substantial extent with either light emitted from the array or light entering the array as appropriate. This contrasts with many other devices where light emitted from an array of nanostructures is obstructed by an electrode layer such as metaffic layer. Such a layer generally completely overlies the nanostructures and blocks light.

[0021] It may be desirable to arrange the device wherein substantially all of the electrode is provided on a periphery of the p-type layer. This means that the electrode will not overlie to any substantial extent the nanostructures. Desirably, the electrode is formed as a ring about the periphery of the p-type layer. The area demarcated by the electrode (for example within the ring) will thus be available for light emission/detection.

[0022] An area above the nanostructures, such as that delimited by the electrode, may be treated so as to alter the properties of the light emitted or detected. Materials may be applied to the tips of the nanostructures. For example the area may be treated with a phosphor material as discussed above.

[0023] It may additionally be desirable to provide an electrode on the n-type such as the buffer layer. This allows for a potential to be applied between a n-type buffer layer and the p-type polymer and thus across the array. Again it may be desirable for substantially all of this electrode to be provided on a periphery of the n-type layer. For example the electrode may be formed as a ring about the periphery of the buffer layer.

[0024] In one simple arrangement, the nanostructures and the buffer layer are formed of the same semiconductor material. If desired, the nanostructures and the buffer layer are formed of different semiconductor materials. The nanostructures may be deposited using any convenient method such as MOVPE. The buffer layer may be deposited using any convenient method such as pulsed laser deposition techniques.

[0025] The insulating layer is optionally made from a polymeric material. The polymeric material may be a photo-resist material, including for example, epoxy resin materials.

[00261 The various components of the device can be provided using any of a variety of methods including chemical solution deposition, MOVPE, pulsed laser deposition (PLD), molecular beam epitaxy (MBE) or vapour phase transport (VPT) or variants of these techniques. The method of growing any component should achieve textured (well aligned) growth. The buffer layer may help to promote textured growth.

[0027] In another aspect the present invention relates to a device comprising: (i) a substrate having a surface, (ii) an array of elongate semiconductor nanostnictures supported by (for example grown upon) the substrate and having a first end supported by (for example attached to) the surface and a second free end projecting away from the surface; (iii) a thin insulating layer supported by (for example formed on) the surface and about the semiconductor nanostructures, the insulating layer being arranged so that a substantial portion of the nanostructures extend through the insulating layer; (iv) a p-type layer that is supported by (for example formed on) the insulating layer and about the nanostructures, the p-type layer being arranged so that a substantial portion of the substantial portion of the nanostructures which extends through the insulating layer, is buried in the p-type layer.

[0028] It is thus apparent that the present invention can provide a device where a ZnO buffer layer is deposited on any substrate and ZnO nanorods/wires are grown vertically on the ZnO buffer layer, followed by deposition of thin insulating polymer layer. Then p-type polymer is deposited in such a manner that the nanorods are buried into p-type polymer. After, (metal) electrodes are deposited on the edges of p-type polymer and on ZnO buffer layer. Electric potential will be applied between the metal electrodes connecting p-type polymer and ZnO buffer will result in light emission from the nanorods. The role of above mentioned insulating polymer is to avoid shorting of the ZnO buffer layer and the p-type polymer. The invention extends a device substantially as described herein with reference to and as illustrated in the accompanying drawings.

Brief Description of the Drawin2s

[0029] Figure 1 is a schematic sectional view of a light emitting device (prior art 1) Figure 2 shows a schematic sectional view of another light emitting device (prior art 2) Figure 3 shows a schematic sectional view of a third light emitting device (prior art 3) Figure 4 shows a sectional view of light emitting device structure of present invention Figure 5 shows a top view of light emitting device structure of present invention

Detailed Description of the Drawin2s

[0030] Figure 1 is a schematic of vertical (within a given distribution) ZnO nanowire light emitting device I reported by Konenkamp et al in Applied Physics Letters 85 (2004) 6004 (prior art 1). In this device ZnO nanorods 2 are grown on a Sn02 buffer layer 3 (which acts as a cathode) deposited on a glass substrate 4. Insulating polymer (polystyrene) 5 fills the space between the nanorods i.e. substantially the entire length of nanorods is buried in the insulation polymer. P-type polymer 6 (poly 3,4-ethylene-dioxythiophene or PEDOT/ Polystyrene sulfonate or PSS) is deposited on the top of the insulating polymer S so that only the nanorod tips 7 are in contact with p-type polymer.

A Au contact 8 is deposited on the p-type polymer and an electrical potential 9 is applied between the Sn02 buffer layer and the p-type polymer to produce light emission.

[0031] Figure 2 is a schematic of another light-emitting device 21 of a ZnO nanorod array 22 vertically grown on p-type Gallium Nitride film 23 supported on a sapphire substrate 24 and disclosed by Won et al in Advanced Materials 16 (2004) 87 (prior art 2). To make the device, a GuN buffer layer is grown as a film 23 on the sapphire substrate 24. ZnO nanorods 22 are then grown vertically on GaN buffer layer. Then, insulating polymer (photoresist) 25 is spun over the nanorods such that substantially the complete length of the nanorods are buried in the insulating polymer. Only the tips 26 of the nanrods are exposed through the insulating layer. Metal contacts 27,28 were fabricated by respectively evaporating Pt/Au and Ti/Au layers on the p-GaN layer and on the n-ZnO nanorods. A potential 29 can be applied across the electrodes 27,28 to cause light emission.

[0032] The present inventors have realised that one of the issues with the above mentioned devices is that the p-n junction (between p-type polymer and n-type ZnO in prior art 1; p-GaN and n-type ZnO nanorods in prior art 2) is formed at only at the tips of the nanorods. Therefore carrier recombination occurs only at the tips of the nanorods.

This leads to an unnecessarily high series contact resistance during device operation.

This is believed to affect efficient electron supply from ZnO buffer layer to p-n interface and thereby consequently lower the efficiency of the device. Another important performance limiting factor of the device above is the fact that a considerable fraction of the UV emission from nanorods is blocked by the metallization layer deposited for carrier injection on the top surface.

[0033] Figure 3 is a schematic of yet another light emitting device 31. It is fabricated using a single ZnO nanowire on a silicon substrate as described Bao et a] in Nano Letters 6 (2006) 1719 (-prior art 3). In this device, a single ZnO nanowire has been dispersed in p-silicon substrate 32 followed by coating of insulating polymer 33.

Selective etching of insulating polymer is performed use e-beam lithography and finally Ti/Au electrodes 34 were deposited. A potential 35 can be applied across the p-silicon substrate 32 and the Ti/Au electrodes 34 to cause light emission.

[0034] The device 31 proposed and demonstrated by Gao et al (prior art 3) uses a large fraction of the nanorod area for the junction interface compared to the prior arts l&2, however this structure cannot be adapted for mass production with current technology since it is practically difficult to assemble an array of nanowires in an ordered fashion, as required in the device, and suitable for manufacture with existing techniques. Furthermore construction of this device requires an e-beam lithography process which is expensive and time-consuming.

[0035] Figure 4 shows a schematic sectional view of an inventive light emitting device structure 41 according to the present invention. The device structure consists of ZnO nanorods 42 grown on a ZnO buffer layer 43 which has been deposited on a silicon substrate 44. Over the buffer layer, a thin layer 45 (about 0.5 fim) of insulating polymer (polystyrene or photoresist) is coated. It will be appreciated that a portion 47 which represents a substantial portion of the nanostructures, extends through the insulating layer. Then, p-type polymer 46 (PEDOT/PSS) is applied. The p-type layer 46 is arranged so that substantially the entire portion of the nanostructures which extends through the insulating layer, is buried in the p-type layer. It will be appreciated that a substantial portion 47 of the nanostructures extends through the insulating layer and of that (substantial) portion, a substantial portion is buried in the p-type layer. The tips 48 of the nanorods 48 are left unburied in the p-type layer 46.

[0036] Metal contacts or electrodes 49,50 allow application of a potential 51. The contact 49 on the p-type layer is arranged so as not to interfere to any substantial extent with light 52 emitted from the array. As can be seen from Figure 4, and perhaps as best seen from (the top plan view of) Figure 5, substantially all of the electrode 49 is provided on a periphery of the p-type layer. Indeed the electrode 49 is formed as a (rectangular) ring about the periphery of the p-type layer 46.

[00371 It will be appreciated that the electrode 50 is provided on the buffer layer.

More particularly the electrode is provided on a periphery of the buffer layer. Indeed the electrode is formed as a (rectangular) ring about the periphery of the buffer layer.

[00381 The electrode 50 is formed of Ti/Au (for a ZnO buffer layer) and the electrode 49 is formed of Au (for a p-type polymer) and they are coated onto the ZnO buffer layer and p-type polymer, respectively. The electrodes 49 and 50 thus form ring contacts, It will be appreciated that such ring contacts are open in their respective central regions as best seen from Figure 5. This means that there is substantially less interference with light emission that with conventional devices. The electrodes may be constructed of any suitable material and may have any desired construction. Metallic materials and mixed metals may be employed. For example the electrode may be a multilayer such as a bilayer. Au and Ti-Au are examples of suitable materials.

[0039] It will be appreciated that the devices of the present invention can be manufactured utilising conventional techniques. For example the ZnO buffer layer can be deposited on silicon substrates using conventional techniques such as sputtering, pulsed laser deposition (PLD), chemical vapour deposition such as metal organic chemical vapour deposition (MOCYD), and sol-gel methods. Over the ZnO buffer layer, vertically aligned ZnO nanorods can be grown using variety of techniques such as vapour transport, sol-gel, MOCVD and PLD. Insulating polymer and p-type polymer may be applied using coating techniques such as spin-coating. Metallisation to form ring electrodes may be carried out using techniques such as thermal or e-beam evaporation followed by lithographic patterning or using masking techniques.

[00401 It will be appreciated that the inventive device of the present invention has two layers both of which may be formed from polymer. An insulating polymer layer provides good isolation between the (ZnO) buffer layer and a p-type polymer layer. The p-type polymer layer may cover the entire length of the nanorods (leaving tips exposed).

This means that a p-n junction interface may be formed on substantially the entire surface area of the nanorods (the surface area excluding that isolated by the insulating layer and that of the exposed tips). This offers several advantages such as: (a) the use of p-type polymers facilitates hole injection into ZnO with higher efficiency as compared to hole injection from p-Si where band offsets may reduce efficient hole injection into ZnO; (b) the maximum surface area of p-type polymer/nanorods for the p-n interface, results in reduced series contact resistance, lower turn-on voltages and higher efficiencies; (c) the use of a polymer p-type hole injector with a high area contact with the nanostructures enables a passivation role for the polymer contact which in turn means that non-radiative surface defects can be passivated (chemically dc-activated) leading to a substantially higher optical efficiency; and (d) the wave guiding effect of ZnO allows a substantial fraction of the emitted light from the large area junction to be guided to the nanorod tips and then emitted externally -thus achieving high output light coupling will be achieved. The requirement to create a micro-cavity is thus reduced.

[00411 Another advantageous features of the present invention include the ring type electrical contacts which allow substantially greater light emission as compared to the prior art above (in particular prior art I and prior art 2) where electrodes were formed as layers and thus blocked potential output light. Furthermore, the open area above the nanorods inside the ring contact (see Figure 5) can be utilised for adjusting the properties of light emitted. For example the nanorods may be coated by materials such as phosphors to yield photon down-conversion for white light emission and lighting applications.

[00421 The present invention also opens up the possibility of cost-effective mass production of such devices. Specifically the fabrication process is simple and cost effective (circumventing the necessity of using of e-beam lithography proposed for other complex hybrid device structures). The construction of the device of the present invention is fully compatible with existing planar fabrication technology, and the base substrate may be silicon, which will allow integration with conventional micro-electronic device structures. The device structure is scaleable and cost-effective. These devices will find applications in areas where UV/blue emitters are required, including high density data storage and retrieval, white lighting, display technology, and other bio-photonic applications where high energy UV photons are required, e.g. battery-powered UV exposure units such as those used for water purification systems in remote environments.

[0043] These p-n device structures may also be used as optical detectors and sensors.

Advantages in such applications include the fact that the devices will be insensitive to visible radiation and fluctuations therein. The present inventive device structure is not only restricted to ZnO nanorods (active light emitting material) and silicon substrates, but it is applicable to all kind of semiconductor nanostructures grown on semi- conducting buffer layers on any kind of substrates. One particularly advantageous end-use is in the formation of blue/UV LEDs.

[00441 The words "comprises/comprising" and the words "having/including" when used herein with reference to the present invention are used to specify the presence of stated features, integers, steps or components but does not preclude the presence or addition of one or more other features, integers, steps, components or groups thereof.

[0045] It is appreciated that certain features of the invention, which are, for clarity, described in the context of separate embodiments, may also be provided in combination in a single embodiment. Conversely, various features of the invention which are, for brevity, described in the context of a single embodiment, may also be provided separately or in any suitable sub-combination.

Claims

Claims 1. A device comprising: (i) a substrate having a surface, (ii) a array of elongate nanostructures upon the substrate and having a first end supported by the surface and a second free end projecting away from the surface; (iii) a thin insulating layer supported on the surface and about the nanostructures, the insulating layer being arranged so that a substantiai portion of the nanostructures extend through the insulating layer.
2. A device according to Claim 1 further comprising a p-type layer that is formed on the insulating layer and about the nanostructures, the p-type layer being arranged so that a substantial portion of the substantial portion of the nanostructures which extends through the insulating layer, is buried in the p-type layer.
3. A device according to Claim 2 wherein substantially only tips of the free-ends of the nanostructures project through the p-type layer.
4. A device according to any preceding claim wherein the nanostructures are formed from ZnO.
5. A device according to any preceding claim wherein a semiconductor buffer layer is provided on the surface, the nanostructures are supported on the buffer layer and the insulting layer is supported on the buffer layer.
6. A device according to Claim 5 wherein the buffer layer comprises ZnO.
7. A device according to any preceding claim wherein the array is a light-emitting or detecting array, an electrode is provided on the p-type layer, and the electrode is arranged so as not to interfere to any substantial extent with light exiting or entering the array.
8. A device according to Claim 7 wherein substantially all of the electrode is provided on a periphery of the p-type layer.
9. A device according to Claim 8 wherein the electrode is formed as a ring about the periphery of the p-type layer.
10. A device according to any preceding claim wherein an area above the nanostructures is treated so as to alter the properties of the light emitted or detected.
11. A device according to Claim 10 which is treated with a phosphor material.
12. A device according to any one of Claims 5 to 1 1 wherein an electrode is provided on the buffer layer.
13. A device according to Claim 12 wherein substantially all of the electrode is provided on a periphery of the buffer layer.
14. A device according to Claim 13 wherein the electrode is formed as a ring about the periphery of the buffer layer.
15. A device according to any one of Claims 5 to 14 wherein the nanostructures and the buffer layer are formed of the same semiconductor material.

16. A device according to any one of Claims 5 to 14 wherein the nanostructures and the buffer layer are formed of different semiconductor material.17. A device according to any one of the preceding claims wherein the nanostructures are deposited using vapour deposition.
16. A device according to any one of Claims 5 to
17 wherein the buffer layer is deposited using pulsed laser deposition.
18. A device according to any preceding Claim wherein the insulating layer is made from a polymeric material.
19. A device according to Claim 18 wherein the polymeric material is a photo-resist material.
20. A device comprising: (1) a substrate having a surface, (ii) an array of elongate semiconductor nanostructures supported on the substrate and having a first end attached to the surface and a second free end projecting away from the surface; (iii) a thin insulating layer supported on the surface and about the semiconductor nanostructures, the insulating layer being arranged so that a substantial portion of the nanostructures extend through the insulating layer; (iv) a p-type layer that is formed on the insulating layer and about the nanostructures, the p-type layer being arranged so that a substantial portion of the substantial portion of the nanostructures which extends through the insulating layer, is buried in the p-type layer.
21. A device according to Claim 20 wherein the nanostructures comprise ZnO.
22. A device according to Claim 20 or 21 further comprising a semiconductor buffer layer is provided on the surface, the nanostructures are supported on the buffer layer and the insulting layer is supported on the buffer layer.
23. A device according to Claim 22 wherein the buffer layer comprises ZnO.