GB2449570A - A dynamically self-decaying device architecture - Google Patents

A dynamically self-decaying device architecture

Info

Publication number
GB2449570A
GB2449570A GB0812877A GB0812877A GB2449570A GB 2449570 A GB2449570 A GB 2449570A GB 0812877 A GB0812877 A GB 0812877A GB 0812877 A GB0812877 A GB 0812877A GB 2449570 A GB2449570 A GB 2449570A
Authority
GB
United Kingdom
Prior art keywords
power
powered
execution
management unit
groups
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0812877A
Other versions
GB0812877D0 (en
GB2449570B (en
Inventor
Preetham Raghuvanshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Priority claimed from PCT/US2006/047682 external-priority patent/WO2007081488A2/en
Publication of GB0812877D0 publication Critical patent/GB0812877D0/en
Publication of GB2449570A publication Critical patent/GB2449570A/en
Application granted granted Critical
Publication of GB2449570B publication Critical patent/GB2449570B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Sources (AREA)

Abstract

A power management method and mechanism for dynamically determining which of a plurality of blocks of an electrical device may be powered on or off. A device includes one or more power manageable groups (260A-260N). A power management unit (202) associated is configured to detect instructions which are scheduled for execution, identify particular power group(s) which may be required for execution of the instruction, and convey an indication which prevents the particular power group(s) from entering a powered off state, in response to detecting said instruction. If the power management unit does not detect an incoming or pending instructions which requires a particular power group(s) for execution, the power management unit may convey an indication (570A-570N) which causes or permits the corresponding power group(s) to enter a powered off state. Pcwer groups may automatically decay to a powered off or reduced power state. Instructions may be encoded to identify required power groups.
GB0812877A 2006-01-06 2006-12-14 A dynamically self-decaying device power management architecture Active GB2449570B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11327606A 2006-01-06 2006-01-06
PCT/US2006/047682 WO2007081488A2 (en) 2006-01-06 2006-12-14 A dynamically self-decaying device architecture

Publications (3)

Publication Number Publication Date
GB0812877D0 GB0812877D0 (en) 2008-08-20
GB2449570A true GB2449570A (en) 2008-11-26
GB2449570B GB2449570B (en) 2009-06-10

Family

ID=39722267

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0812877A Active GB2449570B (en) 2006-01-06 2006-12-14 A dynamically self-decaying device power management architecture

Country Status (1)

Country Link
GB (1) GB2449570B (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5953237A (en) * 1996-11-25 1999-09-14 Hewlett-Packard Company Power balancing to reduce step load
WO2005069123A2 (en) * 2004-01-13 2005-07-28 Koninklijke Philips Electronics N.V. Microprocessor, related method of operating the same and related instruction word
US6976182B1 (en) * 2002-02-01 2005-12-13 Advanced Micro Devices, Inc. Apparatus and method for decreasing power consumption in an integrated circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5953237A (en) * 1996-11-25 1999-09-14 Hewlett-Packard Company Power balancing to reduce step load
US6976182B1 (en) * 2002-02-01 2005-12-13 Advanced Micro Devices, Inc. Apparatus and method for decreasing power consumption in an integrated circuit
WO2005069123A2 (en) * 2004-01-13 2005-07-28 Koninklijke Philips Electronics N.V. Microprocessor, related method of operating the same and related instruction word

Also Published As

Publication number Publication date
GB0812877D0 (en) 2008-08-20
GB2449570B (en) 2009-06-10

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