GB2449167A

GB2449167A - Wireless communication unit and method for filtering using an adaptive root raised cosine filter

Info

Publication number: GB2449167A
Application number: GB0808224A
Authority: GB
Inventors: Gopikrishna Charipadi; Nicholas Roberts
Original assignee: IP Access Ltd
Current assignee: IP Access Ltd
Priority date: 2007-05-11
Filing date: 2008-05-07
Publication date: 2008-11-12
Anticipated expiration: 2028-05-07
Also published as: GB0709074D0; GB2449167B; GB0808224D0

Abstract

A method of designing a phase-compensated digital root raised cosine filter for a receiver comprises generating (62) a baseband signal; filtering (64) the baseband signal to model an ideal transmit pulse shaped signal and splitting the ideal transmit pulse shaped signal into a first and second path. The signal on the first path is filtered with a root raised cosine filter 72 having pre-determined coefficients such that a desired filtered signal is produced. A model 70 of an analogue low pass filter is generated using a scattered parameter (s-parameter) model of the output of the analogue low pass filter with respect to its input. The signal on the second path is filtered using the generated model of the analogue low pass filter and an adaptive root raised cosine filter 74 to generate an actual filtered signal and coefficients of the adaptive root raised cosine filter are iteratively modified such that the actual filtered signal correlates closely with the desired filtered signal, to generate the phase-compensated filter coefficients.

Description

WIRELESS COMMUNICATION UNIT AND METHOD FOR FILTERING USING

AN ADAPTIVE ROOT RAISED COSINE FILTER

Field of the invention

The field of the invention relates to a communication unit comprising a filter and a method of designing a phase compensated root raised cosine (RRC) filter. In particular, but not exclusively, the field of the invention relates to a method of designing a phase compensated RRC filter for use in direct conversion receivers in cellular mobile telephone networks, a method for manufacturing such a filter and a filter resulting from such a design.

Background of the Invention

Wireless communication systems are well known in the art, such as the 3td Generation (3G) of mobile telephone standards and technology. An example of such 3G standards and technology is the Universal Mobile Telecommunications System (UMTS), developed by the 3 Generation Partnership Project (3GPP) (www.3gpp.org) Typically, wireless communication units, or User Equipment (UE) as they are often referred to, communicate with a Core Network (CN) of a wireless communication system via a Radio Network Subsystem (RNS). A wireless communication network typically comprises a plurality of radio network subsystems, each radio network subsystem comprising one or more cells to which UEs may attach, and thereby connect to the network.

Femto-cell or pico-cell Access Points (APs) are a recent

development within the field of wireless cellular

communication systems. Femto-ce].ls or pico-cells are effectively communication coverage areas supported by low power base stations (otherwise referred to as serving communication units). These cells are able to be piggy-backed onto the more widely used macro- cellular network and support communications to UES in a restricted, for example in-building', environment. Typical applications for such femto-cell or pico-cell APs include, by way of example, residential and commercial (e.g. office) locations, hotspots', etc, whereby an AP can be connected to a core network via, for example, the Internet using a broadband connection or the like. In this manner, femto-cells or pico-cells can be provided in a simple, scalable deployment in specific in-building locations where, for example, network congestion at the macro-cell level is an issue.

The ability of a receiver of such communication units to select the desired received signal in the presence of other (interference) signals in adjacent bands is defined as receiver selectivity. The 3GPP (3rd Generation Partnership Project) WCDMA (Wideband Code Division Multiple Access) radio specifications (25.101) for the UE (User Equipment) require a minimum adjacent channel attenuation of 33dB as the selectivity requirement of a receiver, to achieve a Bit-Error-Rate (BER) of less than 0.1% for Adaptive Modulation Rate (AMR) 12.2Kbps service. The corresponding selectivity for a Base station (BS) is derived from the

3GPP specifications (25.104), as 45 dB.

Typically, receiver architecture employs an intermediate frequency (IF) stage to enable receiver selectivity, which is usually achieved using an IF SAW (Surface Acoustic Wave) filter in addition to baseband channel filters implemented using analogue circuits. Direct conversion receiver architecture provides an alternative to the typical receiver architecture. In direct conversion, there is no intermediate frequency (IF) stage, and hence there is no narrow band filtering in the RF (Radio Frequency) portion of the receiver. All the receiver selectivity has to be entirely achieved in the baseband filters.

Direct conversion receivers are popular in User Equipment (UE) designs due to their lower component count, cheaper cost and simpler frequency plan, since the elimination of the IF removes the need for a surface acoustic wave (SAW) filter and an IF synthesizer (local oscillator (LO)) and mixer.

In practice, baseband filters in the analogue domain alone cannot entirely provide the 33dB adjacent channel selectivity for UEs (and 45 dB for base stations (BSs)) required by the 3GPP specifications. This is because, such receivers require high order filters, which are difficult to realise in practice. For example, a 6th order Butterworth filter can provide only about 20dB attenuation.

Hence, the rest of the adjacent channel attenuation has to be provided by the digital RRC baseband filter.

Thus, in standard practice, partial adjacent channel rejection is provided by an analogue passive RLC (Resistor-Inductor-Capacitor) baseband filter, and the remaining adjacent channel rejection is achieved in the digital domain using a digital RRC filter after the analogue-to--digital conversion. However, the non-constant group delay due to the nonlinear phase-response associated with the analogue RLC filter causes Inter Chip Interference (Id), also known as Inter Symbol Interference (ISI), and contributes non-orthogonal noise power due to the receiver architecture, thus degrading the SNR (Signal to Noise Ratio) of the desired signal.

The known techniques to address the above problem of ISI are mainly frequency/phase domain approaches that adaptively tune the RRC filter's coefficients until the target phase-compensated frequency/phase response is reasonably (within a minimum mean error criteria) achieved and thus arrives at the final RRC filter coefficients.

In the frequency/phase domain approach, it is required to: (i) Transform the digital RRC filter and low-pass analogue filter cascade system from time-domain to frequency domain (usually using a lossy process such as windowing and Fast Fourier Transform (FFT)) to obtain the frequency response and phase response.

(ii) Optimise the resulting frequency/phase response in order to match the desired frequency/phase response of an ideal RRC filter and thus obtain the RRC coefficients.

This requires optimising in two-dimensions (frequency and phase), which is quite tedious and involved.

Thus, there exists a need for a wireless communication unit and method for filtering using a phase-compensated root raised cosine filter, which aims to address at least some of the shortcomings of past and present techniques and/or mechanisms.

Summary of the Invention

Accordingly, the invention seeks to mitigate, alleviate or eliminate one or more of the abovementjorjed disadvantages singly or in any combination.

According to a first aspect of the present invention there is provided a method of filtering using an adaptive root raised cosine filter for a receiver. The method comprises generating a baseband signal; filtering the baseband signal to produce a transmit pulse shaped signal; and splitting the transmit pulse shaped signal into a first transmit pulse shaped signal on a first path and a second transmit pulse shaped signal on a second path. The method further comprises filtering the first transmit pulse shaped signal on the first path with a root raised cosine filter having pre-determjned coefficients such that a desired filtered signal is produced; generating a model of an analogue low pass filter, using a scattered parameter (s-parameter) model of the output of the analogue low pass filter with respect to its input; and filtering the second transmit pulse shaped signal on the second path using the generated model of the analogue low pass filter and an adaptive root raised cosine filter to generate an actual filtered signal.

The method further comprises iteratively modifying filter coefficients of the adaptive root raised cosine filter such that the filtered actual signal correlates with the desired filtered signal.

In one optional embodiment of the invention, iteratively modifying filter coefficients of the adaptive root raised cosine filter may provide the filter impulse response as a phase compensated representation of the desired filter impulse response.

In one optional embodiment of the invention, the transmit pulse shaped signal may be a model of an ideal transmit pulse shaped signal of the baseband signal.

In one optional embodiment of the invention, the s-parameter model may be a 2-port network model. In one optional embodiment of the invention, s-parameters for the s-parameter model may be generated through software synthesis of the low pass filter.

In one optional embodiment of the invention, the s-parameters for the s-parameter model may be generated by analysis of an actual hardware low pass filter.

In one optional embodiment of the invention, the model of an analogue low pass filter may be a model of a 6th order elliptic cauer-chebychev baseband filter.

In one optional embodiment of the invention, filtering the baseband signal may comprise using a model of a transmit root raised cosine filter, as defined in 3GPP specification 25.104, for the UE (User Equipment) receiver design, or a model of a transmit root raised cosine filter, as defined in 3GPP specification 25.101, for the BS (Base Station) receiver design.

In one optional embodiment of the invention, the transmit root raised cosine filter may be modelled using a 200 tap filter to approximate an ideal root raised cosine filter.

In one optional embodiment of the invention, the pre-determined coefficients may be such that the root raised

cosine filter matches the specification of the 3rd

Generation Partnership Project 25.104, for a UE (User Equipment) receiver design or the specification of the 31 Generation Partnership Project 25.101, for a BS (Base Station) receiver design.

In one optional embodiment of the invention, iteratively modifying filter coefficients may comprise iteratively modifying the adaptive root raised cosine filter coefficients until an error signal, equal to the difference between the desired filtered signal and the actual filtered signal, is below a pre-determined error threshold value, which may be an absolute error threshold value of 10g.

In one optional embodiment of the invention, iteratively modifying filter coefficients may comprise iteratively modifying the adaptive root raised cosine filter coefficients using a Feintuch Least Mean Squares (LMS) Finite Impulse Response (FIR) algorithm.Alternatively the adaptive root raised cosine filter coefficients may be iteratively modified using a Decision Feedback Equalizer (DFE) with feed-forward coefficients only; the coefficients may be obtained using Normalised Least Mean Squares (NLMS) adaptation algorithm.

In one optional embodiment of the invention, the Feintuch LMS FIR algorithm specification may be defined as: initial filter weights all equal to zero and a feed forward filter having 50 taps and a step size of 0.09.

In one optional embodiment of the invention, the Decision Feedback Equalizer specification may be defined as: initial filter weights all equal to zero and a feed-forward filter having 50 taps and a step- size of 0.09.

In one optional embodiment of the invention, the receiver may be a direct conversion receiver. Alternatively, in one optional embodiment of the invention, the receiver may be a double conversion receiver.

In one optional embodiment of the invention, the method may further comprise modelling an analogue passive RLC (Resistor-Inductor_Capacitor) baseband filter and filtering the signal of the second path before the actual filtered signal is generated.

In one optional embodiment of the invention, the method may further comprise modelling an Intermediate Frequency Surface Acoustic Wave (SAW) filter followed by an analogue passive RLC (Resistor-Inductor_Capacitor) baseband filter and filtering the signal of the second path before the actual filtered signal is generated.

According to a second aspect of the present invention there is provided a wireless communication unit comprising an adaptive root raised cosine filter adapted according to the first aspect of the present invention.

According to a third aspect of the present invention there is provided a semiconductor device comprising an adaptive root raised cosine filter designed according to the first aspect of the present invention.

These and other aspects, features and advantages of the invention will be apparent from, and elucidated with reference to, the embodiment(s) described hereinafter.

Brief Description of the Drawings

Embodiments of the invention will be described, by way of example only, with reference to the accompanying drawings, in which: FIG. 1 illustrates a direct conversion receiver.

FIG. 2 illustrates a digital baseband front-end in accordance with an embodiment of the invention.

FIG. 3 illustrates a method of designing a filter in accordance with an embodiment of the invention.

FIG. 4 illustrates a test arrangement for a filter designed according to the method of the present invention.

FIG. 5 illustrates an eye-diagram produced by a 3GPP specification filter, for a BPSK (Binary Phase Shift Keying) baseband signal.

FIG. 6 illustrates an eye-diagram produced by a filter designed according to a method of the present invention (Feintuch Least Mean Squares (LMS) Finite Impulse Response (FIR) algorithm), for a BPSK (Binary Phase Shift Keying) baseband signal.

FIG. 7 illustrates a frequency response of a filter designed according to a method of the present invention and -10 -contrasts it with that produced by a 3GPP specification filter.

FIG. 8 illustrates a group delay response of a filter designed according to a method of the present invention and contrasts it with that produced by a 3GPP specification filter.

FIG. 9 illustrates an example of an elliptical analogue Low Pass Filter, as required in a typical receiver adapted in accordance with embodiments of the invention.

FIG. 10 illustrates the convergence of an error signal from a filter designed in accordance with embodiments of the invention.

FIG. 11 illustrates an eye-diagram produced by a filter designed according to the method of the present invention using a (Decision Feedback Equalizer (DFE) method) for a WCDMA P-CPICH (Primary Common Pilot Channel) QPSK (Quadrature Phase Shift Keying) baseband signal.

FIG. 12 illustrates an eye-diagram produced by the 3GPP specification RRC filter, for the P-CPICH QPSK baseband signal.

Detailed Description of Embodiments of the Invention As mentioned above, previous approaches to the design of digital root raised cosine (RRC) filters in receivers rely on the frequency / phase domain. Frequency/phase domain approach suffers from requiring to transform the RRC filter and low-pass analogue filter cascade system from time- -11 -domain to frequency domain (usually using a lossy process like windowing and Fast Fourier Transform (FFT)) to obtain the frequency response and phase response and having to optimise the resulting frequency/phase response in two-dimensions (frequency and phase) so that it matches closely with the frequency/phase response of an ideal RRC filter; this requires significant processing and time.

The present invention takes a time-domain approach, which does not require to transform the system into the frequency/phase domain and, as a result, optimisation of the actual impulse response of the digital RRC filter with respect to the ideal RRC filter impulse response is straightforward, since optimisation occurs in one-dimension only: time.

The method uses an adaptive filter configuration to identify the filter coefficients of a phase compensated RRC filter, giving a desired phase compensated impulse response.

In general, the method of the present invention is very useful to generate off-line RRC phase compensated coefficients, since the amount of adjacent channel filtering and analogue filter compensation required can change depending on the different receiver architectures, filtering responses and RF (Radio Frequency) chipsets to be used.

However, by phase compensating the RRC filter impulse response to account for the analogue baseband filter's non-constant group-delay, such that the cascade of the baseband filter and the RRC filter together exhibit the root raised -12 -cosine impulse response with a = 0.22, as required by the 3GPP specification 25.104, Inter Chip Interference (ICI, also know as Inter Symbol Interference) can be significantly reduced (optimally to zero) and thus the SNR (Signal to Noise Ratio) of the desired signal can be maximised.

A communication unit comprising a direct conversion RF receiver and a communication unit comprising a digital baseband front-end processing chain are shown in FIG. 1 and FIG. 2 respectively.

Referring to FIG. 1, a communication unit comprising a WCDMA direct conversion RF receiver 10 is shown comprising an antenna 12 for passing a received signal to a duplexer filter 14, which is a bandpass filter that passes the whole UMTS (Universal Mobile Telecommunications System) downlink spectrum (2.110 GHz to 2.170 GHZ) received from the antenna 12.

An LNA (Low Noise Amplifier) 16, connected to the duplexer filter 14, amplifies the received signal but adding low noise in the amplified output.

A RF (Radio Frequency) local oscillator Cosine waveform is generated directly by a Rx Synthesizer 18 and a phase-shifter 20 outputs a 00 and 90 phase shift of the cosine waveform.

An I-Mixer 22 downconverts the amplified output of the LNA 16 directly to 5MHz baseband bandwidth. Since the mixing is done using the cosine waveform generated directly by the Rx -13 -Synthesizer 18 without any phase-shift (that is, 00 from phase-shifter 20), the I-mixer gives the I-Component of the complex received signal as output. Similarly, the received complex signal is down-converted by the Q-Mixer 24 with the cosine output generated by the Rx Synthesizer 18 but phase-shifted by 90 to produce the Q-component output.

The I/Q components thus generated are low pass filtered (LPF) respectively by analogue baseband LPFs 26, with a cut-off frequency of 1.92 MHz (i.e., in the equation !(1+a)fChq, where f= 3.84MHz and a = 0.22), to remove the image signal due to the mixing stage and at the same-time providing partial (typically, 12 to 20 dB) adjacent channel attenuation of 33dB as required in 3GPP specification 25.101; these LPFs 26 also act as anti-aliasing filter prior to ADC conversion. The LPFs 26 are discussed in greater detail below. Baseband Variable Gain Amplifiers (VGA) 28 helps avoid saturation of the Analogue to Digital Converters (ADC) 30 due to the ADC5 30 limited dynamic range, which, for example, is 72 dB for 12-bit converters, thus enabling the receiver to handle received RF signals of about 100 dB dynamic range (-115 dBm to -15 dBm, for

example).

The ADCS 30 are over-sampled at 8x chip-rate (i.e., 30.72MHz), in order to ease the analogue LPF 26 roll-off requirements and hence lower order analogue LPFs 26 with enough room for roll-off can be used. Otherwise, with no oversampling, the LPFs 26 would have to have sharp roll-off and, as such, be of higher-order to provide any significant adjacent channel attenuation, which is difficult to realise -14 -in practice. The ADCs 30 Outputs 12-bit signed samples at the rate of 8x chiprate (i.e., 30.72 MHz) and have an I-output 32 and Q-output 34.

Referring to FIG. 2, a digital baseband front-end 40 receives the I-output 32 and Q-output 34 from the RF receiver 10 at I-input 42 and Q-input 44 respectively. The I/Q-inputs 42, 44 are decimated by rate-2 in two stages 46, 48, to produce 2 times chiprate oversampled output samples, since 2x oversampling is sufficient to meet WCDMA slot and frame synchronisation requirements down the chain (not shown in the figure).

Decimation filters 46 have their cut-off frequencies set to 2.34 MHz (that is, where f= 3.84MHz and a = 0.22), so that the entire 3GPP desired RRC filtered signal bandwidth of 2.34MHz is passed through, as it is, without any attenuation. This makes the decimation filters non-intrusive on the desired signal. The signal is then downsampled by downsamplers 48 by a rate of 2 each.

A phase-compensated RRC filter 50, which is designed by the method of the present invention, then provides matched filtering, that is matched to an ideal transmit RRC filter in the transmitter of the signal being received, in order to maximise the SNR (Signal to Noise Ratio) of the IIQ output signal 52 after RRC filtering, by rejecting out-of-band noise and in-band interference from adjacent channels.

As mentioned previously, although the 3GPP specification 25.104 defines the RRC filter impulse response at a= 0.22 in the frequency domain by equation 1 below, the actual RRC -15 -filter impulse response required in the receiver will be a convolution of equation 1 and the impulse response of the analogue LPFs 26 (for example, Butterworth or elliptic filter) in a direct conversion architecture.

A transmit pulse shaping filter (Jif)), is defined in

3GPP specification 25.104, as follows:

"The transmit pulse shaping filter is a root-raised cosine (RRC) with a roll-off of a= 0.22 in the frequency domain." The impulse response of the chip-rate RRC filter RC0(t) is: [ t(i-a)] t F t(i+a) smilE l+4a-cosilt L 7] T [ T. [1] 7tt 1-(4a--7, 7: Where the roll-off factor a = 0.22 and the chip duration: = O.26042ps, chiprate and FT[RC0(t)j is the Fourier transform of the RRC impulse response.

Where a double conversion receiver architecture is used, rather than the direct conversion receiver given above, an additional IF (Intermediate Frequency) SAW (Surface Acoustic Wave) filter would have to be compensated and hence equation [1] would become: f(j) = G(f)* Ganfias (j)* G0,(f) [2 -16 -Where: is the frequency response of the IF section SAW filter; G1j_ajjgj(f) is the frequency response of the analogue baseband anti-alias channel filter preceding the Analogue-to-Digital Converter (ADC) that provides the partial adjacent channel selectivity; and G,,(f) is the frequency response of the RRC digital filter with coefficients compensated to account for the frequency/phase response of the cascade of its preceding filters such that the overall response of the cascade including the RRC filter is an ideal RRC impulse response of equation 1.

Referring now to FIG. 3, a method of designing a phase compensated RRC Filter is shown. The method involves generating a simulation 60 of a transmit and receive system. The transmit portion of the simulation comprises a digital Gaussian signal source 62 and a model of an ideal transmit RRC filter 64. The digital Gaussian signal source 62 ensures uniform power spectral density across the WCDMA MHz baseband spectrum, and is fed as input to the transmit RRC filter 64, which is modelled with a long (200-tap) filter to approximate an ideal RRC filter of equation 1, so that there are substantially no modelling artefacts.

The output of the transmit RRC filter 64 splits into two symmetric paths: the left hand side chain that produces a desired signal d(n); and the right hand side chain that produces a modelled actual signal a(n), that has to be adapted iteratively to match the desired impulse response, d(n).

-17 -On each of the left and right hand side chains, 2-stage decimation blocks comprising decimation anti-alias filters 66 and rate-2 downsamplers 68 are provided to model the equivalent components as in the digital baseband front-end, as described with reference to FIG. 2. It is emphasised that the 2-stage decimation blocks are specific to this example and, in general, these blocks can be bypassed without affecting the validity of the invention.

At the start of the right hand chain, which models the actual signal, a model of a Low Pass Filter (LPF) 70, as described with reference to FIG. 1, is placed. In this example, the LPF 70 models an analogue 6th order Elliptic Cauer-Chebychev baseband filter, which provides the partial adjacent channel selectivity requirements of 3GPP in the analogue domain, as described previously. Accurate modelling of the LPF 70 is an important factor in achieving practical results from the design method. Modelling of LPF is achieved by using a scattered parameter, or s-parameter model. In particular, s-parameter 321, which is the measure of the signal coming out of port 2 relative to the RF input at port 1, in a 2-port network. S is a set of complex real and imaginary pairs or equivalently magnitude and phase pairs. There are two approaches for generating the required s-parameters: 1. Synthesise the filter to produce the S-parameters; or 2. Measure the filter's S-parameters output using Network Analyzer.

In the first method, 3rd-party tools, such as GenesysTM from Agilent Technologies is used to design the 6th order RLC elliptic LPF, as shown in FIG. 9. Then the 321 -18 -parameter of the elliptic LPF network as synthesized by GenesysTM is utilised to model the LPF 70 in the simulation.

Alternatively, in the second method, a 2-port 6th order RLC elliptic LPF may be prototyped on a hardware RF (Radio Frequency) board and analysed to measure the S21 parameter, using, for example an Agilent Network Analyzer. The S-parameter can then be imported into the simulation. In the case of a double conversion receiver, the S-parameter of the IF SAW filter can be measured as well and imported in a similar fashion.

At the end of each of the left hand and right hand chains a RRC Filter is placed. In the case of the left hand chain, a 3GPP specified RRC filter 72 is placed and at the end of the right hand chain an adaptive RRC filter 74 is placed, whose coefficients will adapt to eventually be a phase compensated RRC filter.

The 3GPP specified RRC filter 72 produces the desired signal d(n), as the left hand chain avoids any alteration which would affect the quality of the original transmitted signal.

An error signal e(n), which represents the difference between the desired signal d(n) and the actual signal a(n) is output from the adaptive RRC filter 74 and then used, as described below, to iteratively modify the adaptive RRC filter 74 coefficients until the minimum mean absolute error is within the chosen value of l0, in the resulting error signal, e(n). FIG. 10 shows the convergence of the error signal, e(n), towards +/-l0.

-19 -The adaptive RRC filter 74 uses the Fientuch's LMS (Least Mean Squares) 1-channel FIR (Finite Impulse Response) algorithm, to recursively adapt a(n) to the desired signal, d(n), with minimum mean absolute error = 10. The

algorithm specifications are:

Feed forward filter: -Number of taps = 50 -Step size = 0.09 Initial filter weights: -all 0 In this example, the simulation was set for 12,000 samples at 8x chip rate over sample rate, and the converging error signal e(n) was found to settle to within +I-io-within 1006s. After e(n) has converged to within +I-i03, the optimum phase compensated RRC filter coefficients have been achieved. The resulting RRC filter coefficients are asymmetric co-efficients, which implies that it has non- linear phase response such that it compensates the non-linear phase response of the analogue RLC baseband elliptic filter, resulting in the output of the cascade of the two filters to be a linear-phase response.

The present invention provides near-optimum Id (Inter-Chip-Interference) performance as demonstrated by the system simulation defined in FIG. 4.

Referring to FIG. 4, a transmitter modelled using an analogue Pseudorandom Noise (PN) source 82 generates a data stream at 8 times oversampled chiprate (that is, 30.72MHz) which is converted into discrete data samples by a Sample & Hold block 84. The discrete baseband data samples are pulse -20 -shaped by a 3GPP transmit RRC filter 86 (according to specification25.104) of equation {lJ and thus constrained to a WCDMA lowpass bandwidth of 2.34MHz that is, Where: fCh,=3.84NHz and a = 0.22.

The length of the filter was set to a large value (200 taps), in order to model an FIR filter that is close to the ideal filter, so that this filter characteristic does not influence the simulation.

Next, a communication channel is modelled using an Additive White Gaussian Noise source 88 and additive mixer 90. In reality, a communication channel heuristically can be thought of as a Low Pass Filter spreading the discrete pulses transmitted, and the resulting peaks relateto the amplitudes of the original pulses. This spreading causes channel induced Id. Since the present invention is to mitigate ICI introduced due to receiver architecture only, the channel model does not include a low pass filter.

The baseband transmitted pulses are received by the baseband receiver of a direct conversion receiver. As mentioned earlier, the baseband analogue low pass filter provides partial channel selectivity. In our case, the analogue filter is a passive elliptic cauer-chebychev 6th order filter 92. An S-parameter filter model as discussed in relation to the LPF 70 of FIG. 3 was used to model filter 92. Next, rate-2 decimation filter chains 94, comprising an anti-alias decimation filter and rate-2 downsampler, are connected to the filter 92.

-2]. -A Phase-Compensated RRC filter 96 using the filter coefficients generated as a result of the FIG. 3 simulation receives the signals from the rate-2 decimation filter chains 94. To compare the performance of the Phase-Compensated RRC filter 96 to that of the 3GPP specified RRC filter, a 3GPP specified RRC 98, according to specification 25.104, was included in the simulation.

The outputs of the 3GPP specified RRC filter 98 and the Phase-Compensated RRC filter 96 have been plotted as an eye-diagram and the results are shown in FIG. 5, FIG. 12 and FIG. 6, FIG. 11 respectively. FIG. 6 and FIG. 11 clearly shows the eye-diagram with the maximum eye-opening due to the invention, whereas the FIG. 5 and FIG. 12 shows ICI as there is imperfect crossing at the eye opening, which implies Id presence.

The frequency response of the output of the Phase-Compensated RRC filter 96 (with an impulse source instead of a PN source in FIG. 4) in comparison with that of the 3GPP specified RRC 98 is indicated in FIG. 7. The lower trace shows that of the 3GPP specified RRC filter 98 output and the upper trace shows that of the Phase-Compensated RRC filter 96 output. The adjacent channel rejection of the phase-compensated RRC filter in FIG. 7 is greater than 70dB at +/-2.5MHz (first adjacent channel) offset, and thus satisfies both the UE (User Equipment) minimum adjacent channel selectivity requirement of 33 dB, as well as the BS (Base Station) minimum adjacent channel selectivity requirement of 45 dB.

-22 -The comparative group delay response is shown in FIG. 8, with the lower smoothly changing trace that of the Phase-Compensated RRC filter 96 output and the upper fast changing trace that of the 3GPP specified RRC 98 output.

Note that the Phase-Compensated RRC filter 96 output has a constant group delay in the pass-band like that of the 3GPP specified RRC 98 output. This implies that the Phase-Compensated RRC filter 96 output has a linear phase response -a fundamental requirement of any communication receiver output.

As mentioned previously, the method of designing a digital root raised cosine filter can be applied to both direct conversion receivers and double conversion receivers. In the case of double conversion receivers, additional filters require to be modelled, such as an IF SAW filter. However, the same principles may be applied by inserting the model of the IF filter at the appropriate point in the simulation of the actual right hand side chain of FIG. 3.

The method according to the invention may be carried out on a software simulation tool for ease of design, such as SysternViewTM by Agilent Technologies.

It will be appreciated that, for clarity purposes, the

above description has described embodiments of the

invention with reference to different functional units and processors. However, it will be apparent that any suitable distribution of functionality between different functional units or processors, for example with respect to the network element or controller, may be used without detracting from the invention. For example, it is envisaged that functionality illustrated to be performed by -23 -separate processors or controllers may be performed by the same processor or controller. Hence, references to specific functional units are only to be seen as references to suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organization.

Aspects of the invention may be implemented in any suitable form including hardware, software, firmware or any combination of these. The invention may optionally be implemented, at least partly, as computer software running on one or more data processors and/or digital signal processors. Thus, the elements and components of an embodiment of the invention may be physically, functionally and logically implemented in any suitable way. Indeed, the functionality may be implemented in a single unit, in a plurality of units or as part of other functional units.

Although one embodiment of the invention describes an AP for UMTS network, it is envisaged that the inventive concept is not restricted to this embodiment.

It will be appreciated that, for clarity purposes, the

above description has described embodiments of the

invention with reference to different functional units and processors. However, it will be apparent that any suitable distribution of functionality between different functional units, processors or domains may be used without detracting from the invention. For example, functionality illustrated to be performed by separate processors or controllers may be performed by the same processor or controller. Hence, references to specific functional units are only to be seen as references to suitable means for providing the described -24 -functionality, rather than indicative of a strict logical or physical structure or organization.

Although the invention has been described in connection with some embodiments, it is not intended to be limited to the specific form set forth herein. Rather, the scope of the present invention is limited only by the claims.

Additionally, although a feature may appear to be described in connection with particular embodiments, one skilled in the art would recognize that various features of the described embodiments may be combined in accordance with the invention.

Furthermore, although individually listed, a plurality of means, elements or method steps may be implemented by, for example, a single unit or processor. Additionally, although individual features may be included in different claims, these may possibly be advantageously combined, and the inclusion in different claims does not imply that a combination of features is not feasible and/or advantageous. Also, the inclusion of a feature in one category of claims does not imply a limitation to this -25 -category, but rather the feature may be equally applicable to other claim categories, as appropriate.

Furthermore, the order of features in the claims does not imply any specific order in which the features must be performed and in particular the order of individual steps in a method claim does not imply that the steps must be performed in this order. Rather, the steps may be performed in any suitable order. In addition, singular references do not exclude a plurality. Thus, references to a', an', first', second', etc. do not preclude a plurality.

Claims

-26 - CLAIMS

1. A method of filtering using an adaptive phase-compensated root raised cosine digital filter for a receiver comprising: generating a baseband signal; filtering the baseband signal to produce a transmit pulse shaped signal; splitting the transmit pulse shaped signal into a first transmit pulse shaped signal on a first path and a second transmit pulse shaped signal on a second path; filtering the first transmit pulse shaped signal on the first path with a root raised cosine filter having pre-determined coefficients such that a desired filtered signal is produced; generating a model of an analogue low pass filter, using a scattered parameter (s-parameter) model of the output of the analogue low pass filter with respect to its input; filtering the second transmit pulse shaped, signal on the second path using the generated model of the analogue low pass filter and an adaptive root raised cosine filter to generate an actual filtered signal; and iteratively modifying filter coefficients of the adaptive root raised cosine filter such that the actual filtered signal correlates with the desired filtered signal.

2. The method of filtering according to Claim 1 wherein iteratively modifying filter coefficients of the adaptive root raised cosine filter provides the filter impulse response as a phase compensated representation of the desired impulse response.

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3. The method of filtering according to Claim 1 or Claim 2 wherein the transmit pulse shaped signal is a model of an ideal transmit pulse shaped signal of the baseband signal.

4. The method of filtering according to any preceding Claim wherein the s-parameter model is a two-port network model.

5. The method of filtering according to any preceding Claim wherein s-parameters for the s-parameter model are generated through software synthesis of the low pass filter.

6. The method of filtering according to any of preceding Claims 1 to 4 wherein the s-parameters for the s-parameter model are generated by analysis of an actual hardware low pass filter.

7. The method of filtering according to any preceding Claim wherein the model of an analogue low pass filter is a model of a 6 order elliptic cauer-chebychev baseband filter.

8. The method of filtering according to any preceding Claim wherein filtering the baseband signal comprises using a model of a transmit root raised cosine filter, as defined in 3GPP specification 25.104, for the UE (User Equipment) receiver design.

9. The method of filtering according to any of preceding Claims 1 to 7 wherein filtering the baseband -28 -signal comprises using a model of a transmit root raised cosine filter, as defined in 3GPP specification 25.101, for the BS (Base Station) receiver design.

10. The method of filtering according to Claim 8 or Claim 9 wherein a transmit root raised cosine filter is modelled using a 200 tap filter to approximate an ideal root raised cosine filter.

11. The method of filtering according to any of preceding Claims 1. to 7 wherein the pre-determined coefficients are such that the root raised cosine filter matches the specification of the 3 Generation Partnership Project 25.104, for a UE (User Equipment) receiver design.

12. The method of filtering according to any of preceding Claims 1 to 7 wherein the pre-determined coefficients are such that the root raised cosine filter matches the specification of the 3 Generation Partnership Project 25.101, for a BS (Base Station) receiver design.

13. The method of filtering according to any preceding Claim wherein iteratively modifying filter coefficients comprises iteratively modifying the adaptive root raised cosine filter coefficients until an error signal, equal to a difference between the desired filtered signal and the actual filtered signal, is below a pre-determined error threshold value.

14. The method of filtering according to Claim 13 wherein the pre-determined absolute error threshold value is 10.

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15. The method of filtering according to any of preceding Claims 1 to 12 wherein iteratively modifying filter coefficients comprises iteratively modifying the adaptive root raised cosine filter coefficients using a Feintuch Least Mean Squares (LMS) Finite Impulse Response (FIR) algorithm.

16. The method of filtering according to Claim 15 wherein the Feintuch LMS FIR algorithm specification are: initial filter weights all equal to zero and a feed forward filter having 50 taps and a step size of 0.09.

17. The method of filtering according to any of the preceding Claims 1 to 12 wherein iteratively modifying filter coefficients comprises iteratively modifying the adaptive root raised cosine filter coefficients using a Decision Feedback Equalizer (DFE) with feed-forward coefficients that are adapted using a Normalised Least Mean Squares (NLMS) algorithm.

18. The method of filtering according to Claim 17

wherein the DFE with NLMS adaptation specification

comprise: initial filter weights all equal to zero and a feed forward filter having 50 taps and a step size of 0.09.

19. The method of filtering according to any preceding Claim wherein the receiver is a direct conversion receiver or a double conversion receiver.

20. The method of filtering according to any preceding Claim further comprising: modelling an analogue passive Resistor-Inductor-Capacitor (RLC) baseband filter and -30 -filtering the signal of the second path before the actual filtered signal is generated.

21. The method of filtering according to any preceding Claim further comprising: modelling an Intermediate Frequency Surface Acoustic Wave filter followed by an analogue passive RLC (Resistor-Inductor-Capacitor) baseband filter; and filtering the signal of the second path before the actual filtered signal is generated.

22. A wireless communication unit comprising an adaptive root raised cosine filter adapted according to any of the preceding Claims.

23. A semiconductor device comprising an adaptive root raised cosine filter adapted according to any of preceding Claims 1 to 22.

24. A computer-readable storage element having computer-readable code stored thereon for programming signal processing logic to perform a method for designing a phase-compensated digital root raised cosine filter for a receiver, the code operable for: generating a baseband signal; filtering the baseband signal to produce a transmit pulse shaped signal; splitting the transmit pulse shaped signal into a first transmit pulse shaped signal on a first path and a second transmit pulse shaped signal on a second path; filtering the first transmit pulse shaped signal on the first path with a root raised cosine filter having pre- -31 -determined coefficients such that a desired filtered signal is produced; generating a model of an analogue low pass filter, using a scattered parameter (s-parameter) model of the output of the analogue low pass filter with respect to its input; filtering the second transmit pulse shaped signal on the second path using the generated model of the analogue low pass filter and an adaptive root raised cosine filter to generate an actual filtered signal; and iteratively modifying filter coefficients of the adaptive root raised cosine filter such that the actual filtered signal correlates with the desired filtered signal.

25. The computer-readable storage element of Claim 24, wherein the computer readable storage medium comprises at least one of a hard disk, a CD-ROM, an optical storage device, a magnetic storage device, a ROM (Read Only Memory), a PROM (Programmable Read Only Memory), a EPROM (Erasable Programmable Read Only Memory), a EEPROM (Electrically Erasable Programmable Read Only Memory) and a Flash memory.