GB2447982A - Non-changeable read-out (NCRO) - Google Patents

Non-changeable read-out (NCRO) Download PDF

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GB2447982A
GB2447982A GB0706315A GB0706315A GB2447982A GB 2447982 A GB2447982 A GB 2447982A GB 0706315 A GB0706315 A GB 0706315A GB 0706315 A GB0706315 A GB 0706315A GB 2447982 A GB2447982 A GB 2447982A
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pulse
ferroelectric
magnitude
voltage
polarization
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GB0706315D0 (en
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Daping Chu
Anquan Jiang
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Seiko Epson Corp
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Seiko Epson Corp
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B53/00Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

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Abstract

A method for detecting a polarization state of a ferroelectric device is disclosed, the method comprising applying a voltage waveform to the ferroelectric device and detecting a response of the ferroelectric device to the voltage waveform. The voltage waveform is shaped so that it preserves the initial polarization state of the ferroelectric device, regardless of the initial polarization state. Preferably, the voltage waveform comprises a first pulse and a subsequent second pulse, the polarity of the second pulse being opposite to the polarity of the first pulse and the magnitude of the second pulse being less than the magnitude of the first pulse. Preferably, the magnitude of the first pulse is larger than that of a first dynamic coercive voltage of the ferroelectric device and the duration of the first pulse may be between 1ns and 200 ns. An electronic device comprising a ferroelectric device is also disclosed.

Description

Non-Changeable Read-Out (NCRO) Scheme Ferroelectric random access
memory (FRAM) is a leading candidate for the replacement of current computer memory chips, such as DRAMs, with non-volatile memory chips. The advantages of FRAM are that it enables fast reading and writing of data and that it is highly re-writable, scalable, and compatible with Si technology -either as a stand alone chip or embedded as a part of a system on a chip (SoC). FRAM has attracted considerable research interest because the market potential for non-volatile memory devices is huge.
To bring FRAM into the commercial market, it is necessary to be able to fabricate FRAM cells with sufficient reliability and performance at a reasonable cost. The successful development of FRAM has been limited by the lack of a thorough understanding of the ferroelectric materials in use. As a result, improvements in the properties of ferroelectnc materials (such as fatigue, imprint, and leakage current) to meet device requirements have also been limited. During the past few years, significant progress has been made in understanding the properties of existing ferroelectric materials in terms of switching fatigue, scalability, etc., which has allowed appropriate modifications to be made to the materials to improve their performance. Based on this progress, various different device architectures and process approaches have been proposed and put into practice.
Data storage in a FRAM cell is achieved by polarizing a ferroelectric thin film in one of two opposite polarization directions. The non-volatility of the cell is due to the non-zero remnant polarization of the ferroelectric material making up the thin film. The speed with which data can be written to the cell is limited fundamentally by material properties. For oxides of the perovskite family, sub-nanosecond switching has been demonstrated. However, read-out speed from the cell is usually dependent on the reading method. Numerous schemes have been proposed for the access of data stored in an FRAM cell. They can be classified into two basic categories, namely charge approach methods and field approach methods. Both approaches involve measuring one of the electrical properties of a memory cell, the electrical property being affected directly by the direction and value of the remnant polarization of the memory cell.
At present the read-out approach typically used in commercial FRAM devices is the charge approach. It operates based on the principle that if the binary data stored in a FRAM cell is represented by the direction of ferroelectric polarization of the cell, applying a voltage to switch the ferroelectric polarization to a known direction and then measuring the amount of switching charge produced will reveal the value of the stored data. For example, if a voltage (i-V) is applied to switch a ferroelectric cell to the polarization direction representing "0", the polarization direction in the cell will either remain unchanged if the stored data was "0" or be flipped to the opposite direction if the stored data was "I". There will be minimal switching charge produced in the first case ("0" to "0"), but a significant amount of switching charge produced in the second case ("I" to "0"). A sketch of a ferroelectric hysteresis curve and a voltage pulse applied in the above read operation are shown in Fig. 1.
In the graph of Fig. I, P is the polarization of a ferroelectric device and V is the applied voltage. The read pulse is a square wave pulse having a magnitude of V and a duration oft1 -to.
Typically the charge approach read-out scheme is physically realised by a FRAM cell comprising one transistor 2 and one ferroelectric capacitor 4 (IT/IC) as shown in Fig. 2. This circuit structure effectively uses a ferroelectric capacitor 4 in place of the normal capacitor in a conventional DRAM cell. There are many other variations, such as two transistors and two capacitors (2T/2C), based on the same principle. Variants of the 2T/2C circuitry are often employed to minimize possible errors introduced by non-uniformity in the size of the ferroelectric capacitors.
The method of operation of the iT/IC cell shown in Fig. 2 is as follows. To perform a write operation to write data "0", line WL is driven high, i.e. at a positive voltage, to switch the transistor 2 on, line BL is driven high and line CF is driven low. To write data "I", line WL is driven high, line BL is driven low and line CF is driven high. Hence, the write operation switches the polarization of the ferroelectric capacitor 4 to the state corresponding to the desired data value. To perform a read operation, line WL is driven high, line CF is driven high and line BL is kept floating, the voltage on BL being read out to determine the value of the stored data. As mentioned above, the stored data may or may not be altered by the read operation, depending on the original value of the stored data.
it is clear that the conventional FRAM charge approach to accessing data stored in the cell is a destructive read-out (DRO) scheme, statistically about 50% of accessed data will be affected. Therefore, it is essential to detect whether the stored data in a cell has been altered during the operation and start a write-back operation if so. This at present cannot be realized at device level. 11 requires not only additional and rather complicated circuitry but also several extra operation steps, which elongate the time needed to complete a full read cycle considerably.
Furthermore, such a DRO scheme will result in fatigue of the ferroelectric material through reading. To reduce degradation of the ferroelectric material due to reading fatigue or the fatigue phenomenon in general, various complicated electrode structures have been used.
These electrode structures unavoidably drive up the fabrication cost of the device. Little has been done to tackle the DRO problem, which has appeared to be an intrinsic property of the charge approach.
Scaling down the size of the ferroelectric capacitor for large-scale integration is also a problem in practice. It has been demonstrated that a square-shaped ferroelectric capacitor having a side length of less than 100 nm can retain its polarization value. However, at this scale the corresponding switching charge, which is proportional to the capacitor area, becomes too small to detect with a comfortable margin. Using three-dimensional capacitors, which can produce a large capacitor area on a relatively small footprint, has been considered as a solution to this problem.
The field approach to accessing data stored in a FRAM cell relies on determining the State of a stored bit by measuring a quantity which is sensitive to the field or the field changes induced by different directions of polarization of the ferroelectric cell. For example, if a ferroelectric material is used instead of silicon oxide as a gate dielectric in a field effect transistor, to form a ferroelectric field effect transistor (FFET), the direction of polanzation of the ferroelectric material determines whether the channel of the FFET is in the ON state or the OFF state. Hence, when a current is supplied to the source of the FFET, the level of the drain current of the FFET depends on the direction of polarization. This idea was first proposed in the 1950's using bi-polar transistors. Subsequently, many variants have been suggested.
The field approach has many advantages. The FFET is simple, small in size and suitable for high density integration. The basic cell can include only one transistor, IT, instead of IT/IC or 2T/2C as in the charge approach. More importantly, the read operation does not need to alter the information stored in the cell, achieving non-destructive read-out (NDRO).
However, there are two major problems associated with the operation of the FFET in the field approach. Firstly, the power consumption of the FFET is high during read-out when the channel is in the ON state. Secondly, a high voltage is needed to write data, i.e. switch the polarization of the cell, when the channel is in the OFF state.
The first problem can be solved by using two FFETs in an inverter configuration as a basic cell, i.e. a 2T cell, so that the current sensing read-out operation is converted into a voltage sensing operation with greatly reduced power consumption. However, the size of the basic cell is doubled to 2T in this case, which is not desirable. Overcoming the second problem has proved difficult. One possibility is using a carefully designed multi-layer stack in place of the simple single ferroelectric layer, whereby a polarization voltage difference for different polarization directions (due to an asymmetric arrangement of materials having different work functions) is used to compensate for the voltage difference in writing between the ON and OFF states. However, this inevitably leads to an increase in the complexity and cost of the memory device.
A further serious hurdle in the fabrication of a FFET is depositing a ferroelectric thin film on silicon (or the other way around when a back gate structure is employed) to produce a good quality interface, in order to minimize the numbers of interfacial states and defects. This leads to a related problem in the retention performance of the memory device. At present, the information stored in a FFET device can only be kept for a few weeks.
According to a first aspect of the present invention, there is provided a method for detecting a polarization state of a ferroelectric device comprising: applying a voltage waveform to the ferroelectric device; and detecting a response of the ferroelectric device to the voltage waveform; wherein the voltage waveform is shaped so that it preserves the initial polarization state of the ferroelectric device, regardless of the initial polarization state.
The present invention provides a new method for performing read-out from a ferroelectric memory device using the charge approach. The invention has the advantage that the information stored in the memory device remains unchanged by the read-out operation.
The invention achieves this within a single ferroelectric device by using a specially designed single waveform, which writes the original stored information back into the memory device automatically if the data has been altered during read-out. This removes the need for additional write-back circuitry in the device and reduces the time required to perform a read cycle, i.e. to read data from the memory device and write it back.
Preferably, the voltage waveform comprises a first pulse and a subsequent second pulse, the polarity of the second pulse being opposite to the polarity of the first pulse and the magnitude of the second pulse being less than the magnitude of the first pulse. This waveform shape is particularly effective for producing a response from the ferroelectric device allowing its polarization state to be detected while preserving its polarization state, due to the dynamic imprint effect.
Suitably, the magnitude of the first pulse is larger than that of a first dynamic coercive voltage of the ferroelecti-jc device, the first dynamic coercive voltage having the same polarity as the first pulse. Preferably, the magnitude of the second pulse is larger than that of a second dynamic coercive voltage of the ferroelectric device, the second dynamic coercive voltage having the same polarity as the second pulse.
Suitably, the magnitude of the second pulse is smaller than or equal to a second quasi-static coercive voltage of the ferroelectric device, the second quasi-static coercive voltage having the same polarity as the second pulse.
Preferably, the duration of the second pulse is longer than that of the first pulse.
In one embodiment, the waveform satisfies: 0.5 = (T1.V,) / (T2.V2) = 2 wherein T1 is the duration of the first pulse, V1 is the magnitude of the first pulse, T2 is the duration of the second pulse and V2 is the magnitude of the second pulse.
Preferably, the first and second pulses are square wave pulses.
Suitably, the duration of the first pulse is between I ns and 200 ns. Conveniently, the duration of the second pulse is between 2 ns and 400 ns.
Suitably, the magnitude of the first pulse is between 0.2 V and 10 V. Preferably, the magnitude of the second pulse is between 0.1 V and 5 V. Suitably, there is a time gap between the end of the first pulse and the start of the second pulse. Preferably, the duration of the time gap is between 0 ns and 300 ns.
In one embodiment, there is provided a method for reading a FRAM cell comprising a method as described above.
Preferably, the method as described above further comprises a step of calculating the polarization state of the ferroelectric device based on the response.
In a second aspect of the present invention, there is provided an electronic device comprising: a ferroelectric device; a voltage generator adapted to apply a voltage waveform to the ferroelectric device; and a detector adapted to detect a response of the ferroelectric device to the voltage waveform; wherein the voltage waveform is shaped so that it preserves the initial polarization state of the ferroelectric device, regardless of the initial polarization state.
The above apparatus is able to perform read-out from a ferroelectric memory device using the charge approach, while preserving the polarization state of the memory device. This is achieved by providing a voltage generator adapted to apply a specially designed waveform to the memory device, the waveform being shaped in such a way as to preserve the polarization state of the memory device.
Preferably, the voltage waveform comprises a first pulse and a subsequent second pulse, the polarity of the second pulse being opposite to the polarity of the first pulse and the magnitude of the second pulse being less than the magnitude of the first pulse.
Suitably, the electronic device further comprises a processing unit adapted to calculate the polarization state of the ferroelectric device based on the response.
Embodiments of the present invention will now be described by way of further example only and with reference to the accompanying drawings, in which: Fig. I shows a ferroelectric hysteresis curve and a voltage pulse used in a Conventional read operation in a ferroelectric memory device.
Fig. 2 shows a schematic circuit diagram of a conventional IT/IC FRAM cell.
Fig. 3 shows a typical ferroelectric thin film capacitor and charge distributions during a polarization switching process.
Fig. 4 shows charge distributions in a ferroelectric thin film structure and the corresponding ferroelectric hysteresis curves measured under quasi-static (top) and dynamic (bottom) conditions respectively.
Fig. 5 shows hysteresis curves measured for a PtIPZTN( 1 5Onm)/Pt structure under quasi-static (triangle) and dynamic (circle) imprint conditions, respectively.
Fig. 6 shows hysteresis curves for a ferroelectric device under dynamic and quasi-static imprint conditions and a read-out voltage waveform according to the present invention.
Fig. 7 shows an experimental circuit for testing the read-out voltage waveform of the present invention.
Fig. 8 shows the output voltage over time during a read operation which alters the stored data, using the voltage waveform of the present invention. The inset shows the voltage waveform used.
Fig. 9 shows the output voltage over time during a read operation which does not alter the stored data, using the voltage waveform of the present invention. The inset shows the voltage waveform used.
Fig. 10 shows data signal levels for the "I" and "0" states of stored data over repeated read cycles, using the voltage waveform of the present invention.
In order to explain the principles on which the present invention is based, the quasi-static and dynamic imprint effects must first be defined. These effects Occur when the polarization of a ferroelectric component is switched.
Fig. 3 shows a typical ferroelectric capacitor structure and the charge equilibrium process in the capacitor structure over the course of a polarization switching process. The ferroelectric capacitor structure consists of a top electrode 12, a layer 10 of ferroelectric material (e.g. PZT or SBT), a bottom electrode 8 and a substrate 6.
The imprint effect in a ferroelectric device is due to the existence of an additional internal electrical field, the imprint field, induced by preferential charge storage in the ferroelectric device. This preferential charge storage is a result of the asymmetry in charge distribution at a given polarization direction. In other words the preferential charge storage is an imprint of a polarization configuration of the device. It can occur within an apparently symmetrical structure. It is obviously difficult to measure such an electric field directly, as normally all that can be measured is the overall external field applied across a film.
The above mentioned asymmetric, preferentially stored charges formed in a ferroelectric capacitor structure are not a direct contribution of the ferroelectric dipoles.
Instead, they originate from the electrodes and are injected from the electrodes into the ferroelectric layer, driven by the electric field established between the polarization charge near one surface of the ferroelectric layer and the screening charge of opposite sign in the corresponding electrode. Consequently, the charges injected from the electrodes at the two sides of a ferroelectric layer are of opposite signs. The sign configuration, which is determined by the polarization dircction, results in injected charges of a preferred sign being stored at a given side of the ferroelectric layer. In Fig. 3, the preferentially stored charges and the screening charges are the charges on the ferroelectnc film side and the electrode side of the interfaces between the ferroelectric layer and the electrodes, respectively. The timescale of charge and discharge for these two charges can be very different from the timescale of ferroelectric dipole switching. As shown in Fig. 3, the preferentially stored charges may remain in their original configuration for some time after the polarization of the ferroelectric layer is switched.
Consequently, the ferroelectric hysteresis curve of a device will differ due to the imprint effect, depending on whether it is measured under what are referred to as quasi-static or dynamic conditions (see Fig. 4). Quasi-static conditions occur when a sufficient time elapses between switching events for preferentially stored charges to reach an equilibrium ora steady state, when measurements are done after multiple switching events, or when preferentially stored charges have been removed from the ferroelectric. Dynamic conditions occur in measurements of a series of switching events when the time between switching events is insufficient for preferentially stored charges to reach an equilibrium or a steady state.
In the quasi-static case, the distribution of preferentially stored charges is assumed to be in a stationary or near-equilibrium state at all times, so that repeated bi-polar switching measurements will produce almost identical hysteresis curves of an asymmetric nature. This effect is called the quasi-static imprint effect. The operation of the quasi-static impnnt effect is shown in the upper sequence of charge distribution diagrams in Fig. 4, resulting in the upper hysteresis curve of Fig. 4.
In contrast, under dynamic conditions the charge distribution is not in an equilibrium state at all times, and the hysteresis curve of the first switching event measured in a sequence of switching events can be different from the hysteresis curves of the other switching events.
This effect is called the dynamic imprint effect. The operation of the dynamic imprint effect is shown in the lower sequence of charge distribution diagrams in Fig. 4, resulting in the lower hysteresis curve of Fig. 4. Fig. 4 shows a switching event that does not immediately follow another switching event, i.e. an isolated switching event or the first in a series.
Comparing the two hysteresis curves shown in Fig. 4, it can be seen that the dynamic imprint effect causes the lower hysteresis curve to shift to the right, and hence reduces the magnitude of the negative voltage required to switch from the upper (positive polarization) state to the lower (negative polarization) state.
An example of hysteresis curves measured from a PZTN sample having a thickness of I SOnm under both static and dynamic conditions is shown in Fig. 5. It can be seen that the hysteresis curve affected by the dynamic imprint effect (marked by circles on the graph) is shifted considerably towards one side, relative to the hysteresis curve under quasi-static conditions. This results in the magnitude of the first apparent coercive voltage Vc' (positive in this case) being about twice that of the second apparent coercive voltage Vc2" (negative in this case), i.e. J Vc' I 2 I V2 I and V' I > I Vc0 I > I Vc2 1, where I Vc0 I is the magnitude of the apparent coercive voltage under quasi-static conditions.
Conventionally, the dynamic imprint effect has been ignored when measuring the properties of ferroelectric devices, measurements either being averaged over many switching events so that no dynamic imprint effect is seen, or being taken after one or more large preset pulses have been applied, which has the effect of removing preferentially stored charges. I0
In developing the present invention, it has been found that by exploiting the dynamic imprint effect the read and write-back process for a ferroelectric device can be considerably simplified. Specifically, it has been found that a single waveform can be used to perform a read operation and carry out, at the same time, a selective automatic data write-back if the data (represented by the direction of polarization of a ferroelectric material) is altered during the read operation.
In the preferred embodiment of the invention, a voltage waveform containing a read pulse and a subsequent write-back pulse is used to perform a read operation, as shown in Fig. 6. The magnitude of the read pulse V1 is chosen to be larger than that of the first apparent coercive voltage (i.e. I I > I V'' I). Furthermore, the write-back pulse is a voltage pulse V2 of opposite sign to the read pulse, the write-back pulse having a magnitude larger than the second apparent coercive voltage but smaller than or equal to the quasi-static coercive voltage (i.e. I V I = I V2 I > I V2 I), as illustrated in Fig. 6.
In practice, a voltage significantly higher than the relevant coercive voltage is usually required to switch the polarization of a ferroelectric device. Accordingly, the magnitude of the read pulse of the embodiment is higher than the relevant dynamic coercive voltage.
If applying a given first pulse switches the polarization of a ferroelectric matenal(e.g.
from "1" to "0"), the polarization can be switched back to its original direction (from "0" to "I ") by applying a second pulse of opposite sign soon after the first pulse. The invention is based on the realization that the required magnitude of the second pulse to switch the polarization back immediately after the first switching event is smaller than the magnitude of the quasi-static coercive voltage of the ferroelectric device. This is due to the dynamic imprint effect discussed above. On the other hand, if the first pulse does not result in a polarization switch (e.g. "0" to "0"), the ferroelectric material will still be in a quasi-static state and the second pulse will not be sufficient to alter the polarization direction unless its magnitude is larger than that of the quasi-static coercive voltage. In other words, the second pulse alters the polarization direction of a ferroelectric device only if its polarization direction has been just been altered by the first pulse.
As a result, when the voltage waveform of the embodiment is applied to a ferroelectric device, it will either switch the polarization of the ferroelectric device with the first pulse and
II
subsequently switch the polarization back with the second pulse, or leave the polarization unchanged with both of the first and second pulses, depending on the original polarization of the ferroelectric device. In either case, the original polarization of the ferroelectric device is preserved, enabling non-changeable read-out (NCRO) to be performed by detecting whether or not the polarization was switched by the first pulse.
The inventors have discovered that although the absolute shifts in the coercive voltages of a ferroelectric device due to the dynamic imprint effect are small, these shifts lead to a relatively large shift in the ratio of the dynamic coercive voltage that is smaller in magnitude to the corresponding quasi-static coercive voltage. This allows the second, write-back, pulse of the present invention to be set to a level that reliably writes back data after a read-induced polarization switch but that does not switch the polarization of the device when the device is in a quasi-static or an un-altered state.
In the waveform shown in Fig. 6, a time gap exists between the read pulse and the write-back pulse. It is not necessary for this gap to be present in the waveform, and if there is a gap it is preferably short compared to the duration of the pulses in order to keep the duration of the whole read cycle to a minimum and to ensure that the dynamic imprint effect occurs.
For example, a gap of around 50 ns can be used. However, it has been found that the read-out waveform of the embodiment can still be effective with much longer time gaps.
To test the above non-changeable read-out concept, the voltage drop on a reference resistor generated by a switching current from a ferroeleciric capacitor structure was measured. The experimental set-up is illustrated in Fig. 7. The set-up consists of a voltage source section 14, a test circuit section 16 and a detection section 18. The reference resistance in this case is Rri = 50 =, and a Pt/PZTNIPt capacitor structure was used as the ferroelectric device.
The source section 14 includes a power source producing a varying voltage V and having an internal resistance Rso. The power source is connected across the test circuit section 16, which comprises a ferroelectric capacitor structure and a reference resistor having resistance R,1. The detection circuit 18 is connected in parallel across the reference resistor.
The detection circuit 18 is represented by a capacitance Cos connected in parallel with a I? resistance Ros. The overall reference resistance R0 is thus given by the formula R0 I I (I/Rrci+ 1/Ros).
As an example, a read-out waveform consisting of a 100 ns pulse of V1 = +2.4 V followed by a 200ns pulse of V2 = -1.6 V was applied to the ferroelectric device by the power source in the test. The voltage drops on R0, V(R0), were recorded for the cases of a read operation which alters the stored data (a read of a "1" state, switching from "1" to "0") and a read which does not alter the stored data (a read of a "0" state, remaining at "0"), as shown in Figs. 8 and 9 respectively. The value of V(R) at a certain moment in time provides a representation of the stored data. In this case it can be seen that V(R0) at t 150 ns, as indicated by the arrows in the figures, differs depending on whether the "I" state or the "0" state is read, the values of V(R0) being about 0.25 V and 0.05 V respectively.
Referring to Fig. 8, the read-out waveform applied to the ferroelectric is shown in the inset. The start of the first pulse occurs at 100 ns on the V(R0) graph. Hence, the peak in V(Ro) at around 100 ns corresponds to the start of the first pulse applied to the ferroclectric, and represents a current charging the capacitance of the ferroelectric. The approximately flat portion of the graph following the first peak represents a current supplying the switching charge of the ferroelectric, i.e. making up the difference in charge distribution between the twopolarization states of the ferroelectric (see Fig. 3). The size of this switching charge, and hence the value of V(R0) in this first switching charge portion of the read-out, indicates whether the polarization of the ferroelectric has been switched by the first pulse. In Fig. 8, the polarization of the ferroelectric is switched by the first pulse so that the value of V(Ro) in the switching charge portion of the graph is relatively large at around 0.25 V. In contrast, Fig. 9 shows the situation in which the polarization of the ferroelectric is not switched by the first pulse, and accordingly the switching charge portion of the graph in Fig, 9 has a relatively small value at around 0.05 V. As will be appreciated, whether or not the polarization of the ferroelectric is switched by the first pulse depends on the initial polarization of the ferroelectric, which in turn defines the value of the data stored in the ferroelectric. In this case, the polarization state in which the polarization is switched by the first pulse is defined as a data value of"l", and the opposite polarization state is defined as "0". Thus, Fig. 8 shows a V(R) read-out representing a data value of"l".
The negative yeak in V(Ro) shown in Fig. 8 at around 200 ns corresponds to the end of the first pulse, and represents a discharge current from the capacitance of the ferroelectric.
This peak subsides in the 50 ns between the first and second pulses (see inset). The subsequent negative peak at around 250 ns corresponds to the start of the second pulse, and represents a charging of the capacitance of the ferroelectric, similar to the first peak in the graph. There follows a flattened portion representing a switching charge, similar to the first switching charge portion. It can be seen from the presence of this second switching charge portion that the second pulse has changed the polarization of the ferroelectric, despite having a much smaller magnitude than the first pulse. The polarization of the ferroelectric is returned to its original state by the second pulse. Hence, the original data is written back into the ferroelectric automatically by the read-out process. In this embodiment, the second pulse has a longer duration than the first so as to supply a switching charge to the ferroelectric that is roughly equal to the switching charge supplied by the first pulse. The peak in V(Ro) at around 450 ns corresponds to the end of the second pulse and represents a discharge current from the capacitance of the ferroelectric.
As can be seen from the dotted line in Fig. 8 showing the V(R0) read-out after lO read-out cycles, accurate read-out is still possible after this many repetitions.
The peaks in the V(R0) read-out shown in Fig. 9 correspond to those in Fig. 8, with the exception that the voltages around t = 150 ns and t = 300 ns, i.e. in the first and second switching charge portions, are greatly reduced: This indicates that the polarization of the ferroelectnc is not switched by either of the first and second pulses, representing a data value of"0". As explained above, when the polarization of the ferroelectric is not switched by the first pulse, it remains in a static state and the dynamic imprint effect does not occur. Thus, the smaller second pulse is not sufficient to switch the polarization of the ferroelectric in this case. As in the read-out process illustrated by Fig. 8, the polarization of the ferroelectric remains in its original state after the read-out process is complete. It can be seen that the read-out waveform leaves the ferroelectric polarization unchanged, regardless of the original polarization state of the ferroelectric.
In practice, a processing unit could be coupled to the output of the detection Section, the processing unit being adapted to calculate the value of the data stored in the ferroelectric automatically, based on V(Ro). Such a processing unit can be implemented in software or hardware.
To confirm that the read-out waveform does not alter the stored data, read operations were performed repeatedly for each of the two data states, "0" and"!", as shown in Fig. 10.
The V(R0) voltage levels shown in Fig. 10 are those in the first switching charge portions of the V(R0) curves shown in Figs. 8 and 9. No obvious degradation can be seen in the output signal levels up to i05 cycles, the full range of the test.
It will be appreciated that the shape of the read voltage waveform is not limited to that described above. The most appropriate shape for the voltage waveform for a given application will depend on the ferroelectric material used in the ferroelectric device, and particularly on the coercive voltages of the material. The variables, such as the voltage, ramping rate and duration for each pulse and arrangement of pulses, can all be optimized separately or collectively according to the device properties and circuitry performance.
Similarly, the output signal used for actual identification of the data stored ("1" or"0") is not limited to that during the first pulse. The output during the second pulse or the combination of the outputs during the first and second pulses can be equally effective.
The aforegoing description has been given by way of example only and it will be appreciated by a person skilled in the art that modifications can be made without departing from the scope of the present invention.

Claims (19)

  1. I. A method for detecting a polarization state of a ferroelectric device comprising: applying a voltage waveform to the ferroelectric device; and detecting a response of the ferroelectric device to the voltage waveform; wherein the voltage waveform is shaped so that it preserves the initial polarization state of the ferroeleciric device, regardless of the initial polarization state.
  2. 2. A method according to claim I, wherein the voltage waveform comprises a first pulse and a subsequent second pulse, the polarity of the second pulse being opposite to the polarity of the first pulse and the magnitude of the second pulse being less than the magnitude of the first pulse.
  3. 3. A method according to claim I or claim 2, wherein the magnitude of the first pulse is larger than that of a first dynamic coercive voltage of the ferroelectric device, the first dynamic coercive voltage having the same polarity as the first pulse.
  4. 4. A method according to any of claims I to 3, wherein the magnitude of the second pulse is larger than that of a second dynamic coercive voltage of the ferroelectric device, the second dynamic coercive voltage having the same polarity as the second pulse.
  5. 5. A method according to any of claims I to 4, wherein the magnitude of the second pulse is smaller than or equal to a second quasi-static coercive voltage of the ferroelectric device, the second quasi-static coercive voltage having the same polarity as the second pulse.
  6. 6. A method according to any of claims I to 5, wherein the duration of the second pulse is longer than that of the first pulse.
  7. 7. A method according to claim 6, wherein the waveform satisfies: 0.5 = (T.V1) / (T2.V2) = 2 Wherein T1 is the duration of the first pulse, V1 is the magnitude of the first pulse, T2 is the duration of the second pulse and V2 is the magnitude of the second pulse.
  8. 8. A method according to any of claims I to 7, wherein the first and second pulses are square wave pulses.
  9. 9. A method according to any of claims I to 8, wherein the duration of the first pulse is between I ns and 200 ns.
  10. 10. A method according to any of claims I to 9, wherein the duration of the second pulse is between 2 ns and 400 ns.
  11. 11. A method according to any of claims I to 10, wherein the magnitude of the first pulse is between 0.2 V and 10 V.
  12. 12. A method according to any of claims I to 11, wherein the magnitude of the second pulse is between 0.1 V and 5 V.
  13. 13. A method according to any of claims Ito 12, wherein there is a time gap between the end of the first pulse and the start of the second pulse.
  14. 14. A method according to claim 13, wherein the duration of the time gap is between 0 ns and 300 ns.
  15. 15. A method for reading a FRAM cell comprising a method according to any of claims I to 14.
  16. 16. A method according to any of claims Ito 15, further comprising a step of calculating the polarization state of the ferroelectric device based on the response.
  17. 17. An electronic device comprising: a ferroelectric device; a voltage generator adapted to apply a voltage waveform to the ferroelectric device; and a detector adapted to detect a response of the ferroelectric device to the voltage waveform; wherein the voltage waveform is shaped so that it preserves the initial polarization state of the ferroelectric device, regardless of the initial polarization state.
  18. 18. An electronic device according to claim 17, wherein the voltage waveform comprises a first pulse and a subsequent second pulse, the polarity of the second pulse being opposite to the polarity of the first pulse and the magnitude of the second pulse being less than the magnitude of the first pulse.
  19. 19. An electronic device according to claim 17 or claim 18, further comprising a processing unit adapted to calculate the polarization state of the ferroelectric device based on the response.
GB0706315A 2007-03-30 2007-03-30 Non-changeable read-out (NCRO) Withdrawn GB2447982A (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5114284A (en) * 1974-07-25 1976-02-04 Takeshi Katakura X senterebijonnyoru tasodansozono juzohoshiki
WO1999012170A2 (en) * 1997-08-15 1999-03-11 Thin Film Electronics Asa A ferroelectric data processing device
JP2005085431A (en) * 2003-09-11 2005-03-31 Matsushita Electric Ind Co Ltd Ferroelectric memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5114284A (en) * 1974-07-25 1976-02-04 Takeshi Katakura X senterebijonnyoru tasodansozono juzohoshiki
WO1999012170A2 (en) * 1997-08-15 1999-03-11 Thin Film Electronics Asa A ferroelectric data processing device
JP2005085431A (en) * 2003-09-11 2005-03-31 Matsushita Electric Ind Co Ltd Ferroelectric memory device

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