GB2445980A - Calibration method for a synthesizer-based signal generator - Google Patents

Calibration method for a synthesizer-based signal generator Download PDF

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Publication number
GB2445980A
GB2445980A GB0701494A GB0701494A GB2445980A GB 2445980 A GB2445980 A GB 2445980A GB 0701494 A GB0701494 A GB 0701494A GB 0701494 A GB0701494 A GB 0701494A GB 2445980 A GB2445980 A GB 2445980A
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United Kingdom
Prior art keywords
frequency
range
sub
output frequencies
frequencies
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Granted
Application number
GB0701494A
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GB0701494D0 (en
GB2445980B (en
Inventor
Niels-Henrik Lai Hansen
Per Ankerstjerne
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Motorola Solutions Inc
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Motorola Inc
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Priority to GB0701494A priority Critical patent/GB2445980B/en
Publication of GB0701494D0 publication Critical patent/GB0701494D0/en
Priority to PCT/US2007/078720 priority patent/WO2008091404A1/en
Publication of GB2445980A publication Critical patent/GB2445980A/en
Application granted granted Critical
Publication of GB2445980B publication Critical patent/GB2445980B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/095Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using a lock detector

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  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

A signal generator apparatus (100) comprises a controller (102) coupled to a VCO oscillator circuit (122). The oscillator circuit (122) covers a range of output frequencies. In order to maintain low gain and hence minimize noise over the range of output frequencies, the frequency range is divided into a number of frequency windows or sub-ranges. Adjacent sub-ranges overlap at a crossover frequency. The system is arranged to scan at least part of the range of output frequencies and calculate a crossover frequency. The boundaries of the frequency windows are detected by monitoring a lock condition of frequency synthesizer (112). Thus, in contrast to prior art where crossover frequencies are identified and stored during manufacture, boundaries between frequency sub-ranges are found in use by a calibration routine (fig.2).

Description

-1 -2445980
SIGNAL GENERATOR APPARATUS AND METHOD OF CALIBRATION
THERE FOR
Field of the Invention
This invention relates to a controlled oscillator of the type that, for example, employs a first frequency sub-range and a second frequency sub-range to serve an overall output frequency range. This invention also relates to a method of calibrating a controlled oscillator.
Background of the Invention
Voltage Controlled Oscillators (VCOs) are employed in numerous communications circuits in order to vary an oscillating output signal by varying an input voltage signal. An example of an application of a VCO is a base station or node B of a communications network, where an RF output signal has to be varied in frequency.
In order to maintain low gain and hence minimise noise over a frequency range of operation of a VCO, the frequency range is divided into a number of frequency windows, each window corresponding to a frequency sub-range of the frequency range of operation of the VCO.
Adjacent frequency sub-ranges overlap, the frequencies of overlap being known as "crossover" frequencies. The frequency windows are switched in and out of operation depending upon the frequency required as a result of the input voltage signal, thereby shifting the frequency of operation of the VCO.
In known VCOs, the crossover frequencies are identified using external test equipment during manufacture in a factory and stored in a memory that is, typically, part of a control circuit for the VCO. However, due to the tolerances of values of components used as part of the VCO, shifts in the crossover frequencies occur with temperature changes and/or age of the components.
Summary of the Invention
According to the present invention, there is provided a signal generator apparatus and a method of calibrating a signal generator apparatus as set forth in the appended 1.5 claims.
Brief Description of the Drawings
At least one embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, in which: FIG. 1 is a schematic diagram of a signal generator apparatus for use in relation to an embodiment of the invention; FIG. 2 is a flow diagram of operation of the apparatus of FIG. 1; FIG. 3 is a graph of provision of optimum margins; and FIG. 4 is a graph of adjacent windows of frequencies.
Description of Preferred Embodiments
Throughout the following description identical reference numerals will be used to identify like parts.
Referring to FIG. 1, a signal generator apparatus 100 comprises a controller 102. In this example, the controller is a microprocessor, and has a control signal output 104, a lock-detect input 106, a steering line input 108 and a window control output 110. The controller 102 is coupled to a frequency synthesizer 112: the frequency synthesizer 112 has a control signal input 114 coupled to the control signal output 104, and a lock-detect output 116 coupled to the lock-detect input 106.
The frequency synthesizer 112 also has a voltage control output 118 and a Radio Frequency (RF) feedback input 120.
The controlled oscillator apparatus 100 also comprises a Voltage Controlled Oscillator (VCO) circuit 122 having a voltage control input 124 and an RF feedback output 126.
The voltage control input 124 is coupled to the voltage control output 118 and the RF feedback output 126 is coupled to the RF feedback input 120. The VCO circuit 122 also has a generated signal output 128 and a window control input 130.
The window control input 130 of the VCO 122 is coupled to the window control output 110 of the controller 110 by a data bus 132. In this example, the data bus 132 is a 4-line bus supporting 16 binary-addressed window numbers.
The voltage output 118 of the frequency synthesizer 112 is also coupled to an analogue input 134 of an Analogue-to-Digital Converter (ADO) 136 via a steering line 138.
The ADC 136 also has a digital output 14 coupled to the steering line input 108 of the controller 102.
The signal generator apparatus 100 has two modes of operation: a, first, calibration or tuning mode; and a, second, signa] generation mode. Operation in the signal generation mode of the signal generator apparatus 100 is a known operating mode and does riot relate to the operation of the at least one embodiment described herein. Therefore, for the sake of clarity and conciseness of description, the second mode of operation will only be described insofar as is necessary to understand the features of the first mode of operation.
In the second mode of operation of operation, the VCO 122 is capable of outputting an RF output signal within an overall, broad range of frequencies for example between about 300 MHz and about 500 MHz, such as about 350 MHz and about 430 MHz. To achieve output of the range of frequencies, the range of frequencies is divided into a number of overlapping adjacent serial sub-ranges of frequencies, or frequency "windows". The frequency sub-range that needs to be used in response to a frequency of an input signal (not shown) is selected by the controller 102 and communicated to the VCO 122 via the data bus 132.
Responsive to the communicated sub-range of frequencies, the VCO 122 operates in the selected sub-range of frequencies by virtue of switching of internal circuitry within the VCO 122.
In operation of the first mode, the signal generator apparatus 100 is powered-up, whereupon the controller 102 initiates the calibration of the signal generator apparatus 100. In this respect, the purpose of the calibration mode is to identify an overlap or crossover frequency in respect of neighbouring sub-ranges of frequencies.
Referring to Fig. 2, after powering-up, the controller 102 initialises (Step 200) a window counter, setting the window counter to a value of unity indicative of a first sub-range of frequencies or window and sends a control signal to the VCO 122 to operate in the first window via the data bus 132. The controller 102 also sets (Step 202) a frequency increment step size, f, and a starting frequency, f.
Thereafter, the controller 102 sets the frequency synthesizer 112 to the starting frequency, and monitors (Step 204) a lock-detect signal at the lock-detect input 106. If no lock of the VCO 122 to the starting frequency, f, is detected by the frequency synthesizer 112, the controller 102 increases (Step 206) the frequency demanded, f, of the frequency synthesizer 112 by the frequency increment step size, 1sf, i.e. f-= f i-f. The frequency demanded, fd, of the frequency synthesizer 112 is repeatedly incremented using the above-described technique until the frequency synthesizer 112 has detected lock by the VCO 122 onto the frequency currently demanded of the frequency synthesizer 112 by the controller 102.
Upon detection of the lock by the frequency synthesizer 112 as communicated to the controller 102, the controller 102 records (Step 208) the frequency currently demanded, f1, of the VCO 122, which has resulted in the frequency lock detection, as a first boundary frequency, fj, of the first window. The controller 102 then continues to increment (Step 210) the frequency demanded, f1, of the frequency synthesizer 112 by the frequency increment step size, Af. Meanwhile, or subsequently, the controJler 102 verifies that frequency lock has been maintained (Step 212) and continually increments the frequency demanded, f, of the frequency synthesizer 112, by the frequency increment step size, Af (Step 210) in the manner described above until loss of frequency lock is communicated to the controller 102 by the frequency synthesizer 112. Upon detection of the loss of frequency lock, the controller 102 records (Step 214) a second boundary frequency, f, for the first window corresponding to a frequency demanded, f, of the frequency synthesizer 112 that immediately preceded the frequency demanded and resulted in the loss of frequency lock, i.e. f + Af + A2f + . . . + Af + Arf -Arf, where Af is the last frequency increment applied and resulted in the loss of frequency lock.
In order to provide optimum margin for a voltage control signal, known as a steering line voltage, with respect to minimum and maximum limits of the voltage control signal, crossover frequencies are set with respect to a median level between the minimum and maximum limits of the voltage control signal. Hence, an optimum crossover frequency between two adjacent windows lies between frequencies corresponding to optimum margins for each of the adjacent windows. Referring to FIG. 3, the controller 102 therefore then scans the first window between the first and second boundary frequencies for the first window, f],j, 2,], in order to identify a mid-point frequency, fm, corresponding to a voltage control signal that lies substantially equally between the minimum and maximum limits of the voltage control signal. The voltage control signal is monitored by the controller 102 via the steering line input 108 and the ADO 136.
The controller 102 then determines (Step 218) whether all windows have been scanned. If windows remain to be scanned, the value of the window counter is incremented (Step 220) by units and the new window selected is implemented by the VCO 122 by communication of the value of the window counter to the VCO 122 by the controller 102 via the data bus 132. The above-described scanning steps (Steps 202 to 218) are then repeated in respect of the second window, resulting in storage of a second mid-point frequency, fm,, in respect of the second window.
Furthermore, the above-described steps are repeated in respect of all windows.
Once all windows have been scanned, the controller 102 then calculates (Step 222) crossover frequencies for adjacent windows by calculating bisector frequencies between neighbouring mid-point frequencies stored. For example, in respect of the first and second windows shown in FIG. 3, the crossover frequency between the first and second windows is: fc = (fm2 + fm1) / 2 This can be expressed more generally as: fcr, = (fmri + fmr) /2 where n is the window number.
The crossover frequency values calculated are then stored by the controller 102 with respect to window numbers for subsequent use when the signal generator apparatus 100 is operating in the second mode of operation mentioned above. The calculated crossover frequencies are employed in the second mode of operation to select a sub-range of frequencies to be used by the VCO 122 that correspond to the frequency of the input signal (not shown) applied to the controller 102.
Exemplary performance of the signal generator apparatus is shown in FIG. 4.
Although, in the above example, the calibration is performed immediately after powering-up, the skilled person will appreciate that the above-described calibration operation can be performed at any time during operation of the signal generator apparatus 100, as and when required.
It is thus possible to provide a signal generator apparatus and method of calibrating the same that has crossover frequencies that are dynamically discovered and stored, thereby avoiding inaccuracies and errors in relation to frequencies of output signals generated due to tolerances of components used to fabricate the oscillator circuit, for example a voltage controlled oscillator, i.e. operation of the oscillator circuit becomes insensitive to the tolerances.
In the foregoing specification, specific embodiments of the present invention have been described. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention. The benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims.
The invention is defined solely by the appended claims including any amendments made during the pendency of this application and all equivalents of those claims as issued.
Moreover in this document, relational terms such as first and second, top and bottom, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms "comprises," "comprising," "has", "having, " "includes", "including," "contains", "containing" or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises, has, includes, contains a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by "comprises...a", "has...a", "includes...a", "contains...a" does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises, has, includes, contains the element. The -10 -terms "a" and "an" are defined as one or more unless explicitly stated otherwise herein. The terms "substantially", "essentially", "approximately", "about" or any other version thereof, are defined as being close to as understood by one of ordinary ski in the art, and in one non-limiting embodiment the term is defined to be within 10%, in another embodiment within 5%, in another embodiment within 1% and in another embodiment within 0.5%. The term "coupled" as used herein is defined as connected, although not necessarily directly and not necessarily mechanically. A device or structure that is "configured" in a certain way is configured in at least that way, but may also be configured in ways that are not listed.

Claims (14)

  1. -11 -Claims 1. A signal generator apparatus comprising: an oscillator
    circuit having a range of output frequencies, the oscillator circuit being arranged to serve at least part of the range of output frequencies by providing a first sub-range of output frequencies and a second sub-range of output frequencies, the first and second sub-ranges overlapping to provide a crossover frequency; a controller coupled to the oscillator circuit and arranged to scan, when in use, at least part of the range of output frequencies and calculate the crossover frequency.
  2. 2. An apparatus as claimed in Claim 1, wherein the controller is arranged to ascertain the first sub-range of output frequencies and/or the second sub-range of output frequencies.
  3. 3. An apparatus as claimed in Claim 1 or Claim 2, further comprising a frequency lock detector, the controller being arranged to use the frequency lock detector to ascertain a boundary of the first sub- range of output frequencies and/or a boundary of the second sub-range of output frequencies.
  4. 4. An apparatus as claimed in any one of the preceding claims, wherein the controller is arranged to identify a first frequency of the first sub-range of frequencies corresponding to a first optimum control voltage margin and a second frequency of the second sub-range of frequencies corresponding to a second optimum control voltage margin.
    -12 -
  5. 5. An apparatus as claimed in Claim 4, wherein the controller is arranged to calculate the crossover frequency by calculating a bisector frequency between the first and second frequencies respectively corresponding to the first and second optimum control voltage margins.
  6. 6. An apparatus as claimed in any one of the preceding claims, further comprising: a store arranged to record the crossover frequency.
  7. 7. An apparatus as claimed in Claim 6, wherein the store is accessible, when in use, for selecting the first or second sub-range of output frequencies in response to an input signal corresponding to a requested output frequency signal to be generated by the oscillator circuit.
  8. 8. An apparatus as claimed in any one of the preceding claims, further comprising a frequency synthesizer responsive, when in use, to a control input signal in order to generate a control output signal for driving the oscillator circuit.
  9. 9. An apparatus as claimed in Claim 8, wherein the frequency synthesizer comprises the lock detector.
  10. 10. An apparatus as claimed n Claim 8, wherein the frequency synthesizer is arranged to generate a feedback signal for communication to the controller.
  11. 11. A communications terminal comprising the signal generator apparatus as claimed in any one of the preceding claims.
    -13 -
  12. 12. A method of calibrating a signal generator apparatus, the method comprising the steps of: providing an oscillator circuit having a range of output frequencies, the oscillator circuit being arranged to serve at least part of the range of output frequencies by providing a first sub-range of output frequencies and a second sub-range of output frequencies, the first and second sub-ranges overlapping to provide a crossover frequency; scanning at least part of the range of output frequencies and calculating the crossover frequency.
  13. 13. A controlled oscillator apparatus substantially as hereinbefore described with reference to FIGs. 1, 3 and 4.
  14. 14. A method of calibrating a controlled oscillator substantially as hereinbefore described with reference to FIGs. 2, 3 and 4.
GB0701494A 2007-01-26 2007-01-26 Signal generator apparatus and method of calibration therefor Expired - Fee Related GB2445980B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
GB0701494A GB2445980B (en) 2007-01-26 2007-01-26 Signal generator apparatus and method of calibration therefor
PCT/US2007/078720 WO2008091404A1 (en) 2007-01-26 2007-09-18 Signal generator apparatus and method of calibration therefor

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Application Number Priority Date Filing Date Title
GB0701494A GB2445980B (en) 2007-01-26 2007-01-26 Signal generator apparatus and method of calibration therefor

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GB0701494D0 GB0701494D0 (en) 2007-03-07
GB2445980A true GB2445980A (en) 2008-07-30
GB2445980B GB2445980B (en) 2009-04-22

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2120478A (en) * 1982-04-22 1983-11-30 Standard Telephones Cables Ltd Voltage controlled oscillator
GB2294830A (en) * 1993-08-13 1996-05-08 Nec Corp Frequency synthesizer
US20050137816A1 (en) * 2003-12-19 2005-06-23 Chao-Shi Chuang Method for automatically calibrating the frequency range of a pll and associated pll capable of automatic calibration
EP1662664A1 (en) * 2004-11-26 2006-05-31 Texas Instruments Incorporated Phase locked loop circuit with a voltage controlled oscillator
US7103337B2 (en) * 2002-05-31 2006-09-05 Hitachi, Ltd. PLL circuit having a multi-band oscillator and compensating oscillation frequency

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU5299600A (en) * 1999-05-26 2000-12-12 Broadcom Corporation Integrated vco
US6707342B1 (en) * 2002-04-02 2004-03-16 Skyworks Solutions, Inc. Multiple-VCO tuning
US7099643B2 (en) * 2003-05-27 2006-08-29 Broadcom Corporation Analog open-loop VCO calibration method

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2120478A (en) * 1982-04-22 1983-11-30 Standard Telephones Cables Ltd Voltage controlled oscillator
GB2294830A (en) * 1993-08-13 1996-05-08 Nec Corp Frequency synthesizer
US7103337B2 (en) * 2002-05-31 2006-09-05 Hitachi, Ltd. PLL circuit having a multi-band oscillator and compensating oscillation frequency
US20050137816A1 (en) * 2003-12-19 2005-06-23 Chao-Shi Chuang Method for automatically calibrating the frequency range of a pll and associated pll capable of automatic calibration
EP1662664A1 (en) * 2004-11-26 2006-05-31 Texas Instruments Incorporated Phase locked loop circuit with a voltage controlled oscillator

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GB0701494D0 (en) 2007-03-07
WO2008091404A1 (en) 2008-07-31
GB2445980B (en) 2009-04-22

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PCNP Patent ceased through non-payment of renewal fee

Effective date: 20220126