GB2444888B - Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius - Google Patents

Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius

Info

Publication number
GB2444888B
GB2444888B GB0806906A GB0806906A GB2444888B GB 2444888 B GB2444888 B GB 2444888B GB 0806906 A GB0806906 A GB 0806906A GB 0806906 A GB0806906 A GB 0806906A GB 2444888 B GB2444888 B GB 2444888B
Authority
GB
United Kingdom
Prior art keywords
technique
semiconductor layers
layers including
embedded semiconductor
based transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0806906A
Other versions
GB2444888A (en
GB0806906D0 (en
Inventor
Christof Streck
Volker Kahlert
Alexander Hanke
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE102005051994A external-priority patent/DE102005051994B4/en
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of GB0806906D0 publication Critical patent/GB0806906D0/en
Publication of GB2444888A publication Critical patent/GB2444888A/en
Application granted granted Critical
Publication of GB2444888B publication Critical patent/GB2444888B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/0245—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02441—Group 14 semiconducting materials
    • H01L21/02452—Group 14 semiconducting materials including tin
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/0251—Graded layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
GB0806906A 2005-10-31 2006-10-23 Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius Expired - Fee Related GB2444888B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE102005051994A DE102005051994B4 (en) 2005-10-31 2005-10-31 Deformation technique in silicon-based transistors using embedded semiconductor layers with atoms of large covalent radius
US11/465,592 US7544551B2 (en) 2005-10-31 2006-08-18 Technique for strain engineering in Si-based Transistors by using embedded semiconductor layers including atoms with high covalent radius
PCT/US2006/041559 WO2007053381A1 (en) 2005-10-31 2006-10-23 Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius

Publications (3)

Publication Number Publication Date
GB0806906D0 GB0806906D0 (en) 2008-05-21
GB2444888A GB2444888A (en) 2008-06-18
GB2444888B true GB2444888B (en) 2009-05-13

Family

ID=37772931

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0806906A Expired - Fee Related GB2444888B (en) 2005-10-31 2006-10-23 Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius

Country Status (2)

Country Link
GB (1) GB2444888B (en)
WO (1) WO2007053381A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9484432B2 (en) 2010-12-21 2016-11-01 Intel Corporation Contact resistance reduction employing germanium overlayer pre-contact metalization
US8901537B2 (en) 2010-12-21 2014-12-02 Intel Corporation Transistors with high concentration of boron doped germanium

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015609A2 (en) * 2003-06-13 2005-02-17 Arizona Board Of Regents, Acting For And On Behalf Of Arizona State University Sixsnyge1-x-y and related alloy heterostructures based on si, ge and sn
US20050070053A1 (en) * 2003-09-25 2005-03-31 Sadaka Mariam G. Template layer formation

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2005015609A2 (en) * 2003-06-13 2005-02-17 Arizona Board Of Regents, Acting For And On Behalf Of Arizona State University Sixsnyge1-x-y and related alloy heterostructures based on si, ge and sn
US20050070053A1 (en) * 2003-09-25 2005-03-31 Sadaka Mariam G. Template layer formation

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
"Band-edge photoluminescence from pseudomorphic Si0.96Sn0.04 alloy" APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 68, no. 22, 27 May 1996, pages 3105-3107 *
"Pseudomorphic Si1-xSnx alloy films grown by molecular beam epitaxy on Si" APPLIED PHYSICS LETTERS, AIP, AMERICAN INSTITUTE OF PHYSICS, MELVILLE, NY, US, vol. 67, no. 16, 16 October 1995, pages 2287-2289 *
KOBAYASHI ET AL: "Synthesis of metastable group-IV alloy semiconductors by ion implantation and ion-beam-induced epitaxial crystallization" APPLIED SURFACE SCIENCE, ELSEVIER, AMSTERDAM, NL, vol. 100-101, 2 July 1996, pages 498-502 *
KOUVETAKIS J ET AL: "New IR semiconductors in the Si-Ge-Sn system" GROUP IV PHOTONICS, 2004. FIRST IEEE INTERNATIONAL CONFERENCE ON HONG KONG, CHINA 29 SEPT.-1 OCT. 2004, PISCATAWAY, NJ, USA,IEEE, US, 29 September 2004 *

Also Published As

Publication number Publication date
GB2444888A (en) 2008-06-18
WO2007053381A1 (en) 2007-05-10
GB0806906D0 (en) 2008-05-21

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GB2444888B (en) Technique for strain engineering in si-based transistors by using embedded semiconductor layers including atoms with high covalent radius

Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20091210 AND 20091216

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20111023