GB2436481B - Programmable logic device configuration apparatus, and configuration method - Google Patents

Programmable logic device configuration apparatus, and configuration method

Info

Publication number
GB2436481B
GB2436481B GB0711543A GB0711543A GB2436481B GB 2436481 B GB2436481 B GB 2436481B GB 0711543 A GB0711543 A GB 0711543A GB 0711543 A GB0711543 A GB 0711543A GB 2436481 B GB2436481 B GB 2436481B
Authority
GB
United Kingdom
Prior art keywords
programmable logic
logic device
configuration
device configuration
configuration method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0711543A
Other versions
GB0711543D0 (en
GB2436481A (en
Inventor
Shin-Ichi Marui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP2004203955A external-priority patent/JP4414297B2/en
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to GB0711543A priority Critical patent/GB2436481B/en
Publication of GB0711543D0 publication Critical patent/GB0711543D0/en
Publication of GB2436481A publication Critical patent/GB2436481A/en
Application granted granted Critical
Publication of GB2436481B publication Critical patent/GB2436481B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17752—Structural details of configuration resources for hot reconfiguration
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17748—Structural details of configuration resources
    • H03K19/17756—Structural details of configuration resources for partial configuration or partial reconfiguration

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
GB0711543A 2004-07-09 2005-07-08 Programmable logic device configuration apparatus, and configuration method Expired - Fee Related GB2436481B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB0711543A GB2436481B (en) 2004-07-09 2005-07-08 Programmable logic device configuration apparatus, and configuration method

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004203955A JP4414297B2 (en) 2004-07-09 2004-07-09 Programmable logic device, configuration apparatus, and configuration method
GB0514016A GB2416059B (en) 2004-07-09 2005-07-08 Programable logic device, configuration apparatus, and configuration method
GB0711543A GB2436481B (en) 2004-07-09 2005-07-08 Programmable logic device configuration apparatus, and configuration method

Publications (3)

Publication Number Publication Date
GB0711543D0 GB0711543D0 (en) 2007-07-25
GB2436481A GB2436481A (en) 2007-09-26
GB2436481B true GB2436481B (en) 2008-07-02

Family

ID=38477369

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0711543A Expired - Fee Related GB2436481B (en) 2004-07-09 2005-07-08 Programmable logic device configuration apparatus, and configuration method

Country Status (1)

Country Link
GB (1) GB2436481B (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2300505A (en) * 1995-05-02 1996-11-06 Xilinx Inc Programmable logic with parallel and serial user interfaces

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2300505A (en) * 1995-05-02 1996-11-06 Xilinx Inc Programmable logic with parallel and serial user interfaces

Also Published As

Publication number Publication date
GB0711543D0 (en) 2007-07-25
GB2436481A (en) 2007-09-26

Similar Documents

Publication Publication Date Title
HK1243226B (en) Exposure apparatus, exposure method and device manufacturing method
GB2416059B (en) Programable logic device, configuration apparatus, and configuration method
HK1182459A1 (en) Exposure apparatus, and device production method
GB2431485B (en) Device, method and apparatus
GB2432495B (en) Decoding device, decoding method, and receiving apparatus
GB0504664D0 (en) Method, device and apparatus
EP1821338A4 (en) Exposure apparatus, exposure method and device manufacturing method
GB0417328D0 (en) Apparatus and method
GB0425008D0 (en) Method and apparatus
GB0406336D0 (en) Apparatus and method
EP1808884A4 (en) Exposure apparatus, exposure method and device manufacturing method
IL183515A0 (en) Exposure apparatus, exposure method, and device manufacturing method
EP1865607A4 (en) Reducing apparatus and method, and receiving apparatus
EP1796153A4 (en) Ashing method and ashing apparatus
GB0419915D0 (en) Apparatus and method
GB0409691D0 (en) Apparatus and method
AP2007003949A0 (en) Apparatus and method
GB2415341B (en) Unauthorized-access prevention method, apparatus and program
GB0416471D0 (en) Apparatus and method
EP1608101A4 (en) Encrypting apparatus and encrypting method
EP1729857A4 (en) Fire-extinguishing method, apparatus and means
GB0403238D0 (en) Apparatus and method
GB0414615D0 (en) Container,method and apparatus
EP1744542A4 (en) Apparatus operation device and apparatus operation method
GB0402428D0 (en) Apparatus and method

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20120708