GB2410157A - Traffic sensitive handling - Google Patents

Traffic sensitive handling Download PDF

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Publication number
GB2410157A
GB2410157A GB0201510A GB0201510A GB2410157A GB 2410157 A GB2410157 A GB 2410157A GB 0201510 A GB0201510 A GB 0201510A GB 0201510 A GB0201510 A GB 0201510A GB 2410157 A GB2410157 A GB 2410157A
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Prior art keywords
cell
atm
cells
data
traffic
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GB0201510A
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GB0201510D0 (en
GB2410157B (en
Inventor
Robin Eric O'brien
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BAE Systems PLC
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BAE Systems PLC
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0057Block codes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056Systems characterized by the type of code used
    • H04L1/0071Use of interleaving
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/004Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0072Error control for data other than payload data, e.g. control data

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

A method of handling ATM cells in an error-prone ATM network environment includes differentiating ATM cells corresponding to different traffic types (e.g. voice or data) by identifying distinct data characteristics with the corresponding traffic types (e.g. using the VPI in the cell header) and applying different levels of forward error correction (cell "hardening"), using e.g. Reed Solomon coding, to the different traffic types to optimise error and latency characteristics (e.g. applying more robust error coding to data traffic than to voice traffic).

Description

1 2410157 Traffic Sensitive Handling
Field of the Invention
This invention relates to improvements in Asynchronous Transfer Mode (ATM) data transmission systems. More particularly, although not exclusively, this invention relates to techniques and apparatus suitable for differentiating, handhng and prioritizing ATM data packets (cells) in environments which produce intrinsically high error rates.
Background To The Invention
Asynchronous Transfer Mode (ATM) is a packet oriented system for transferring digital information based on the use of ATM cells. ATM data is transmitted as a contiguous stream of cells where each cell has a constant length and comprises a l 5 header label of 5 bytes and a payload field of 48 bytes.
The system Is asynchronous in that the cells are identified by means of address information carried in the header label and not by their position in relation to a fixed time reference. The address information defines a 'virtual channel' thus cells carrying a particular address are transmitted on corresponding virtual channels. ATM uses the concept of a 'virtual circuit' in that a 'virtual circuit' is set up at the time that a call is established. The virtual circuit links the virtual channels used on a series of network links to form the complete end-to-end connection. Thus each computer (or other ATIvI hardware component) must establish a direct line to the computer with which it wishes to communicate through however many intervening devices that are in place along the physical ATM data path.
The cell header label includes an address field divided into two parts, the virtual path identifier (VPI) and the virtual channel identifier (VCI) . The header label also includes, amongst other things, an 8 bit CRC field for header error control.
The differing military roles found in tactical environments often require distinct services in respect of communication. Presently, such different requirements are served by a variety of communications methods and hardware which exhibit an inflexible approach to allocating bandwidth to individual users. Inter-communication between different forces utilising different hardware and communications techniques demands what are often inefficient gateway functions.
While ATM presents users with a way of allocating 'bandwidth on demand', thereby sharing the available bandwidth between users in an effective manner and mitigating lo to some extent the intercommunications difficulties between users, it is designed to operate in a low error environment. For a tactical network to be effective, some form of error protection must be implemented to avoid unacceptable loss of traffic on high error rate links. High error rates may be the result of the intrinsic nature of the battlefield environment, natural causes or manmade interference such as jamming. It is therefore necessary to protect the data stream passing over the transmission medium.
High bandwidth trunks are not commonly found in tactical environments. the majority of traffic being handled by radio links. Therefore, tactical ATM must endeavour to maximise the efficiency of the bandwidth to make best use of the available trunk bandwidth. As an aid to this process it would be a significant advantage to be able to adjust the data handling of the ATM cells, including error protection, depending on the needs of the different traffic types. Ideally this should avoid a universal, and hence inefficient approach to ATM cell prioritization and handling.
Although the following discussion is given in the context of tactical networks, specifically those found in military environments, this is not to be construed as a limiting application. The present invention may be applied in any environment where smart cell handling and traffic profiling in conjunction with increased or enhanced cell transmission reliability is required. Other examples include satellite transmission links and error-prone links carrying different types of traffic such as voice, video and data.
All of these traffic types require quite specific, and sometimes contrasting, ATM data \ handling approaches. For example, real-time services such as voice, which is generally error tolerant but delay sensitive, needs to be differentiated from non-real- time services, such as data, which can tolerate a degree of latency, but is highly error intolerant.
The aim of the present invention is to provide a method and apparatus which provides for error protection and cell handling according to the needs of different traffic types in error-prone ATM network environments.
Disclosure of the Invention
In one aspect, the invention provides for a method of handling ATM cells, the cells incorporating data relating to ATM functions, the method comprising: differentiating ATM cells corresponding to different traffic types by identifying distinct data characteristics with said corresponding traffic types; transmitting said ATM cells over a network; determining the range, value or other characteristic of the data in each ATM cell, thereby identifying the traffic type and processing the corresponding ATM cell in a predetermined manner.
The data characteristics may correspond to separate data ranges, values or similar.
Preferably the data relating to ATM function is the cell Virtual Path Identifier.
Preferably. cell differentiation is achieved by organising different traffic types into separate Virtual Path Identifier (VPI) ranges.
Preferably the differentiated ATM traffic is thereby processed according to traffic type.
Brief Description of the Drawings
The invention will now be described by way of example only and with reference to the figures in which: Figure 1: illustrates a prior art ATM cell structure; Figure 2: illustrates framing and interleaving applied to an ATM cell; Figure 3: illustrates a simplified schematic of the architecture of an ATM cell hardening device/unit; Figure4: illustrates a schematic of a simplified portion of an ATM network showing the location of a cell hardening unit/device: and Figure 5: illustrates a simplified block schematic for a prototype cell hardening device/unit (CHU).
The following discussion will generally relate to ATM transmission of data in error prone military environments. The cell hardening system described herein is, in one embodiment intended for protecting ATM trunks being carried over, for example. a radio relay link that is subject to a tactical environment. Other applications are envisaged, such as protecting satellite links.
Figure I illustrates a schematic of a prior art ATM packet. ATM packet 10 (hereafter referred to as a cell) consists of a payload field I I and header 12. The payload 1 1 is 48 bytes and may correspond to network user information such as data, voice, images etc. The payload 11 can also carry overhead or operations and maintenance information.
The header 12 (shown in detail in figure lb includes: an address field (including a VPI: virtual path identifier and VCI: virtual channel identifier) which defines the virtual channel to which the cell is assigned; payload type identifier PTI; an 8-bit CRC field for header error control (HEC), this field also provides the mechanism for cell structure delineation.
Figure 2 illustrates a simplified schematic of the cell hardening technique according to one aspect of the invention. The individual ATM cells are encapsulated within an error correction codeword (specifically, two complete Reed Solomon codewords applied to the header and payload as will be discussed below). Therefore if the error correction is overloaded, only a single cell is compromised and error multiplication is avoided. Within an ATM cell, the header bytes are particularly sensitive in that if they are corrupted, this will cause total loss of the cell. Using knowledge of the header position in conjunction with header encoding, an additional level of protection is provided for. In addition, the header check byte may be replaced by stronger code to achieve additional protection and to identify uncorrectable headers.
Additional bits are used in the hardened ATM cell. These extra bits are used to provide extra encoding for the payload and the header. They may be derived from idle or unassigned ATM cells, if available, otherwise they contribute to link overheads.
ATM cells encoded in this manner can be accompanied by a synchronization pattern.
This feature relates to cell, not bit, synchronization. Standard ATM transmission employs a cell synchronization method based on delineating cell boundaries from information in the cell header. This method is suitable fro low error rate links.
However, error prone links, radio frequency and satellite data streams need a more rugged form of cell synchronization. To this end, the encoded ATM cell may contain a synchronization word which is detected at the ATM switch or cell hardening device/unit (hereafter referred to as a CHU) to provide initial cell acquisition and to restore cell acquisition after cell loss. This information is also used at the receiving CHU (see below) to delineate the boundaries of codewords from which cells are subsequently extracted. Cell delineation according to standard ATM techniques functions by looking for the header (over a 5 byte period) by calculating the check byte on each byte in the window and declaring a match with the header and header error check byte being matched.
To provide more robust protection, the synchronization word may be interleaved within the cell. This makes the cell more resistant to an attack by a jamming pulse as there are no regions of the cell that are particularly vulnerable to attack by an interfering pulse. This is particularly relevant to jamming techniques which look for frame boundaries in order to corrupt the data stream in a systematic way. The reader is referred to applicants copending UK Patent application No. (Invention Docket No. XA1297) for further details.
Figure 2 shows the encoded payload 20, encoded header 21 and the 31 bit synchronization word 32 interleaved into a contiguous bit stream forming a frame 591 bits in length. Each cell therefore contains two complete Reed Solomon codewords which maximises protection against errors for the shorter' non-payload elements. To this end the sensitivity of the payload data to burst errors may vary depending on the nature of the ATM network user traffic (i.e. voice, data etc.). The hardened ATM cells are then transmitted via the network as ATM cells assembled as described above.
Reed Solomon forward error correction is used as the basic element of the design architecture. This form of encoding was chosen as it provides a good mix of bit error and burst error correction and is relatively straightforward to implement.
In a preferred embodiment, the hardened ATM cells are manipulated with the addition of a synchronization word. Incoming encoded cell frames from, for example, a radio link, are subjected to a synchronization recovery mechanism. This establishes the frame boundaries reliably so that decoding and encoding correction can be performed.
The synchronization technique is designed to be capable of operating in an environment which has random and burst errors. Loss of synchronization is signalled to the external encryption device (see below), so that it may attempt to regain synchronization.
The decoded and corrected cell header and payload elements are reformed into a valid ATM cell which is passed to the ATM switch. If the Reed Solomon decoding of the header fails, the cell is discarded. If required, idle cells are sent to the ATM switch in order to maintain the physical link rate of the connection.
Figure 4 shows the general layout of a simplified portion of an ATM network illustrating the location of the cell hardening devices of the present invention. A standard ATM switch 40 receives ATM cells from a network (not shown). These are passed to a Cell Hardening Unit 41 which processes the cell according to the invention and as described herein. The hardened cells may be subject to cryptographic processes and then transmitted via, for example, an RF link 44/45. The hardened cells are decrypted (if necessary) and decoded as described below. The unpacked cells are then passed to an ATM switch for transmission via the network.
Figure 3 illustrates a schematic of an exemplary cell hardening device (CHU) architecture. The outgoing path (55) shown in Figure 3 accepts traffic cells from an ATM switch (not shown). The frame payload is cell delineated (30) while discarding idle and unassigned cells (37). According to known techniques, the VPI value of the cell header is then checked (32) to identify the cell as one of the two supported types.
If the VPI is odd, then the cell contains voice information and will be given a high priority. If the VPI is even, the cell contains data information and will follow a lower priority route through the CHU. The cell is then stored in the data or voice buffer (35) as appropriate. If the buffers are full, then the cell is discarded. Cells are removed from the buffer when the transmitter is able to take them. Cells in the data buffer are only processed when the voice buffer is empty. Similarly, when both buffers are empty, idle cells are generated and transmitted. Data cells are not transmitted when the radio interface receiver is out of sync. However voice and idle cells continue to be transmitted when the radio interface is reporting out of sync. According to the operation of the prototype unit, the cell is then converted into a packed cell by inserting 3 dummy bytes between the cell head and the cell payload. In a preferred embodiment' the dummy bytes may correspond to reserved areas for, amongst other things, header protection data.
The 56 byte packed cell is then passed to the Reed Solomon encoder (33) for forward error correction encoding. After a processing delay, the FEC packed cell is read from the Reed Solomon encoder and serially clocked out of the CHU at a selectable rate. A 31 bit sync word is added to the end of each FEC packed cell and the data is interleaved to form a frame (34). The series of frames (hardened ATM cells) then leaves the device as a contiguous bit stream which is then sent for transmission on, for example, a radio link (39).
The incoming path (56) shown in Figure 3 accepts a bit stream, dehneated by synchronization words, of hardened ATM cells from a radio link and resynchronises (52) to the frames contained within the bit stream. When a number of patterns are found that are in close agreement with the expected synchronisaton pattern and are each one frame apart, the receiver is deemed to be in synchronisaton. The dehneated cells are converted back into forward error corrected packed cells and passed to the Reed Solomon decoder (51). If the output of the Reed Solomon decoded bitstream contains less than one complete cell, an idle cell is inserted (38). This ensures that a continuous stream of cells is emitted from the CHU interface. The reconstructed ATM cells (50) are then passed to the ATM switch (36). Figure 5 illustrates the operation of a prototype embodiment which omits the extra protection for the header and interleaving and instead inserts dummy bytes between the header and the payload.
lS In accordance with the invention, traffic sensitive ATM cell hardening is applied to the ATM cell. This process treats different sources of ATM traffic differently depending on their character and nature. Traffic differentiation of this kind rehes on the intrinsic differences which exist between real-time services such as voice, which is generally error tolerant, but delay sensitive, and non-real-time services, such as data which can tolerate latency to a degree, but is error intolerant. Differentiating between these traffic types allows prioritization and reprioritisation including the possibihty of buffering data depending on bandwidth requirements at the time. Different error correction schemes may be applied on a per traffic type basis (e.g. within a CHU) to optimise error and latency characteristics according to traffic needs. The present invention may also exploit or take into account time-variable availability In the bandwidth.
The prior art ATM cell format incorporates a relatively primitive scheme for distinguishing cells with different user types (a 2 bit flag). This simply allows a switch to serve queues differently depending on whether the data is system admmstration overhead or some other type of data. The data is multiplexed by a switch acting transparently on different data types. At call set up the ATM adaptation layer for each service sets up the channel with the desired number of cells per carrier, and each ATM switch Is informed of the desired quality of service (QOS) for that channel (VCI/VPI pair). In contrast, the invention allows the Identification of the service type within each cell by changing the header data. The header data is changed at the ATM switch which talks to the cell hardening device or unit (CHU) All ATM switches re-map headers and the switch that talks to the CHU Is programmed with a rule that: at call set-up, when it is informed of a new channel with a given QOS (eg: voice) destined for a terminal accessed through the CHU, whenever it encounters that channel (VCI/VPI pair) m the header of the cell, it changes it to a new header which includes data identifying the cell as voice. The CHU can then handle each cell appropriately.
Thus the type of traffic is identified by examimng the header and providing a specific type of error correction and degree of cell hardening depending on the type of information that is being transmitted. It is also possible that the CHU might signal back along the ATM traffic path, for example, signalling full buffers, discarding cells and requesting data retransmit. This passing of information back down the network can be used to vary the traffic flow. For example, the scenario given above corresponds to throtthng the data flow at the expense of latency and redundancy.
A prototype ATM network operating in accordance with the invention has demonstrated traffic reliability at link error rates below 1 in 103. This provides a si,mficant Improvement over known techniques.
Although the present invention has been described by way of example and with reference to the particular embodiments herein, it to be understood that variations and Improvements are possible within the scope of the Invention as set out in the appended claims.

Claims (9)

  1. Claims: 1. A method of handling ATM cells, the cells incorporating data
    relating to ATM functions, the method including the steps of: differentiating ATM cells corresponding to different traffic types by identifying distinct data characteristics with said corresponding traffic types; transmitting said ATM cells over a network; and determining the data characteristic of the data in each ATM cell, thereby identifying the traffic type and processing the corresponding ATM cell in a predetermined manner.
  2. 2. A method of handling ATM cells as claimed in claim I wherein the data characteristics correspond to separate data ranges, values or similar.
  3. 3. A method of handling ATM cells as claimed in claim I wherein the data relating to ATM function corresponds to the cell Virtual Path Identifier.
  4. 4. A method of handling ATM cells as claimed in any preceding claim wherein cell differentiation is achieved by organising different traffic types into separate Virtual Path Identifier (VPI) ranges.
  5. 5. A method of handling ATM cells as claimed in any preceding claim wherein the differentiated ATM traffic is processed according to traffic type.
  6. 6. A method of handling ATM cells substantially as herein described with reference to figures 2 to 5.
  7. 7. An apparatus adapted to handle ATM cell prioritization in accordance with the method of any of claims I to 6.
    8. An apparatus adapted to handle ATM cell prioritization substantially as herein described with reference to figures 2 to 5. I\
    Amendments to the claims have been filed as follows 1. An apparatus, including an ARM switch connected to a cell hardening unit, the ATM switch being arranged to identify a service type for at least one cell dcsiircd to pass I,roirh flue cell l,anienin r unlit, iirhe?eN 63Secl on the dentilicatic,n of a service type the 'rM switc!, is ar,-anged loo modify the at least one cell to identify to the eel] hardening unit a quality of service required for the at least one cell.
    0 2. An apparatus, as claimed in Claim l, wherein based on the identification of a service type the ATM switch is arranged to modify a header associated with the at least one cell.
    3. An apparatus, as claimed in Claim 1 or Claim 2, wherein the ATM switch is arranged to identify the service type for the at least one cell from a virtual channel identifier and a virtual path identifier pairing associated with the at least one cell.
    4. An apparatus, as claimed in any preceding claim, wherein the cell hardening unit is arranged to use the quality of service identified by the ATM switch to determine an onward transmission priority for the least one cell.
    5. An apparatus, as claimed in any preceding claim, wherein the cell hardening unit is arranged to associate a predetermined range of quality of service identifications with a given priority.
    6. An apparatus, as claimed in any preceding, wherein the ATM switch is arranged to associate a predetermined range of different service types with a desired quality of service identification 7.
    An apparatus, as claimed in any preceding claim, wherein one service type Is voice communication.
  8. 8. An apparatus substantially as illustrated and/or described with reference to the accompanying Figures 2 to 5.
  9. 9. A method of handling ATM cells In an ATM network, the ATM network ncit. Eciing an:T'\4 sNNnEch conncoteri Ir.3 a cell hardening Knin He mei,-l1o4 ncinding the sleeps Of.
    arranging the ATM switch to identify a service type for at least one cell destined to pass through the cell hardening unit; and arranging the ATM switch to modify the at least one cell to identify to the eel] hardening unit a quality of service required for the at least one cell based on the identification of a service type.
    lO. A method of handing ATM cells in an ATM network, substantially as illustrated in and/or described with reference to the accompanying Figures 2 to 5.
GB0201510A 2001-01-23 2002-01-22 Traffic sensitive handling Expired - Fee Related GB2410157B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0101698A GB0101698D0 (en) 2001-01-23 2001-01-23 Traffic sensitive handling

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GB0201510D0 GB0201510D0 (en) 2005-04-06
GB2410157A true GB2410157A (en) 2005-07-20
GB2410157B GB2410157B (en) 2005-12-14

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GB0201510A Expired - Fee Related GB2410157B (en) 2001-01-23 2002-01-22 Traffic sensitive handling

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AU (1) AU782793B1 (en)
CA (1) CA2363295A1 (en)
DE (1) DE10201842A1 (en)
FR (1) FR2877794A1 (en)
GB (2) GB0101698D0 (en)
NO (1) NO20020338A1 (en)

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JPH07245600A (en) * 1994-03-03 1995-09-19 Nippon Telegr & Teleph Corp <Ntt> Error correction system
US5648969A (en) * 1995-02-13 1997-07-15 Netro Corporation Reliable ATM microwave link and network
JPH09247129A (en) * 1996-03-05 1997-09-19 Denso Corp Radio communication controller
JPH11340989A (en) * 1998-05-22 1999-12-10 Nec Corp Radio communication method, its system, its radio transmission section and reception section
WO2000016511A1 (en) * 1998-09-16 2000-03-23 Scientific Research Corporation Systems and methods for asynchronous transfer mode and internet protocol

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FR2703859B1 (en) * 1993-04-09 1995-05-12 Thomson Csf Method for dynamic management of the correction capacity of an ATM adaptation layer.
FI98774C (en) * 1994-05-24 1997-08-11 Nokia Telecommunications Oy Method and apparatus for prioritizing traffic in an ATM network
US5600653A (en) * 1994-09-30 1997-02-04 Comsat Corporation Technique for improving asynchronous transfer mode operation over a communications link with bursty bit errors
EP0958709A2 (en) * 1997-02-04 1999-11-24 GTE Government Systems Corporation Method and apparatus for transmitting atm over deployable line-of-sight channels
JP3575215B2 (en) * 1997-03-05 2004-10-13 株式会社日立製作所 Packet communication method and communication terminal device
FR2769776B1 (en) * 1997-10-09 1999-12-17 Alsthom Cge Alcatel BLOCK CODING PROCESS BY PRODUCT CODE APPLICABLE IN PARTICULAR TO THE CODING OF AN ATM CELL

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07245600A (en) * 1994-03-03 1995-09-19 Nippon Telegr & Teleph Corp <Ntt> Error correction system
US5648969A (en) * 1995-02-13 1997-07-15 Netro Corporation Reliable ATM microwave link and network
JPH09247129A (en) * 1996-03-05 1997-09-19 Denso Corp Radio communication controller
JPH11340989A (en) * 1998-05-22 1999-12-10 Nec Corp Radio communication method, its system, its radio transmission section and reception section
WO2000016511A1 (en) * 1998-09-16 2000-03-23 Scientific Research Corporation Systems and methods for asynchronous transfer mode and internet protocol

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Publication number Publication date
AU782793B1 (en) 2005-08-25
GB0201510D0 (en) 2005-04-06
FR2877794A1 (en) 2006-05-12
GB2410157B (en) 2005-12-14
GB0101698D0 (en) 2005-04-06
NO20020338A1 (en) 2012-01-25
DE10201842A1 (en) 2006-06-08
CA2363295A1 (en) 2006-01-13

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