GB2402278A - Direct RF sampling for cable applications and other broadband signals - Google Patents

Direct RF sampling for cable applications and other broadband signals Download PDF

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Publication number
GB2402278A
GB2402278A GB0412126A GB0412126A GB2402278A GB 2402278 A GB2402278 A GB 2402278A GB 0412126 A GB0412126 A GB 0412126A GB 0412126 A GB0412126 A GB 0412126A GB 2402278 A GB2402278 A GB 2402278A
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Prior art keywords
input signal
signal
sampling
filtering
equal frequency
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Granted
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GB0412126A
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GB0412126D0 (en
GB2402278B (en
Inventor
Nir Sasson
Vri Garbi
Naor Goldman
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Texas Instruments Inc
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Texas Instruments Inc
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Publication of GB2402278A publication Critical patent/GB2402278A/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00Modulated-carrier systems
    • H04L27/32Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
    • H04L27/34Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
    • H04L27/38Demodulator circuits; Receiver circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D7/00Transference of modulation from one carrier to another, e.g. frequency-changing
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03DDEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
    • H03D1/00Demodulation of amplitude-modulated oscillations
    • H03D1/22Homodyne or synchrodyne circuits

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Power Engineering (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

A sampling method implements direct RF sampling of the down-stream DOCSIS and Euro-DOCSIS cable plant signals present at the customer premises equipment (CPE). The method involves dividing a real RF input signal range into a plurality of regions having equal frequency ranges; ```sampling and holding the RF input signal in discrete time to provide a periodic extension of the original signal spectrum; ```and then selectively translating, filtering and decimating the sampled input. An input signal (Fig 1(a)) is processed to yield an output signal (Fig(f)) at a described sampling rate.

Description

J
1 2402278
DIRECT RF SAMPLING FOR CABLE APPLICATIONS
AND OTHER BROADBAND SIGNALS
BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
This invention relates generally to data communication systems and methods, and more particularly to a method of direct RF signal sampling associated with cable applications and other broadband signals present at the customer premises equipment (CPE).
DESCRIPTION OF THE PRIOR ART
Data-Over-Cable Service Interface Specifications (DOCSIS) is a standard for data communication over cable TV infrastructure. This standard is published by CableLabs, a North American consortium founded by members of the cable TV industry. DOCSIS 2.0 was published on December 31, 2001, and includes several important modifications to the previous version, 1.1. In cable broadband applications, as well as in other RF applications, it would be both advantageous and beneficial to provide a scheme of direct RF sampling of the down-stream DOCSIS and Euro-DOCSIS cable plant signals present at the customer premises equipment (CPE).
SUMMARY OF THE INVENTION
The present invention is directed to a scheme of direct RF sampling of the down-stream DOCSIS and Euro-DOCSIS cable plant signals present at the customer premises equipment (CPE).
According to one embodiment, a method of sampling an RF input signal comprises the steps of dividing a real RF input signal range into a plurality of regions having equal frequency ranges; sampling and holding the RF input signal in discrete time to provide a periodic extension of the original signal spectrum; selectively translating the sampled RF input signal and generating a desired signal there from, such that the desired signal lies between - equal frequency range and + equal frequency range; filtering the translated RF input signal such that only the desired signal between - equal frequency range and + equal frequency range remains intact; and decimating the filtered RF input signal such that a discrete time analog signal is generated at a first sampling rate.
BRIEF DESCRIPTION OF THE DRAWINGS I
Other aspects and features of the present invention and many of the attendant advantages of the present invention will be readily appreciated as the invention becomes better understood by reference to the following detailed description when considered in connection with the accompanying drawing figures thereof and wherein: Figure la depicts a real input signal with multiple QAM and NTSC signals, ranging from 50-880MHz; Figure lb shows the spectrum of the real input signal shown in Figure la after being sampled and held; Figure I c shows one frequency translation of the sampled signal shown in Figure I b; Figure Id shows the translated signal shown in Figure lc following filtering to avoid I aliasing in the subsequent stage; Figure le shows the filtered signal resulting from the filtering process shown in Figure Id; Figure I f shows the filtered signal shown in Figure I e after decimation by two; Figure 2 shows a complex frequency translation process suitable for implementing the frequency translation of the sampled signal shown in Figure Ib; Figure 3a shows filter coefficients for an FIR filter with 7 taps and that is suitable for implementing the filtering process shown in Figure I d; Figure 3b shows the frequency response for the FIR filter shown in Figure 3a; Figure 4 is a functional block diagram depicting a more detailed view of the complex sub-sampler module shown in Figure 2; and Figures 5a and 5b are plots illustrating sine function values associated with the complex sub-sampler module shown in Figure 4.
While the above-identified drawing figures set forth particular embodiments, other embodiments of the present invention are also contemplated, as noted in the discussion. In all I cases, this disclosure presents illustrated embodiments of the present invention by way of representation and not limitation. Numerous other modifications and embodiments can be devised by those skilled in the art which fall within the scope and spirit of the principles of this invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
As stated herein before, the present invention is directed to a scheme of direct RF l sampling of the down-stream DOCSIS and Euro-DOCSIS cable plant signals present at the customer premises equipment (CPE). The preferred embodiments described herein below arc based on certain basic system assumptions including an input frequency range between 50MHz and 880MHz, a maximum total input power of 30dBmV, a US DOCSIS channel spacing of 6MHz, and a Euro DOCSIS channel spacing of 8MHz. The input to the system is assumed to be the full range of the directly sampled signals with no filtering whatsoever. The output of the system consists of samples, that include the desired channel, and may include additional channels (adjacent channels). The remaining channel selections are implemented in the digital domain.
Looking now at Figures la - If, a method of direct RF sampling is described in which l the input signal is decimated *om the full initial sample and hold rate, to the final rate in which the quantization is implemented. The process is completed in a few (5) nearly identical stages consisting of: 1. complex frequency translation; 2. anti-aliasing filtering; and 3. decimation.
Figures la - If illustrate one example wherein the first stage (out of 5) samples the real, full downstream signal at 2G samples per second (sps), which then undergoes the series of operations 1-3 above, which subsequently generate a signal sampled at lGsps. It shall be understood this process does not suggest any analog implementation, but merely the signal processing that should be carried out.
The signal processing methodology is described herein below with continued reference now to Figures l a - l f. The original signal I O. shown in Figure l a, is a real signal, with multiple QAM and NTSC signals, ranging from 50-880MHz, as stated herein before. Since the signal is real, it has a symmetric frequency content around OHz. The whole range is divided into four l regions (12, 14, 16, 18) in which each region is 250MHz wide. This division is defined in order to determine the frequency translation required for the desired channel (6 or 8MHz wide) to come closest to OMHz. The example described herein assumes that the desired channel is at 500MHz. For clarity, the desired channel is shown as a trapezoid.
Figure lb shows the spectrum of the input signal after being sampled and held. To preserve simplicity and clarity, Figure lb does not demonstrate the effects of the integration (integrate and hold) that each sample undergoes, which are discussed herein below. The spectrum of the input signals once sampled in discrete time, can be seen to be a periodic extension of the original signal's spectrum. The period is the sampling frequency, also referred to as 2T (in radians per sample) herein below.
Figure to shows the frequency translation, that can be one of three (or five) choices including: 1) no translation, if the desired signal is anywhere between 50 - 250MHz (region 1); 2) translation by -/2 or +/2, if the desired signal is between 250 - 750Mlz (regions 2 - 3); or 3) translation by -IT or A, if the desired signal is between 750 - 880MHz (region 4). The translation is achieved by a very simple operation on the sampled input signal, and is discussed in further detail herein below with reference to Figure 2. Following this operation, the desired signal is somewhere between -250MHz and +250MHz (or between -T/8 and +/8). For the present embodiment, it can be seen to be at OHz. i In order to avoid aliasing in the subsequent stage (where decimation takes place), the signal is filtered in a manner shown in Figure Id. This filter leaves the + 250MHz range intact, while rejecting everything from 750MHz and up. A suitable 7-tap filter is later described herein below with reference to Figures 3 and 4.
Figure le shows the filtered signal; while Figure If shows the filtered signal after decimation by two. It can be seen that the range of + 250MHz is not affected by any aliasing.
The above processing steps described with reference to Figures la - If, are then repeated in the next stages, until the sampling rate is such that only about three channels remain. At this point, quantization is performed; and the remaining processing is done in the digital domain. A; suitable analog implementation of the first stage is described herein below with reference to Figures 5 - 7. 1 Figure 2 shows a complex frequency translation process 100 suitable for implementing the frequency translation of the sampled signal shown in Figure I b. This translation process 100 is achieved by multiplying the input signal by sequences of l's and O's and minus 1's. These multiplications represent a rotating vector on the unit circle. It can be seen that stage I implements a translation by /2. A rotating vector that will translate the input signal by this I amount of digital frequency then has the following values: I, j, - 1, j, 1, j, - 1, - I, . . . and so forth.
The mixer 102, 104 can be implemented via sampling capacitors; and the I and Q paths 106, 108 are achieved by one path always equaling zero when the other is non-zero. If the required translation is by a, the sequence will become 1, -1, -1, -1, ..., and so on. The filter and decimation 110, 112, 114, 116 can optionally be combined with the frequency translation into a single (but more complicated) switched capacitor filter such as described herein below with reference to Figures 4 - 5.
Figure 3a and 3b exemplify an FIR filter with 7 taps. Figure 3a shows the FIR filter coefficients, while Figure 3b shows the FIR filter frequency response. The vertical axis in Figure 3b is the rejection in dB; and the horizontal axis is the frequency (1000 stands for Fs/2).
This FIR filter is designed to pass the + Fs/8 region with nearly no rejection while rejecting regions at or above 7/8F by about 60dB. This same filter is suitable for use in subsequent stages of decimation. The 60dB was found to be necessary since there are multiple instances of this FIR filter (5-6); and the noise from the tail of the filters may sum up in power. The present inventors found 60dB per stage will guarantee about 50dB rejection overall. Those skilled in the I art will appreciate that the small variance in the spread of the coefficients will make the filter tolerable to capacitor accuracy.
Figure 4 is a functional block diagram depicting a more detailed view of the complex sub-sampler module 300 shown in Figure 2. It can readily be appreciated that the multiplication by Ci values with the integration is analogous to charging the capacitors via an analog scheme.
Using a lGHz input signal, the minimum sampling rate should be 2GHz. The desired operation is HB LPF (to prevent aliasing), and then sampling the signal via sampling rate Fs = lGhz (decimation by factor 2). A mathematical analysis of this scheme is presented herein below r wherein I nit 1 ( 2) 1 (n-)Ty Vout[n]=Vout(t=nTy) =- J Vin('r)dr± J Vin(r)dr+JVin('r)dr+ I Ct ( )T C2 (n-)T 3 (n-11)T (n-1 I)T 1 (n-2)7; (n-21)7; 1 JVin()alT ± JUin(T)dr ± JVin()dr.
C4 (n-2)7; (n-2- )T' C6 (n-3)7; Since (for a signal without DC values), Fll JV()d r| = ( f) (e-i2;d7i - ei2T2), F{Vout} can be written as F{Vout} = j2 <1-e 2 + ( f) te 2 -e- jets + V( f) (e-.i27; _e-j2 2s + V(f') - j2329 j227': V(/') (e-j22TJ _ei2 2]+ V(f) ei2 2' _ -j23 J2C5) j2f)' and :1-2 2 H(j2) Vout(j2f) tv)z 1 - j2kr2' Vin( j2f) j2 k=0 Ck (l_e-j2t5) 5 1 -j2/t'\ 5 - j2k'7; = T <1 Jog-e J k=0 Ck J2/ Fs k=0 Ck while
T
T.. =-, and C; = Ck+l.
This is analogous to a discrete system sampled at,. = 2GHz: Ht iw) (_,w), I JW k=0 Ck = T e- jw/2 (e jW12 _ e - jW12)i 1 jWk /W k=O Ck = -e it, 1 -jwk d H(e)=TSe 2Si C W I e-jwk (2)k=0 Ck Since Sinc(x) = an, the sine function values of interest lie in the range of the center lobe: we [-;r,r] - xe L-,, as seen in Figures 5a and Sb that are plots illustrating sine function values associated with the complex sub-sampler module shown in Figure 4. It can be seen from the figures that in the range xe Lo,, which is the desired pass band, there is a maximum degradation of l/4dB, which is negligible. Therefore, the filter eiwk should be designed as a HB LPF with Fp = F and Fs = 3F/.
In view of the above, it can be seen the present invention presents a significant advancement in the RF signal sampling art. It should be apparent that the present invention represents a significant departure from the prior art in construction and operation. However, while particular embodiments of the present invention have been described herein in detail, it is to be understood that various alterations, modifications and substitutions can be made therein without departing in any way from the spirit and scope of the present invention, as defined in the claims which follow.

Claims (6)

  1. CLAIMS: 1. A method of sampling an RF input signal, the method comprising
    the steps of: dividing a real RF input signal range into a plurality of regions having equal frequency ranges; sampling and holding the RF input signal in discrete time to provide a periodic extension of the original signal spectrum; selectively translating the sampled RF input signal and generating a desired signal there from, such that the desired signal lies between - equal frequency range and + equal frequency range; filtering the translated RF input signal such that only the desired signal between equal frequency range and + equal frequency range remains intact; and i decimating the filtered RF input signal such that a discrete time analog signal is generated at a first sampling rate.
  2. 2. The method according to claim 1, wherein the steps of filtering and decimating are repeated until a discrete time analog signal is generated at a desired final sampling rate.
  3. 3. The method according to claim 1, wherein the step of selectively translating the sampled RF input signal comprises multiplying the RF input signal by sequences of ones and zeros and minus ones.
  4. 4. The method according to claim I, wherein the step of filtering is implemented via a finite impulse response filter having a sufficient rejection to achieve a desired noise rejection level generated by a predetermined number of translation, filtering and decimation stages.
  5. 5. A method as herein described with reference to the drawings.
  6. 6. Apparatus adapted to perform the method of any preceding claim.
GB0412126A 2003-05-29 2004-06-01 Direct rf sampling for cable applications and other broadband signals Expired - Fee Related GB2402278B (en)

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GB2402278B GB2402278B (en) 2006-05-31

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7729682B2 (en) * 2005-09-28 2010-06-01 Sigmatel, Inc. Receiver and methods for use therewith
US8130871B2 (en) * 2006-01-09 2012-03-06 Sigmatel, Inc. Integrated circuit having radio receiver and methods for use therewith
US8086197B2 (en) * 2008-11-12 2011-12-27 Nxp B.V. Multi-channel receiver architecture and reception method

Citations (2)

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Publication number Priority date Publication date Assignee Title
EP1235402A2 (en) * 2001-02-23 2002-08-28 Terayon Communication Systems, Inc. Head end receiver for digital data delivery systems using mixed mode SCDMA and TDMA multiplexing
US6487221B1 (en) * 1997-02-10 2002-11-26 Alcatel Digital device and method for filtering, decimation and transposition into distributed baseband and corresponding digital modulator

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US20010040930A1 (en) * 1997-12-19 2001-11-15 Duane L. Abbey Multi-band direct sampling receiver
FI120124B (en) * 1998-05-29 2009-06-30 Nokia Corp A method and circuit for sampling a signal at a high sampling rate
US7047264B2 (en) * 2001-03-02 2006-05-16 Samsung Electronics Co., Ltd. Frequency converter

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6487221B1 (en) * 1997-02-10 2002-11-26 Alcatel Digital device and method for filtering, decimation and transposition into distributed baseband and corresponding digital modulator
EP1235402A2 (en) * 2001-02-23 2002-08-28 Terayon Communication Systems, Inc. Head end receiver for digital data delivery systems using mixed mode SCDMA and TDMA multiplexing

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GB0412126D0 (en) 2004-06-30
US20040243655A1 (en) 2004-12-02
GB2402278B (en) 2006-05-31
US7197524B2 (en) 2007-03-27

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Effective date: 20210601