GB2398663A - Automated Repartitioning Of Hardware And Software Components In An Embedded System - Google Patents

Automated Repartitioning Of Hardware And Software Components In An Embedded System Download PDF

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Publication number
GB2398663A
GB2398663A GB0407134A GB0407134A GB2398663A GB 2398663 A GB2398663 A GB 2398663A GB 0407134 A GB0407134 A GB 0407134A GB 0407134 A GB0407134 A GB 0407134A GB 2398663 A GB2398663 A GB 2398663A
Authority
GB
United Kingdom
Prior art keywords
hardware
software components
performance
software
another aspect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB0407134A
Other versions
GB0407134D0 (en
Inventor
Russell Alan Klien
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mentor Graphics Corp
Original Assignee
Mentor Graphics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/295,538 external-priority patent/US7146581B2/en
Application filed by Mentor Graphics Corp filed Critical Mentor Graphics Corp
Publication of GB0407134D0 publication Critical patent/GB0407134D0/en
Publication of GB2398663A publication Critical patent/GB2398663A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3447—Performance evaluation by modeling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/87—Monitoring of transactions

Abstract

A hardware-software system design optimization tool is described. The tool allows a designer to optimize the system performance by allowing him to select software components of the system and move them to a hardware representation. The software components are selected by using a performance profile of the system, which comprises time data related to execution of the software components, memory and bus transactions. In another aspect, the tool automatically collects the performance data and generates the performance profile. In another aspect, performance data is collected by modeling the execution of the hardware-software system. In another aspect, hardware-software system is modeled again after selected software components are moved to a hardware representation to inquire whether the move improved overall system performance.

Description

GB 2398663 A continuation (72) Inventor(s): Russell Alan Klien (74) Agent
and/or Address for Service: Forrester Ketley & Co Forrester House, 52 Bounds Green Road, LONDON, N11 2EY, United Kingdom
GB0407134A 2002-11-15 2003-11-13 Automated Repartitioning Of Hardware And Software Components In An Embedded System Withdrawn GB2398663A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/295,538 US7146581B2 (en) 2002-11-15 2002-11-15 Automated repartitioning of hardware and software components in an embedded system
PCT/US2003/036638 WO2004046866A2 (en) 2002-11-15 2003-11-13 Automated repartitioning of hardware and software components in an embedded system

Publications (2)

Publication Number Publication Date
GB0407134D0 GB0407134D0 (en) 2004-05-05
GB2398663A true GB2398663A (en) 2004-08-25

Family

ID=32829190

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0407134A Withdrawn GB2398663A (en) 2002-11-15 2003-11-13 Automated Repartitioning Of Hardware And Software Components In An Embedded System

Country Status (1)

Country Link
GB (1) GB2398663A (en)

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Not yet advised *

Also Published As

Publication number Publication date
GB0407134D0 (en) 2004-05-05

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)