GB2395306B - A configurable processor architecture - Google Patents

A configurable processor architecture

Info

Publication number
GB2395306B
GB2395306B GB0226732A GB0226732A GB2395306B GB 2395306 B GB2395306 B GB 2395306B GB 0226732 A GB0226732 A GB 0226732A GB 0226732 A GB0226732 A GB 0226732A GB 2395306 B GB2395306 B GB 2395306B
Authority
GB
United Kingdom
Prior art keywords
processor architecture
configurable processor
configurable
architecture
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB0226732A
Other languages
English (en)
Other versions
GB0226732D0 (en
GB2395306A (en
Inventor
Adrian John Anderson
Michael John Davis
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Imagination Technologies Ltd
Original Assignee
Imagination Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Imagination Technologies Ltd filed Critical Imagination Technologies Ltd
Priority to GB0226732A priority Critical patent/GB2395306B/en
Publication of GB0226732D0 publication Critical patent/GB0226732D0/en
Priority to US10/358,985 priority patent/US20040098562A1/en
Priority to JP2004552844A priority patent/JP4308144B2/ja
Priority to PCT/GB2003/004868 priority patent/WO2004046955A2/en
Priority to EP03775521A priority patent/EP1561160A2/en
Publication of GB2395306A publication Critical patent/GB2395306A/en
Application granted granted Critical
Publication of GB2395306B publication Critical patent/GB2395306B/en
Priority to US11/515,988 priority patent/US20070005937A1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/786—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) using a single memory module
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8007—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors single instruction multiple data [SIMD] multiprocessors
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3877—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor
    • G06F9/3879—Concurrent instruction execution, e.g. pipeline or look ahead using a slave processor, e.g. coprocessor for non-native instruction execution, e.g. executing a command; for Java instruction set
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/20—Servers specifically adapted for the distribution of content, e.g. VOD servers; Operations thereof
    • H04N21/23—Processing of content or additional data; Elementary server operations; Server middleware
    • H04N21/238—Interfacing the downstream path of the transmission network, e.g. adapting the transmission rate of a video stream to network bandwidth; Processing of multiplex streams
    • H04N21/2383—Channel coding or modulation of digital bit-stream, e.g. QPSK modulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
    • H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
    • H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
    • H04N21/438—Interfacing the downstream path of the transmission network originating from a server, e.g. retrieving encoded video stream packets from an IP network
    • H04N21/4382—Demodulation or channel decoding, e.g. QPSK demodulation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/44—Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/46—Receiver circuitry for the reception of television signals according to analogue transmission standards for receiving on more than one standard at will

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Computing Systems (AREA)
  • Advance Control (AREA)
  • Circuits Of Receivers In General (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Television Systems (AREA)
GB0226732A 2002-11-05 2002-11-15 A configurable processor architecture Expired - Lifetime GB2395306B (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
GB0226732A GB2395306B (en) 2002-11-15 2002-11-15 A configurable processor architecture
US10/358,985 US20040098562A1 (en) 2002-11-15 2003-02-05 Configurable processor architecture
EP03775521A EP1561160A2 (en) 2002-11-15 2003-11-11 A configurable processor architecture
PCT/GB2003/004868 WO2004046955A2 (en) 2002-11-15 2003-11-11 A configurable processor architecture
JP2004552844A JP4308144B2 (ja) 2002-11-15 2003-11-11 構成可能なプロセッサ・アーキテクチャ
US11/515,988 US20070005937A1 (en) 2002-11-05 2006-09-05 Configurable processor architecture for use in multi-standard communications

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB0226732A GB2395306B (en) 2002-11-15 2002-11-15 A configurable processor architecture

Publications (3)

Publication Number Publication Date
GB0226732D0 GB0226732D0 (en) 2002-12-24
GB2395306A GB2395306A (en) 2004-05-19
GB2395306B true GB2395306B (en) 2006-02-15

Family

ID=9947938

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0226732A Expired - Lifetime GB2395306B (en) 2002-11-05 2002-11-15 A configurable processor architecture

Country Status (5)

Country Link
US (2) US20040098562A1 (enExample)
EP (1) EP1561160A2 (enExample)
JP (1) JP4308144B2 (enExample)
GB (1) GB2395306B (enExample)
WO (1) WO2004046955A2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2396031B (en) 2002-12-05 2005-10-26 Imagination Tech Ltd A SIMD processor with multi-port memory unit
US7668193B2 (en) 2005-09-02 2010-02-23 Stmicroelectronics S.R.L. Data processor unit for high-throughput wireless communications
US7447948B2 (en) * 2005-11-21 2008-11-04 Intel Corporation ECC coding for high speed implementation
US7792843B2 (en) * 2005-12-21 2010-09-07 Adobe Systems Incorporated Web analytics data ranking and audio presentation
KR20090031783A (ko) * 2006-07-14 2009-03-27 인터디지탈 테크날러지 코포레이션 심볼 레이트 하드웨어 가속기
US20090144480A1 (en) * 2007-12-03 2009-06-04 Jun-Dong Cho Multi-processor system on chip platform and dvb-t baseband receiver using the same
US8755515B1 (en) 2008-09-29 2014-06-17 Wai Wu Parallel signal processing system and method
US11803377B2 (en) * 2017-09-08 2023-10-31 Oracle International Corporation Efficient direct convolution using SIMD instructions
WO2021138189A1 (en) * 2019-12-30 2021-07-08 Star Ally International Limited Processor for configurable parallel computations

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5440752A (en) * 1991-07-08 1995-08-08 Seiko Epson Corporation Microprocessor architecture with a switch network for data transfer between cache, memory port, and IOU
US6408386B1 (en) * 1995-06-07 2002-06-18 Intel Corporation Method and apparatus for providing event handling functionality in a computer system
US5784602A (en) * 1996-10-08 1998-07-21 Advanced Risc Machines Limited Method and apparatus for digital signal processing for integrated circuit architecture
CN1156171C (zh) * 1997-04-07 2004-06-30 松下电器产业株式会社 提高处理效率的图象声音处理装置
US6249857B1 (en) * 1997-10-20 2001-06-19 Motorola, Inc. Apparatus using a multiple instruction register logarithm based processor
US6449664B1 (en) * 1998-11-16 2002-09-10 Viewahead Technology, Inc. Two dimensional direct memory access in image processing systems
US6526431B1 (en) * 1999-02-26 2003-02-25 Intel Corporation Maintaining extended and traditional states of a processing unit in task switching
EP1332613A1 (en) * 2000-10-17 2003-08-06 Koninklijke Philips Electronics N.V. Multi-standard channel decoder

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
http://www.transmeta.com/technology/architecture/code_morphing.html "Code Morphing software" 10 September 2001 *
IEEE Custom Integrated Circuits Conference, 2000, "Multi-thread VLIW processor architecture for HDTV decoding", Kim et al, pages 559-562 *
IEEE Transactions on Circuits and Systems for Video Technology, Vol 12 No 8, August 2002, "The Equator MAP-CATM DSP: An End-To-End Broadband Signal ProcessorTM VLIW", Basoglu, Lee and O'Donnell, pages 646-659 *
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Vol 9, No 2, April 2001, "Architecture and Design of NX-2700: A Programmable Single-Chip HDTV All-Format-Decode-and-Display Processor", Santanu Dutta, pages 313-328 *

Also Published As

Publication number Publication date
US20040098562A1 (en) 2004-05-20
WO2004046955A3 (en) 2005-02-10
JP4308144B2 (ja) 2009-08-05
JP2006506722A (ja) 2006-02-23
GB0226732D0 (en) 2002-12-24
WO2004046955A2 (en) 2004-06-03
EP1561160A2 (en) 2005-08-10
US20070005937A1 (en) 2007-01-04
GB2395306A (en) 2004-05-19

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20210211 AND 20210217

PE20 Patent expired after termination of 20 years

Expiry date: 20221114