GB2386506A - Dual mode signal processing - Google Patents

Abstract

A dual mode signal processor, receiver and method for third generation 2.5G, 3G mobile communications systems, a signal processor 500 for a dual mode receiver is described, the receiver having a fast, wideband mode (CDMA, W-CDMA, CDMA-2000) and a second, narrower band mode (GSM), the signal processor comprises a receiver front-end 504, a decoder for decoding the first, wideband signal and a detector 518, 520 for detecting the presence of the narrower band signal within the received wideband signal, the detector 515, 520 preferably monitors a plurality of frequency divisions of the wideband signal substantially simultaneously to locate one or more narrower band signals. The signal processor uses a dual-ported double-buffer frame-store 510 and a control block 532 to access multiplexers 506, 514 from which data are sent to a digital channel select filter 518, from which one or more narrowband (GSM) signals may be recovered.

Description

1 2386506

DUAL MODE SIGNAL PROCESSING

This invention generally relates to signal processors, receivers, and receiving methods for digital mobile communications systems, especially third generation (3G) mobile communications systems. More particularly the invention relates to apparatus and methods for the reception of both wideband and narrowband signals.

Third generation mobile phone networks use CDMA (Code Division Multiple Access) spread spectrum signals for communicating across the radio interface between a mobile station and a base station. These 3G networks, (and also so-called 2.5G networks), are encompassed by the International Mobile Telecommunications IMT-2000 standard (www.ituint, hereby incorporated by reference). Third generation technology uses CDMA (Code Division Multiple Access) and the IMT-2000 standard contemplates three main modes of operation, W-CDMA (Wide band CDMA) direct spread FDD (Frequency Division Duplex) in Europe and Japan, CDMA-2000 multicarrier FDD for the USA, and TD-CDMA (Time Division Duplex CDMA) and TD-SCDMA (Time Division Synchronous CDMA) for China.

Collectively the radio access portion of a 3G network is referred to as UTRAN (Universal Terrestrial Radio Access Network) and a network comprising UTRAN access networks is known as a UMTS (Universal Mobile Telecommunications System) network. The UMTS system is the subject of standards produced by the Third Generation Partnership Project (3GPP, 3GPP2), technical specifications for which can

be found at www.3epp.ore. These standards include Technical Specifications 23.101,

which describes a general UMTS architecture, and 25.101 which describes user and radio transmission and reception (FDD) versions 4.0.0 and 3.2.2 respectively of which are hereby incorporated by reference.

Figure 1 shows a generic structure of a third generation digital mobile phone system at 10. In Figure 1 a radio mast 12 is coupled to a base station 14 which in turn is

controlled by a base station controller 16. A mobile communications device 18 is shown in two-way communication with base station 14 across a radio or air interface 20, known as a Um interface in GSM (Global Systems for Mobile Communications) networks and GPRS (General Packet Radio Service) networks and a Uu interface in CDMA2000 and W-CDMA networks. Typically at any one time a plurality of mobile devices 18 are attached to a given base station, which includes a plurality of radio transceivers to serve these devices.

Base station controller 16 is coupled, together with a plurality of other base station controllers (not shown) to a mobile switching centre (MSC) 22. A plurality of such MSCs are in turn coupled to a gateway MSC (GMSC) 24 which connects the mobile phone network to the public switched telephone network (PSIN) 26. A home location register (HER) 28 and a visitor location register (VLR) 30 manage call routing and roaming and other systems (not shown) manage authentication, billing. An operation and maintenance centre (OMC) 29 collects the statistics from network infrastructure elements such as base stations and switches to provide network operators with a high level view of the network's performance. The OMC can be used, for example, to determine how much of the available capacity of the network or parts of the network is being used at different times of day.

The above described network infrastructure essentially manages circuit switched voice connections between a mobile communications device 18 and other mobile devices and/or PSTN 26. So-called 2.5G networks such as GPRS, and 3G networks, add packet data services to the circuit switched voice services. In broad terms a packet control unit (PCU) 32 is added to the base station controller 16 and this is connected to a packet data network such as Internet 38 by means of a hierarchical series of switches. In a GSM-

based network these comprise a serving GPRS support node (SGSN) 34 and a gateway GPRS support node (GGSM) 36. It will be appreciated that both in the system of Figure 1 and in the system described later the functionalities of elements within the network may reside on a single physical node or on separate physical nodes of the system.

Communications between the mobile device 18 and the network infrastructure generally include both data and control signals. The data may comprise digitally encoded voice data or a data modem may be employed to transparently communicate data to and from the mobile device. In a GSMtype network text and other low-bandwidth data may also be sent using the GSM Short Message Service (SMS).

In a 2.5G or 3G network mobile device 18 may provide more than a simple voice connection to another phone. For example mobile device 18 may additionally or alternatively provide access to video and/or multimedia data services, web browsing, e-

mail and other data services. Logically mobile device 18 may be considered to comprise a mobile terminal (incorporating a subscriber identity module (SIM) card) with a serial connection to terminal equipment such as a data processor or personal computer. Generally once the mobile device has attached to the network it is "always on" and user data can be transferred transparently between the device and an external data network, for example by means of standard AT commands at the mobile terminal-

terminal equipment interface. Where a conventional mobile phone is employed for mobile device 18 a terminal adapter, such as a GSM data card, may be needed.

In a CDMA spread spectrum communication system a baseband signal is spread by mixing it with a pseudorandom spreading sequence of a much higher bit rate (referred to as the chip rate) before modulating the rf carrier. At the receiver the baseband signal is recovered by feeding the received signal and the pseudorandom spreading sequence into a correlator and allowing one to slip past the other until a lock is obtained. Once code lock has been obtained, it is maintained by means of a code tracking loop such as an early-late tracking loop which detects when the input signal is early or late with respect to the spreading sequence and compensates for the change. Alternatively a matched filter may be employed for Respreading and synchronization.

Such a system is described as code division multiplexed as the baseband signal can only be recovered if the initial pseudorandom spreading sequence is known. A spread spectrum communication system allows many transmitters with different spreading sequences all to use the same part of the rf spectrum, a receiver "tuning" to the desired signal by selecting the appropriate spreading sequence.

Figures 2a and 2b show, respectively, an exemplary front end 200 and a decoder 250 for a typical spread spectrum receiver. A receiver antenna 202 is connected to an input amplifier 204, which has a second input from an IF oscillator 208 to mix the input of rf signal down to IF. The output of mixer 206 is fed to an IF band pass filter 210 and thence to an AGC (Automatic Gain Control) stage 212. The output of AGC stage 212 provides an input to two mixers 252, 254 to be mixed with quadrature signals from an oscillator 258 and a splitter 256. This generates quadrature I and Q signals 260, 262 which are digitised by analogue to digital converters 264, which also output a control signal on line 266 to control AGC stage 212 to optimise signal quantisation.

Digitised I and Q signals 268,270 from ADCs 264 are fed to Nyquist filters 272, 274 and thence to matched filters 276, 278, which are configured to provide a maximum output when a signal with the desired pseudorandom spreading sequence is received.

The matched filter outputs feed bit synchronization circuitry 280 which provides an error signal 286 to a delay locked loop 288 which generates sample clocks 290 to ADCs 266. Circuitry 280 also provides a second output 282 to a demodulator 284 for demodulating received data. Typically, as shown in Figure 2, the rf signal is digitised at IF although it may be digitised at other points, for example after input amplifier 204.

In a 3G mobile phone system the baseband data is spread using a spreading or channelisation code using an Orthogonal Variable Spreading Factor (OVSF) technique.

The OVSF codes allow the spreading factor to be changed whilst maintaining orthogonality between codes of different lengths. To increase the number of simultaneous users of the system the data is further spread by a scrambling code such as a Gold code. The scrambling code does not change the signal bandwidth but allows signals to or from different users to be distinguished from one another, again, because the spreading codes are substantially mutually orthogonal. The scrambling is used on top of the channelisation spreading, that is a signal at the chip rate following OVSF spreading is multiplied by the scrambling code to produce a scrambled code at the same chip rate. The chip rate is thus determined by the channelisation code and, in this system, is unaffected by the subsequent scrambling. Thus the symbol rate for a given chip rate is likewise unaffected by the scrambling.

Different spreading factors and scrambling code links are generally employed for the down link from the base station to the mobile station and for the up link from the mobile station to the base station. Typically the channelisation codes have a length of between 4 chips and 256 chips or, equivalently, a spreading factor of between 4 and 256 (although other spreading factors may be employed). The up link and down link radio (data channel) frames generally last 1 ems, corresponding to a scrambling code length of 38400 chips although shorter frames, for example of 256 chips, are sometimes employed on the up link. A typical chip rate is 3.84 M chips/see (Mcps), which determines the maximum bit rate for a channel for example with a spreading factor of 16, that is 16 chips per symbol, this gives a data rate of 240 Kbps. It will be recognised that the foregoing figures are provided merely for the purposes of illustration. Where higher bit rate communications with a mobile station are required more than one such channel may be employed to create a so-called multicode transmission. In a multicode transmission a plurality of data channels are used, effectively in parallel, to increase the overall rate of data transmission to or from a mobile station. Generally the multicode data channels have the same scrambling code but different channelisation codes, albeit preferably with the same spreading factor.

In a 3G mobile phone system there are generally a number of different channels some dedicated to particular users and some common to groups of users such as all the users within a given cell or sector. Traffic is carried on a Dedicated Physical Control Channel (DPCH), or on a plurality of such channels in the case of a multicode transmission, as described above. The common channels generally transport signalling and control information and may also be utilised for the physical layer of the system's radio link.

Thus a Common Pilot Channel (CPICH) is provided comprising an unmodulated code channel scrambled with a cell-specific scrambling code to allow channel estimation and equalisation at the mobile station receiver. Similarly a Sychnronisation Channel (SCM) is provided for use by the mobile station to locate network cells. A primary SCH channel is unmodulated and is transmitted using the same channelisation spreading sequence in each cell and does not employ a cell-specific scrambling code. A similar secondary SCH channel is also provided, but with a limited number of spreading sequences. Primary and Secondary Common Control Physical Channel (PCCPCH,

SCCPCH) having known channelisation and spreading codes are also provided to carry control information. The foregoing signalling channels (CPICH, SCH and CCPCH) must generally be decoded by all the mobile stations and thus the spreading codes (channelisation codes and where appropriate, scrambling code) will generally be known by the mobile station, for example because the known codes for a network have been stored in the user-end equipment. Here the references to channels are generally references to physical channels and one or more network transport channels may be mapped to such a physical channel. In the context of 3G mobile phone networks the mobile station or mobile device is often referred to as a terminal and in this specification no distinction is drawn between these general terms.

One advantage of spread spectrum systems is that they are relatively insensitive to multipath fading. Multipath fading arises when a signal from a transmitter to a receiver takes two or more different paths and hence two or more versions of the signals arrive at the receiver at different times and interfere with one another. This typically produces a comb-like frequency response and, when a wide band signal is received over a multipath channel, the multiple delays give the multiple components of the received signal the appearance of tines of a rake. The number and position of multipath channels generally changes over time, particularly when the transmitter or receiver is moving.

As the skilled person will understand, a correlator in a spread spectrum receiver will tend to lock onto one of the multipath components, normally the direct signal which is the strongest. However a plurality of correlators may be provided to allow the spread spectrum receiver to lock onto a corresponding plurality of separate multipath components of the received signal. Such a spread spectrum receiver is known as a rake receiver and the elements of the receiver comprising the correlators are often referred to as "fingers" of the rake receiver. The separate outputs from each finger of the rake receiver are combined to provide an improved signal to noise ratio (or bit error rate) generally either by weighting each output equally or by estimating weights which maximise the signal to noise ratio of the combined output. This latter technique is known as Maximal Ratio Combining (MRC).

Figure 3 shows the main components of a typical rake receiver 300. A bank of correlators 302 comprises, in this example, three correlators 302, 302 and 302 each of

which receives a CDMA signal from input 304. The correlators are known as the fingers of the rake; in the illustrated example the rake has three fingers. The CDMA signal may be at baseband or at IF (Intermediate Frequency). Each correlator locks to a separate multipath component which is delayed by at least one chip with respect to the other multipath components. More or fewer correlators can be provided according to a quality-cost/complexity trade off. The outputs of all the correlators go to a combiner 306 such as an MRC combiner, which adds the outputs in a weighted sum, generally giving greater weight to the stronger signals. The weighting may be determined based upon signal strength before or after correlation, according to conventional algorithms.

The combined signal is then fed to a discriminator 308 which makes a decision as to whether a bit is a 1 or a 0 and provides a baseband output. The discriminator may include additional filtering, integration or other processing. The rake receiver 300 may be implemented in either hardware or software or a mixture of both.; Referring now to Figure 4, this shows in more detail an example of W-CDMA rake receiver 400 according to the prior art. The receiver 400 has an antenna 402 to receive

the spread spectrum signal for the DPCH (Dedicated Physical Data Channel), PCCPCH, and CPICH channels. The signal received by antenna 402 is input to a down converter 404 which down converts the signal to either IF (Intermediate Frequency) or base band for Respreading. Typically at this point the signal will be digitised by an analogue-to-

digital converter for processing in the digital domain by either dedicated or programmable digital signal processors. To preserve both magnitude and phase information the signal normally comprises I and Q channels although for simplicity these are not shown in Figure 4. In this receiver' and generally in the receiver's described below, the signal processing in either the analogue or the digital domain or in both domains may be employed. However since normally much of the processing is carried out digitally the functional element drawn as blocks in Figure 4 will generally be implemented by appropriate software or, where specialised integrated circuits are available for some of the functions, by appropriately programming registers in these integrated circuits to configure their architectural and/or functionality for performing the required functions.

Referring again to Figure 4, the receiver 400 comprises 3 rake fingers 406, 408 and 410 each having an output to rake combiner 412 which provides a combined demodulated signal output 414 for further processing in the mobile terminal. The main elements of each rake finger correspond and, for simplicity, only the elements of rake finger 406 are shown. A code tracker 416 is coupled to the input of rake finger 406 to track the spread spectrum codes for Respreading. Conventional means such as a matched filter or an early-late tracking loop may be employed for code tracker 416 and since the DPCH, PCCPCH and CPICH channels are generally synchronised the code tracker 416 need only log on to one of these signals but normally CPICH because this generally has a relatively high signal level. The output of the code tracker 416 controls code generators for PCCPCH 418, CPICH 420, and DPCH 422 which generate spreading codes for cross-correlation with their corresponding channel signals to despread the spread spectrum signals. Thus three despreaders 424, 426, 428 are provided, each coupled to the rake finger input, and each receiving an output from one of the code generators 418 420, 422 to despread the appropriate signal (both channelisation and scrambling codes) .

As the skilled person would appreciate these despreaders will generally comprise a cross-correlator such as a multiplier and summer.

The CPICH pilot signal is unmodulated so that when it is despread the result is a signal with a magnitude and phase corresponding to the attenuation and phase shift of the multipath channel through which the CPICH signal locked onto by the finger of the rake receiver has been transmitted. This signal thus comprises a channel estimate for the CPICH channel, in particular for the multipath component of this channel the rake finger has despread. The estimate may be used without further processing but, preferably the estimate is averaged over time, over one or more symbol intervals, to reduce noise on the estimate and increase its accuracy. This function is performed by channel estimate 430. It will be appreciated although averaging over a long period will reduce the level of noise, this will also reduce the ability of the receiver to respond quickly to changing channel conditions such as are encountered when, for example, the receiver is operating in a terminal in a car on a motorway.

The channel estimate is conjugated to invert the phase and if necessary normalised so that zero attenuation corresponds to a magnitude of unity, and in this form the conjugated signal can simply be used to multiply another received signal to apply or compensate for the channel estimate. Thus multipliers 432 and 434 apply the channel estimate from channel estimate block 430 to the broadcast control channel PCCPCH and to the desired data channel DPCH respectively. The desired data channels are then combined by rake combiner 412 in any conventional fashion and the broadcast channel outputs from each finger, such as broadcast channel output 436 from rake finger 406, are also combined in a second rake combiner (not shown in Figure 4) to output a demodulated PCCPCH control channel signal.

It is desirable to be able to provide mobile communications terminals, and in some instances base stations, capable of receiving both 3G mobile phone signals and legacy 2G (and 2.5G) signals. This provides flexibility for network operators, coverage where 3G signals are not available, and simplifies the upgrading of existing networks to 3G.

Such terminals also help reduce the pressure on bandwidth because 2G communication network protocols may be employed where large bandwidths are not required.

A multimode terminal typically supports a 3G mode such as W-CDMA, and GSM, although other 2G technologies such as IS (Intenm Standard) -95 may also be supported. As described above, W-CDMA has a bandwidth (or carrier spacing) of approximately 5.0MHz (although this can be adjusted in 200KHz increments) and synchronization is based on a set of periodic CDMA signals. By contrast GSM has a 200KHz channel bandwidth and synchronization is based upon a different set of periodically transmitted synchronization bursts. In W-CDMA the primary and secondary synchronization channels (SCM) are sent in parallel, time multiplexed with the primary common control physical channel (PCCPCH) with a frame period of 1 Oms.

In GSM the synchronization channel (SCM) is also time multiplexed, but with a frame period of approximately 4.6ms, as described in more detail below. Furthermore, the frames of GSM and W-CDMA are not aligned.

It is helpful, at this point, to review some aspects of the Global System for Mobile Communications (GSM) mobile phone standard. In this specification GSM is used as a

generic descriptor for GSM-based systems which include GSM900, GSM1800 (or DCS 1800), GSMl900 (or PCS1900) and EDGE (Enhanced Data Rates for GSM Evolution), which uses a GSM carrier spacing of 200KHz but provides higher data rates. The skilled person will understand that GSM systems may be implemented at different frequencies, depending upon the available bandwidth. Aspects of GSM and GPRS are defined in ETSI (European Technical Standards Institute) standards GSM 01 to 12 and a useful sublunary of the radio interface can be found in the 3GPP Technical Specification

45.001V5.0.0 (Technical Specification Group GERAN), which is hereby incorporated

by reference.

GSM employs a combination of frequency division multiple access (FDMA) and time division multiple access (TDMA), utilising carrier frequencies which are 200KHz apart.

Up to 124 carrier frequencies, occupying 25MHz, are provided for, and it will be appreciated that 25 GSM carriers may co-exist within the 5MHz bandwidth employed by a W-CDMA 3G channel. Frequency bands identified for IMT-2000 use include 806-

890 MHz, 1710-1885 MHz and 2500-2690 MHz, some of which overlap with existing GSM frequencies.

In a GSM system each carrier frequency is time division multiplexed to provide 26 frames of 4.6ms each. Each frame in turn consists of 8 time slots, or burst periods, of approximately 0.577ms, each of which defines a physical channel. A synchronization burst (SB) is used for time synchronization of a mobile terminal and, as well as carrying frame number and base station identity information, this also comprises a training sequence for channel equalization. The repeated synchronization bursts comprise the synchronization channel (SCH), which is broadcast together with a frequency correction channel (FCCH) comprising repeated frequency correction bursts. Receiver time and frequency synchronization is described in the ETSI specification GSM05.10, which is

hereby incorporated by reference.

Synchronisation in GSM is usually software based, a search being performed one 200KHz FDMA channel at a time to locate a synchronization burst training sequence.

Synchronisation in CDMA may employ a matched filter or searcher fingers, arid is usually implemented in hardware. Synchronisation in CDMA is further described in

3GPP technical specification TS25.214V3.3.0, Annex C, Physical Layer Procedures

(FDD), available at www.3gpp.org, which is hereby incorporated by reference.

In a multimode terminal synchronization to GSM whilst receiving on a WCDMA channel is implemented by stopping the CDMA reception and then searching channel-

by-channel for a GSM signal. This is a relatively time consuming process and, in addition, switching between the 5MHz received bandwidth of W-CDMA and the 200KHz received bandwidth used by GSM can incur a power consumption penalty.

One option for speeding up this search is described in technical document Tdoc, SMG2 UMTS Ll 636/98, Siemens and the related 3GPP documents Simulation Results for Parallel GSM Synchronisation, TSGR1#4(99)398, TSGRAN Working Group 1 meeting #4, Yokohama, Japan, April 19-20, 1999; and Complexity Analysis for Parallel GSM Synchronisation, TSGR1#6(99)873, TSGRAN Working Group 1 (Radio) meeting #6, Espoo, Finland, 13-16 July l 999. These documents describe the use of parallel searching for frequency and synchronization bursts. This speeds up (GSM) synchronization time by around 20%, but there remains a need for faster synchronization and, preferably, reduced power consumption.

According to the present invention there is therefore provided a signal processor for a dual mode receiver for a mobile communications system, the dual mode receiver having a first mode for receiving a first signal of a first bandwidth and a second mode for receiving a second signal of a second bandwidth narrower than the first bandwidth, the signal processor comprising: a receiver front end for providing a received signal having substantially the first bandwidth, a decoder, coupled to said receiver front end, for decoding a said first signal from said received signal; a detector, coupled to said receiver front end, for detecting a said second signal within said received signal, said detector being configured to monitor a plurality of frequency divisions of said first bandwidth substantially simultaneously for a said second signal.

The parallelism provided by monitoring a plurality of frequency divisions substantially simultaneously for the second signal enables a simultaneous search for a number of second (narrowband) signals, for identifying and synchronising to a selected second signal. The reduction in second signal synchronization time saves power and also reduces the impact on the received CDMA signal, because fewer gaps in reception are needed. From a user's perspective this results in improved receive quality and potentially higher data rates. Where the first signal has a bandwidth of 5MHz and the second signal has a bandwidth of 200KHz synchronization may potentially be speeded up by a factor of 25. Synchronisation to two or more second signals can also enable the parallel use of multiple datastreams. Furthermore because the detector is coupled to a receiver front end which provides a signal of the first bandwidth, potential power consumption penalties incurred by switching between a wide and narrow receiver bandwidth may be avoided.

The signal processor may be employed in a mobile terminal, such as a multimode mobile phone handset, or in a base station, and may be embodied in hardware, or software, or a combination of the two. The receiver front end may provide a signal at baseband or at an IF (Intermediate Frequency) or higher radio frequency.

In a preferred embodiment the first signal comprises a signal for an IMT2000 standard 3G mobile phone network, in particular a CDMA signal, and more particularly (in Europe) a W-CDMA signal. The second signal may comprise a GSM-type signal, which includes such variants as DCS1800 and PCSl900.

Preferably the detector is configured to detect at least one, and preferably a plurality of synchronization signals within the second signal; such signals may comprise a synchronization burst where the second signal is a GSM-type signal. This assists in determining a time offset (ie time synchronization) for the second signal, and in channel equalization for the second signal. A complex, software-based solution to counter the effects of frequency error is not required as the terminal will already have compensated for crystal frequency error whilst utilising the W-CDMA service (the effects of Doppler induced frequency error do not have a significant impact on synchronization). In order to further speed up the synchronization process and reduce the

power consumption hardware rather than software may be employed for the synchronization task. In this case the hardware is preferably shared with the first signal decoder and may comprise, for example, a W-CDMA correlator, matched filter or searcher fingers.

For example a 5MHz bandwidth W-CDMA matched filter may be employed to process 25 GSM channels in parallel. The hardware may be shared on a timemultiplexed basis.

The signal processor may also be configured to measure signal strength (power) in one or more of the second signal frequency divisions or channels in order to facilitate selection of one or more of these channels for use. In other words, power measurements may be performed on narrowband channels within the first, wider band received signal, preferably in parallel, to speed up the power measurement process.

In one embodiment dual-ported memory is employed as a frame store to store a contiguous time slice of the received signal for subsequent processing. Preferably the memory comprises a pair of buffers so that one buffer may be written to whilst the other is being read.

Thus in a related aspect the invention also provides a receiver for a CDMA-based mobile phone system, the receiver including a narrowband signal detector, the detector . comprlsmg: storage for storing a time slice of a received signal; and search means for searching for at least one narrowband signal within said stored time slice.

In another related aspect there is provided a signal processor for a dual mode receiver for a mobile communications system, the dual mode receiver having a first mode for receiving a first signal of a first bandwidth and a second mode for receiving a second signal of a second bandwidth narrower than the first bandwidth, the signal processor comprising: a receiver front end for providing a received signal having substantially the first bandwidth;

a decoder, coupled to said receiver front end, for decoding a said first signal from said received signal; a detector, coupled to said receiver front end, for detecting a said second signal within said received signal substantially simultaneously with said decoding of said first signal. In this arrangement the second signal is detected substantially simultaneously with the decoding of the first signal, for example by storing time slices of the received signal so that two different processing operations may be performed on the signal substantially simultaneously. In this way, again, faster detection of and sychronisation to a second signal is possible. Preferably the first signal is a CDMA signal, more particularly a W-

CDMA signal, and preferably the second signal is a GSM-type signal.

The invention also provides a related method of identifying the presence of a second signal whilst receiving a CDMA signal, the second signal having a narrower bandwidth than the CDMA signal, the method comprising: receiving a signal for CDMA decoding; storing a portion of said received signal; searching said stored portion of said received signal for said second signal.

Preferably the searching searches two or more second signal frequency bands within the CDMA signal bandwidth substantially simultaneously, this parallelism speeding up the search process. In embodiments of the method the search may be performed whilst demodulating the CDMA signal.

The invention also provides code and a carrier medium carrying processor control code to implement the above described signal processing arrangements and methods. This processor control code may comprise computer program code, for example to control a digital signal processor, or other code such as a plurality of register values to set up a general purpose receiver integrated circuit to implement the above signal processing.

The carrier may comprise a data carrier or storage medium such as a hard or floppy disk, CD- or DVD-ROM, or a programmed memory such as a readonly memory, or an optical or electrical signal carrier. As the skilled person will appreciate the control code

may be also be distributed between a plurality of coupled components, for example over a network. The skilled person will further recognise that the invention may be implemented by a combination of dedicated hardware and functions implemented in software. These and other aspects of the invention will now be further described, by way of example only., with reference to the accompanying figures in which: Figure 1 shows the structure of a generic 3G mobile phone system; Figures 2a and 2b show, respectively, an example of a front end for a spread spectrum receiver, and a spread spectrum decoder according to the prior art;

Figure 3 shows the main elements of a spread spectrum rake receiver; Figure 4 shows an exemplary W-CDMA rake receiver for a digital mobile phone network; and Figure 5 shows a dual-mode signal processor in accordance with an embodiment of the present invention.

Referring now to Figure 5, this shows a schematic block diagram of one embodiment of a signal processor 500 for the front end of a dual mode receiver of a mobile communications terminal or base station.

An antenna 502 provides a signal to rf stages and analogue-to-digital converters 504, which provide a digitised (normally I and Q) output 505. As previously described digitization is typically carried out at IF but may be carried out at other frequencies.

The digitised signal 505 is provided to a conventional W-CDMA decoder/demodulator (not shown), normally implemented on ASICs and/or a digital signal processor. The digital signal processor may comprise some dedicated hardware, such as configurable matched filters, for CDMA signal handling.

In the dual mode processor 500 of Figure 5 the digitised output 505 is also provided to a selector or multiplexer 506 which steers the input to one of two outputs 508a, b depending upon the logic level on a control input 528. Each of the two outputs 508a, b provides an input to a respective frame store 51 Oa, b for writing data into the frame store. Each frame store has a respective output 512a, b for reading data from the frame store, together the two frame stores comprising a dual-ported double buffer framestore 510. The two read outputs 512a, b provide inputs to a second multiplexer 514 which selectively provides one of these signals on multiplexer output 515 according to the logic level on control input 530.

The two control inputs 528, 530 are both driven from a bank select line 524 from a control block 532, although an inverter 526 inverts the signal on control input 528 with respect to that on control input 530. Thus when bank select line 524 is active (say, logic high) the read output 512a of frame store 51 Oa is coupled to multiplexer output 515 and the right input 508b of framestore 51 Ob is coupled to the digitised signal input 505 by multiplexer 506. In this way data may be written to framestore S 1 Ob whilst framestore 51 Oa is read. When bank select line 524 is inactive (say, logic low) the converse applies and input 508a is coupled to output 505 and output 512b to multiplexer output 515 so that framestore 510a may be written whilst framestore 510b is read. This allows time slices of the received data, determined by the framestore length, to be substantially contiguously stored in the double buffer framestore 510.

The output 515 of multiplexer 514 is provided to a digital channel select filter 518 which, for GSM, has a 200KHz bandwidth. This filter is employed because the data captured by framestore 510 has, for W-CDMA, a SMHz bandwidth, as determined by the rf front end 504. The digital filter 518 is controlled by a frequency select output 534 from control block 532 which provides data for a coefficients store 536 and centre frequency offset information 538 for filter 518. Thus control block 532 is able to select one (or more) GSM FDMA channels from the digitised received signal for further processing. The output of digital filter 518 is provided to a matched filter 520 which, in the illustrated embodiment, has coefficients for locating a GSM synchronization channel

(SCH). Matched filter 520 has an output 522 which is provided to a general purpose digital signal processor (DSP) via a DSP interface schematically illustrated by dashed line 542. The DSP (not shown in Figure 5) is also in bidirectional communication with control block 532 as indicated by arrow 540.

For ease of representation the processing has been drawn in Figure 5 as a schematic block diagram but the skilled person will appreciate that, in practice, much of the processing is likely to be implemented in software. In some instances, however, the digital filter 518 and/or matched filter 520 may comprise dedicated hardware portions of a digital signal processor and/or ASICs. Similarly although in Figure 5 only one digital filter 518 and one matched filter 520 have been shown, preferably a plurality of channel select filters 518 and subsequent matched filters 520 are provided for processing a plurality of GSM channels in parallel. This may be implemented by multiple sets of filter hardware or by time multiplexing filter hardware or by implementing appropriate software processes. Thus, for example, the channel select filtering operation 518 and matched filtering operation 520 may be repeated, for example twenty- five times to process the twenty-five 200KHz GSM channels potentially present within the 5MHz CDMA bandwidth. It will be appreciated that the matched filter 520, in particular, may re-use a W-CDMA matched filter or equivalent processing may be implemented using CDMA searcher fingers or other correlators implemented for handling CDMA signals within the receiver of which the processor 500 forms a part. Depending upon the precise implementation control block 532 may also provide parameters for matched filter 520.

In operation digitised wideband received signals are stored in framestore 510 and then processed out of real time. The output S22 of matched filter 520 provides synchronization information which can, nonetheless, dehme a time within the real time received signal or, if preferred, within the buffered received signal. Thus the output 522 of matched filter 520 indicates whether or not a GSM signal is present within the selected channel and will also provide (time) synchronization information. The skilled person will also appreciate that the matched filter output 522 contains power level and channel equalization information which may be used to select one or more channels for further processing and, optionally, use. Where necessary resources may be shared

between CDMA reception and demodulation processes and GSM detection, synchronization and reception processes in a conventional manner, for example, making use of the discontinuous transmission (OTT) periods in the W-CDMA dedicated data (DPDCH) channel.

Embodiments of the invention such as signal processor 500 may be employed in either mobile phone. handsets or terminals or in base stations. Although the invention has been described with reference to digital mobile phone networks, the skilled person will also appreciate that it has applications in other radio systems, for example Hiperlan 2.

Similarly although the explicitly described embodiment processes W-CDMA and GSM signals the general principles are applicable to rapid location and synchronization for other combinations of wideband and narrowband signals. For example, the channel and matched filters could be configured for synchronizing to IS-95, digital AMPS, iDEN (Integrated Digital Enhanced Network), and, if desired, private mobile radio communications such as TETRA. Likewise the point in the signal chain at which digitization takes place will often be determined by the cost, availability and power consumption of suitable digital processing components and is not, in principle, restricted to any particular frequency or range of frequencies.

No doubt many other effective alternatives will occur to the skilled person and it will be understood that the invention is not limited to the described embodiments and encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.

Claims (23)

CLAIMS:

1. A signal processor for a dual mode receiver for a mobile communications system, the dual mode receiver having a first mode for receiving a first signal of a first bandwidth and a second mode for receiving a second signal of a second bandwidth narrower than the first bandwidth, the signal processor comprising: a receiver front end for providing a received signal having substantially the first bandwidth, a decoder, coupled to said receiver front end, for decoding a said first signal from said received signal; a detector, coupled to said receiver front end, for detecting a said second signal within said received signal, said detector being configured to monitor a plurality of frequency divisions of said first bandwidth substantially simultaneously for a said second signal.

2. A signal processor as claimed in claim I wherein said first signal comprises a CDMA signal and said second signal comprises a GSM-type signal.

3. A signal processor as claimed in claim 2 wherein said detector is configured to detect a synchronization channel of said GSM-type signal.

4. A signal processor as claimed in claim 3 wherein said detector comprises a matched filter.

5. A signal processor as claimed in claim 4 wherein said matched filter comprises hardware shared with said wideband CDMA decoder for wideband CDMA decoding.

6. A signal processor as claimed in claim I or 2 further comprising synchronization means for synchronizing to a plurality of said second signals within said received signal.

7. A signal processor as claimed in any preceding claim further comprising a digitiser to digitise said received signal and a memory to store a portion of said received

signal, and wherein said detector is configured to read data from said memory to detect said second signal in said received signal.

8. A signal processor as claimed in any preceding claim further comprising a decoder for said second signal.

9. A single processor as claimed in any preceding claim further comprising a signal strength detector to determine a signal strength of at least one said second signal.

10. A receiver for a CDMA-based mobile phone system, the receiver including a narrowband signal detector, the detector comprising: storage for storing a time slice of a received signal; and search means for searching for at least one narrowband signal within said stored time slice.

1 1. A receiver as claimed in claim 10 wherein said search means is configured to search for a plurality of said narrowband signals substantially simultaneously.

12. A receiver as claimed in claim 10 or 1 1 wherein the narrowband signal comprises a GSM-type signal.

13. A receiver as claimed in claim 10, 1 1 or 12 wherein said search means comprises a matched filter.

14. A receiver as claimed in claim 13 wherein said matched filter is shared with a CDMA signal processor.

15. A receiver as claimed in any one of claims 10 to 14 further comprising power measurement means for measuring the power of a said narrowband signal.

16. A receiver as claimed in any one of claims 10 to 15 further comprising a decoder for a said narrowband signal.

17. A signal processor for a dual mode receiver for a mobile communications system, the dual mode receiver having a first mode for receiving a first signal of a first bandwidth and a second mode for receiving a second signal of a second bandwidth narrower than the first bandwidth, the signal processor comprising: a receiver front end for providing a received signal having substantially the first bandwidth; a decoder, coupled to said receiver front end, for decoding a said first signal from said received signal; a detector, coupled to said receiver front end, for detecting a said second signal within said received signal substantially simultaneously with said decoding of said first signal. i.,

18. A method of identifying the presence of a second signal whilst receiving a CDMA signal, the second signal having a narrower bandwidth than the CDMA signal, the method comprising: receiving a signal for CDMA decoding; storing a portion of said received signal; searching said stored portion of said received signal for said second signal.

19. A method as claimed in claim 18 wherein said searching comprises searching a plurality of frequency divisions of said stored received signal portion substantially simultaneously for a said second signal.

20. A method as claimed in claim 18 or 19 wherein said searching comprises processing said stored received signal portion using hardware for Respreading said CDMA signal.

21. A method as claimed in claim 18, 19 or 20 wherein said second signal comprises a GSM-type signal.

22. A computer program to, when running, implement the signal processor of claim 1 or 17 or to perform the storing and searching of any one of claims 18 to 21.

23. A carrier medium carrying the computer program of claim 22.