GB2379754A

GB2379754A - Hardware revision identification apparatus using an oscillating R-C circuit

Info

Publication number: GB2379754A
Application number: GB0122176A
Authority: GB
Inventors: Nicholas Craig Bowdler
Original assignee: NEC Technologies UK Ltd
Current assignee: NEC Technologies UK Ltd
Priority date: 2001-09-13
Filing date: 2001-09-13
Publication date: 2003-03-19
Anticipated expiration: 2021-09-13
Also published as: GB0122176D0; GB2379754B

Abstract

An apparatus for revision identification in an electronic device comprises an electronic oscillating circuit having a selectable oscillating frequency, means for measuring the oscillating frequency of the circuit and means for executing software suitable for operating the current revision of the device in dependence on the measured oscillating frequency of the oscillating circuit. An identification list associates oscillating frequencies to hardware states of the device.

Description

An Apparatus for Hardware Revision Identification Using an R-C Circuit This invention relates to an apparatus for hardware revision identification using an R-C circuit.

Modern electronic products are frequently updated or changed resulting in different revisions or versions of the product. These revisions may be variations in the hardware state of the product. An example of a system in which hardware revisions are frequent are mobile telephone devices. The revisions are typically introduced to improve the performance of the device or to expel the effects of bugs.

Within a device, multiple hardware revisions need to be supported by a common software build. The software for operating multiple versions or hardware revisions of the device will typically be programmed into the microprocessor during manufacture. Each hardware revision will require unique software. Therefore the CPU must know the hardware state of the device and then run the software associated with that particular hardware state.

Typically an identity signal is associated with each hardware state. The CPU also contains a look up table which lists which identity signal is associated with which hardware state and software. Therefore when a particular identification signal is received by the CPU that signal will be recognised and the CPU will execute the software required by that version of the device.

Typically the identity signal for a hardware revision is implemented by use of dedicated CPU 1/0 ports. A CPU typically dedicates four pins to hardware identification

although other numbers are possible. Each pin can be set to high or low. Therefore four pins can support 16 different signals. Each individual signal corresponds to a particular hardware state. In this example the device can support 16 hardware states.

In modern systems it is beneficial to support a large number of hardware revisions. However increasing the number of pins available for hardware revision is problematic since both size and cost are important factors in production of electronic devices.

Preferred embodiments of the present invention to reduce the number of pins required to be dedicated to hardware identity and increase the possible number of hardware states supported by the device.

Embodiments of the present invention use an R-C circuit in which the value of the components can be changed in order to vary the oscillating frequency of the circuit. Part of the R-C circuit is internal to the device but the circuit is left open across two pins which protrude from the device. The R-C circuit is completed by electrically connecting the pins. Embodiments of the invention further enable the CPU to calculate the oscillation frequency of the circuit. A look up table is programmed into the CPU to associate a given oscillation frequency to a particular hardware state and software. In this way the CPU can recognise the hardware state of the device from the frequency of oscillation of the R-C circuit and execute the associated software.

Preferred embodiments of the invention only require two CPU I/O pins to be dedicated to hardware revision.

Furthermore the number of possible hardware revisions supported by the device is equal to the number of possible oscillation frequencies of the R-C circuit.

According to the present invention there is provided an apparatus for revision identification in an electronic device comprising; an electronic oscillating circuit having a selectable oscillating frequency, means for measuring the oscillating frequency of the oscillating circuit, and means for executing software suitable for operating the current revision of the device in dependence on the measured oscillating frequency of the oscillating circuit.

According to a further embodiment of the present invention there is provided a method for revision identification in an electronic device comprising the steps of; enabling an electronic oscillating circuit having a selectable oscillating frequency, measuring the oscillating frequency of the oscillating circuit, and executing software suitable for operating the current revision of the device in dependence on the measured oscillating frequency of the oscillating circuit.

Preferred embodiments of the present invention will now be described with reference to the accompanying drawings in which; Figure 1 shows a preferred embodiment of the R-C oscillatory circuit, Figure 2 is a block diagram showing a method for calculating the frequency of the circuit, Figure 3 is a block diagram showing the procedure for activating the software associated with a particular frequency of the R-C circuit.

Figure 1 shows a preferred embodiment of an R-C oscillating circuit 10 containing a first resistor 12, a second resistor 14, a first inverting gate 16, a second inverting gate 18, a capacitor 20, a first pin 22 and a second pin 24. The oscillating circuit is also referred to as the ID oscillator (identification oscillator).

The first resistor 12, second resistor 14, first inverter 16 and second inverter 18 are positioned within the device. The first pin 22 and second pin 24 protrude from the device. The capacitor 20 is positioned external to the device and completes the oscillating circuit.

The oscillating frequency of the R-C circuit 10 is determined by the value of the first resistor 12 and the capacitor 20 by the formula given by equation 1; f = 1/ (RIC1) Equation 1 where R2 Rl.

In general the components inside the device will be fixed after manufacture. The value of the external capacitor 20 can easily be changed by electrically connecting a capacitor of different value across the pins 22 and 24 thus changing the oscillation frequency of the circuit.

The circuit of Figure 1 is enabled by an enabling signal at 26. On enabling the circuit an oscillating signal is generated at the frequency peculiar to the components in the circuit as defined by Equation 1. The circuit can be enabled each time a hardware revision has been made and also the circuit would typically be enabled at power up.

In order to save power, embodiments of the invention may disable the oscillating circuit between these times.

Generally a greater variation in the value of capacitors is available compared with resistors. Therefore if a single component is positioned externally to the device it would be more efficient to position the capacitor in that location.

Further embodiments of the invention include R-C circuits with different combinations of capacitors and resistors positioned inside and outside the device.

Figure 2 shows the method for determining the frequency of the R-C circuit. The frequency of the ID oscillator 30 is measured against the internal clock 32 of the device.

Typically the internal clock will have a tolerance of better than 1 part per million allowing precise measurement of the frequency of the ID oscillator.

The number of oscillations of the ID oscillator is counted by counter 34 over a known number of clock oscillations.

The CPU knows the frequency of the internal clock 32. The number of clock oscillations during which the count was taken is also known by the CPU 36. The number of ID oscillations within the time period as counted by counter 34 is forwarded to the CPU 36.

The frequency of the ID oscillator is then calculated by the CPU using the known frequency of the internal clock, the number of oscillations of the internal clock over which the count was taken and the number of oscillations of the ID oscillator within that time period.

In Figure 3 the frequency of the ID oscillator is known at 40. The frequency is compared with an identification (ID) list which is stored within the CPU at 42. The ID list stores the association of each frequency of oscillation with a given hardware state. At 44 the hardware state of the system associated with the particular frequency is

identified. At 46 the software associated with the identified hardware state is identified. At 48 the correct software for the hardware state is executed.

It can been seen that preferred embodiments of the invention require only two dedicated I/O pins on the CPU and the number of hardware states supported by the device is only limited by the number of ID frequencies of the electrical circuit.

Claims

Claims 1. An apparatus for revision identification in an electronic device comprising; an electronic oscillating circuit having a selectable oscillating frequency, means for measuring the oscillating frequency of the oscillating circuit and means for executing software suitable for operating the current revision of the device in dependence on the measured oscillating frequency of the oscillating circuit.
2. An apparatus for revision identification in an electronic device of claim 1 where the electronic oscillating circuit is an R-C circuit.
3. An apparatus for revision identification in an electronic device of claim 1 or 2 where at least one component can be replaced.
4. An apparatus for revision identification in an electronic device of claim 1,2 or 3 where the oscillating frequency is measured against an internal clock.
5. An apparatus for revision identification in an electronic device of claim 1,2, 3 or 4 where access is available to software associated with each revision of the device.
6. An apparatus for revision identification in an electronic device of claim 1,2, 3,4 or 5 where the electronic oscillating circuit is enabled by an enabling signal.
7. An apparatus for revision identification in an electronic device of claim 1,2, 3,4, 5 or 6 where an

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identification list is accessible which associates oscillation frequencies to hardware states of the device.
8. An apparatus for revision identification in an electronic device as claimed in claim 1 substantially as herein described, with reference to the accompanying drawings.
9. A method for revision identification in an electronic device comprising the steps of; enabling an electronic oscillating circuit having a selectable oscillating frequency, measuring the oscillating frequency of the oscillating circuit, and executing software suitable for operating the current revision of the device in dependence on the measured oscillating frequency of the oscillating circuit.
10. A method for revision identification in an electronic device of claim 9 where the electronic oscillating circuit is an R-C circuit.
11. A method for revision identification in an electronic device of claim 9 or 10 where at least one component can be replaced.
12. A method for revision identification in an electronic device of claim 9,10 or 11 where the oscillating frequency is measured against an internal clock.
13. A method for revision identification in an electronic device of claims 9,10, 11 or 12 where an identification list is accessible which associates oscillation frequencies to hardware states of the device.

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14. A method for revision identification in an electronic device of claim 9,10, 11,12 or 13 where the electronic oscillating circuit is enabled by an enabling signal.
15. An apparatus for revision identification in an electronic device as claimed in claim 9 substantially as herein described, with reference to the accompanying drawings.