GB2373367A - Formation and processing of porous semiconductors using etching solution of oxidant and fluorine-containing Lewis acid - Google Patents

Formation and processing of porous semiconductors using etching solution of oxidant and fluorine-containing Lewis acid Download PDF

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GB2373367A
GB2373367A GB0030232A GB0030232A GB2373367A GB 2373367 A GB2373367 A GB 2373367A GB 0030232 A GB0030232 A GB 0030232A GB 0030232 A GB0030232 A GB 0030232A GB 2373367 A GB2373367 A GB 2373367A
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silicon
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Alexander Parbukov
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De Montfort University
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B33/00After-treatment of single crystals or homogeneous polycrystalline material with defined structure
    • C30B33/08Etching
    • C30B33/10Etching in solutions or melts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching

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Abstract

A method for the manufacture or post-manufacturing processing of porous semicondcutor material comprises treating substrate semiconductor material with an etching solution containing a semiconductor oxidant and a fluorine-containing Lewis acid. The fluorine-containing Lewis acid may be a fluorine-containing magic acid (e.g. SbF<SB>3</SB>.HF or SbF<SB>5</SB>HSO<SB>3</SB>F), or may be prepared by dissolution of fluorides in an aqueous or ether solution of hydrofluoric acid, or in gaseous hydrogen fluoride followed by solubilisation into an aqueous or ether solution. The Lewis acid may be prepared from ErF<SB>4</SB>, TiF<SB>4</SB>, ZrF<SB>4</SB>, BF<SB>3</SB>, PF<SB>5</SB>, SiF<SB>4</SB> and SbF<SB>5</SB>. The semiconductor oxidant may be a chemical that can dissociate to form the nitronium ion NO<SP>+</SP> in the etching solution (e.g. HNO<SB>3</SB>). The porous material may be used for a hydrocarbon sensor, where porous silicon (21) is coated by a metal layer (22). Other applications include light emission devices, display devices, integrated circuits, photo-detectors and waveguides, and medical prostheses and implants.

Description

Porous semiconductors The present invention relates to the formation of porous semiconductors, such as silicon, and subsequent use thereof, particularly in microelectronics.
Silicon plays an ubiquitous role in modem technology, especially so in the electronics industry where the majority of microelectronic chips are based on crystalline silicon wafers. Expanding the use of silicon requires a great understanding of silicon surface chemistry and an improvement in techniques for modifying silicon surfaces in a controllable manner.
Information obtained from studies on other porous semiconductors, such as germanium, gallium phosphide, gallium arsenide, cadmium sulphide, silicon carbide, indium phosphide and indium antimonide, has a significant contribution to make towards porous silicon technology (see review by Cullis, A. G. , Canham, L. T. and Calcott, P. D.
J. , 1997, J. Appl. Phys. 82f3) : 909-965). Furthermore, porous semiconductors with characteristics different from those of porous silicon may be desirable in particular applications.
Porous silicon was first made in the mid-1950's by modification of substrate silicon in hydrofluoric acid-based solutions (Uhlir, A. , 1956, Bell Syst. Tech. J. 35 : 333- 347). Interest in porous silicon has surged in recent years due to studies which demonstrated that porous silicon has photoluminescent properties (Canham, L. T. , 1990, Appl. Phys. Lett. 57: 1046-1048; Cullis et al., 1997, supra). Porous silicon and material created from its subsequent epitaxy, oxidation and/or selective etching has been used for the creation of semiconductors on insulator structures, metal-insulator-semiconductor condensers of large capacity, chemical sensors (e. g. gaseous and liquid, such as water) and biological sensors (Kazuo, J., 1981, Solid State Elect. 24 2U : 159-164; Anderson, R. C. , Muller, R. S. and Tobias, C. W. , 1990, Sensors Actuat. Ser. V. 23 (1-3) : 835-839; Thust, M. , Sconing, M. J. , Frohnhoff, S. , Areus-Fischer, R. , Kordos, P. and Luth, H., 1996, Meas. Sci. Technol. 7 : 26-29). Much work is needed, however, to enhance the efficiency of porous silicon in several of these application.
Envisaged applications, currently limited by manufacturing technology, include optoelectronic devices such as electroluminescent displays and photodetectors (see references in Buriak, J. M. and Allen, M. J., 1998, J. Am. Chem. Soc. 120: 13391340). An important optical property of porous silicon is electroluminescence (EL), which suggests great potential for the use of this semiconductor in devices such as light emitting diodes (LEDs) for the microelectronics industry (Hirschman, K. D. , Tsybeskov, L., Duttagupta S. P. and Fauchet, P. M. , 1996, Nature 384 : 338-341; Cullis et al., 1997, supra). One of the main attractions of porous silicon LEDs is that they are Very Large Scale Integration (VLSI)-compatible devices, but full realisation of the technology is not yet achievable (Cullis et al., 1997, supra).
The basic methods for producing porous semiconductor material can be divided into two classes: chemical/stain etching and electrochemical etching/anodisation.
Electrochemical etching is currently the preferred method for fabricating porous silicon, especially luminescent material, because of the reproducibility of results, and the range of porosity and thickness attainable (Cullis et al., 1997, supra). Electrochemical etching proceeds in the presence of an etching solution containing hydrofluoric acid, and an
applied current (10-80 mA/cm2). The etching solution commonly comprises water, with or without ethanol (C2HsOH), and hydrofluoric acid in the ratio of 1 : 1 or 1 : 2 : 1. For example, in about 15 minutes, anodisation can produce luminescent porous silicon films approximately 0.6 microns thick in etching solutions comprising water, ethanol (C2HsOH) and hydrofluoric acid.
Parameters which can be manipulated during anodisation include electrolyte composition and concentration, electrolyte temperature, current density, applied potential and design of the electrochemical cell (Cullis et al., 1997, supra). Light can also be employed to assist in the formation of porous silicon, a process called photoelectrochemical etching. The latter technique is widely used for the preparation of luminescent porous silicon, or porous oxidised silicon layers. Light energy in the UV and/or visible regions of the electromagnetic spectrum (2 x 10-7 to 7 x 10'm wavelength) has been utilised for enhancing the formation of porous silicon holes, required for silicon oxidation, in n-type single crystal silicon wafers during electrochemical etching (Cullis et al., 1997, supra).
Electrochemical etching has been employed for the formation of porous silicon structures which can be modified according to required application (e. g. US 4 532 700, US 4 995 954, US 5 156 986).
Porous silicon formation by electrochemical etching has several disadvantages which prevent many of the potential opportunities in the use of porous silicon. The drawbacks include: incomplete use of wafer area since the outer perimeter of the wafer was in contact with a seal in order to prevent the etch solution (containing hydrofluoric acid) contacting, corroding or causing short-circuiting of the electrode, incompatibility with standard silicon technology, inability to achieve group processing of wafers and insufficient uniformity of fabricated porous silicon films (Hamilton, B., 1995, Semicond. Sci. Technol. 10 : 1187-1207).
Current methods of porous silicon formation by stain etching do not provide a viable alternative to electrochemical etching, as stain etched porous silicon has even worse homogeneity than electrochemically etched porous silicon, and stain etching is plagued by reproducibility problems (Cullis et al., 1997, supra). Existing stain etching solutions consist of hydrofluoric acid and a small quantity of nitric acid (HN03) or other oxidising additives such as sodium nitrite (NaN02), sodium chromate (Na2CrO4), potassium permanganate (KMnO4) or chromic acid (car03, also known as green rouge) (Steckl, A. J. , Xu, L., and Mogul, H. C. , 1993, Appl. Phys. Lett. 52 (17) ; Kelly, M. T., Chun, J. K. M. , and Bocarsly, A. B. , 1994, Appl. Phys. Lett. 64 : 13-28; Turner, D. R., 1960, J. Electrochem. Soc. 107: 810). The use of such oxidising additives is not, however, suitable for the manufacture of microelectronic structures because the formation of metal ions in solution can contaminate the porous silicon and the silicon wafer. This contamination causes the microelectronic structures to have undesirable physical properties.
The etching process has a significant induction period (eg. 60-800 seconds) before porous silicon starts to form. According to Turner (1960, supra), this induction
period is caused by accumulation of the catalytically active reaction products HNO, and NOb the quantity of which is insignificant in the beginning, and then gradually increases at the expense of secondary processes of oxidation.
However, it was shown by later researchers (Kelly et al., 1994, supra) that the introduction of the salts NaNO2 or NOBF (which dissociate in an acid environment into the nitronium ion (NO+)) into the etch solution results in the etching of silicon immediately after immersing a substrate into the solution. In other words, the induction period is a process of accumulation of nitronium ions. The reduction-oxidation potential (ER = +1. 45 V) of nitronium ions is more than HNO2 (ER = +0.98 V) and the nitronium ion is considered (Kelly et al., 1994, supra) as the basic active oxidation agent.
In addition to its important luminescent properties, porous silicon is also utilised in the process for manufacturing patterned silicon for micromechanical devices such as pressure and vibration sensors, accelerometers, etc. Such devices require silicon structures with complex geometry and patterns. Techniques have therefore been developed for the selective removal of silicon so that by forming patterns of porous silicon and subsequently etching it away, patterned silicon structures can be formed (e. g.
US 4 995 954). Masks made of etch-resistant materials such as silicon nitride may be deposited onto semiconductor wafers in order to provide a template for forming etched patterns. Deposition of silicon nitride onto silicon substrate is a relatively complicated process, involving chemical vapour deposition (CVD) or plasma-deposition at high temperatures and low pressures (Sze, S. M. (ed. ), 1983, VLSI Technology, McGraw Hill Book Company, New York, ISBN 0-07-062686-3). Plasma chemical etching is then required for the formation of patterns ("windows") in the silicon nitride mask and, after formation of porous silicon through the mask, it is removed by phosphoric acid (H3PO4) at 160oC (Sze, 1983, supra). An improvement in the technology for porous semiconductor fabrication will assist the design and precision of patterned structures.
A further general problem which has affected porous silicon production is mechanical damage being caused by evaporation of the etching solution or water after washing. Capillary stress (dependent upon the surface tension of the evaporating liquid) simply cracks highly porous or thick structures (Bellet, D. , 1997; Cullis et al., 1997, supra).
The present invention addresses problems of the prior art by providing a novel etching method for the manufacture or post-manufacturing processing of porous semiconductors. This novel method results in desirable and enhanced properties of the treated porous semiconductor material, and provides multiple downstream technological advantages. Porous semiconductor material manufactured or treated according to the method provided by the present invention may be employed widely in the microelectronic industry.
Thus according to the present invention there is provided a method for the manufacture or post-manufacturing processing of porous semiconductor material, comprising treating substrate semiconductor material with an etching solution containing a semiconductor oxidant and a fluorine-containing Lewis acid, wherein said fluorinecontaining Lewis acid comprises any of the group of : (a) a fluorine-containing magic acid;
(b) a Lewis acid prepared by dissolution of fluorides of any of the group of elements comprising positively charged metal elements with a charge of at least two, boron, phosphorus, silicon, antimony and arsenic, in an aqueous or ether solution of hydrofluoric acid; and (c) a Lewis acid prepared by dissolution of fluorides of any of the group of elements comprising positively charged metal elements with a charge of at least two, boron, phosphorus, silicon, antimony and arsenic, in gaseous hydrogen fluoride, followed by solubilisation into an aqueous or ether solution.
Said fluorine-containing Lewis acids may be prepared from any one of the group of compounds comprising ErF4, TiF4, ZrF4, BF3, PF, SiF4 and SbF,.
There is a range of semiconductor materials which may be made porous or treated by the method of the present invention. The semiconductor material may be any one of the group comprising semiconductor elements from Group II, III, IV, V, VI of the periodic table or a compound thereof or an alloy. The semiconductor material may be any member of the group comprising polysilicon, single crystal silicon, microcrystalline silicon, silicon germanium (SiGe), diamond-like-carbon, Ta-C, microcrystalline silicon, semi-insulating polycrystalline oxygen doped silicon (SIPOS), silicon carbide and silicon oxynitride. The semiconductor material may be any member of the group comprising the AIIIBV and AIIBVI semiconductor structure or a compound thereof, for example gallium phosphide (GaP), gallium arsenide (GaAs), gallium antimonide (GaSb), indium phosphide (InP), cadmium telluride (CdTe), cadmium sulphide (CDs), indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs or AlxGaAs), copper indium selenide (CuInSe) and copper indium telluride (CuInTe2).
The semiconductor oxidant may be a chemical which can dissociate to form the nitronium ion (NO+) in said etching solution, for example nitric acid (HNO3) or any of the group comprising metal-nitrite salts, metal-nitrate salts, NOBF4, and semiconductor oxidants such as sodium chromate (Na ! r0 potassium permanganate (KMnO4), green rouge (CrQ), etc. The metal-nitrite ion may be sodium nitrite (NaNO2), and the metal-nitrate ion may be sodium nitrate (NaNO3).
The choice of semiconductor oxidant will be determined by downstream uses of the treated product. For instance, in the formation of microelectronic structures, the contamination of porous semiconductors with metal impurities is undesirable-nitric acid may be particularly useful in such cases. The term"oxidant", also called "oxidizer", is used herein to refer to a substance which oxidises another substance.
The fluorine-containing Lewis acid not being a magic acid may be any one of the group comprising fluoroboric acid (HBF4), hexafluorosilicic acid
(H2SiF6), hexafluorotitanic acid H TiF), hexafluorozirconic acid (kl ZrF), hexafluoroantimonic acid (HSbF6), hexafluoroantimonic tetrahydrate acid (HSbF6. 4H20), hexafluoroantimonic hexahydrate acid 6 (HSbF. 6H 0) and hexafluorophosphoric acid (HPFg).
Fluoroboric (HBF4) and hexafluorosilicic (H2SiF6) acids according to the present invention may be produced by bubbling gaseous boron fluoride (BF3) and silicon fluoride (SiF4), respectively, through a solution of hydrofluoric acid (procedures for dissolution of gaseous substances in liquid solutions are well known in the art). Hydrofluoric acid (HF) dissociation takes place according to the equation:
The concentration ofH2F ions is increased as gaseous boron fluoride is dissociated in hydrofluoric acid, as shown in the following equations:
Similarly for silicon fluoride, dissolution in hydrofluoric acid yields H2F + ions according to the equations :
The [BF4] and [SiF6 ions do not react with the semiconductor material in the etching solution-only the nitronium ion reacts with semiconductor material.
The fluorine-containing Lewis acid being a magic acid may be either
of the group comprising hydrofluoric acid-antimony trifluoride (SbF3. HF) and fluorosulfuric acid-antimony pentafluoride (SbFs. HSO3F).
The fluorine-containing Lewis acid and semiconductor oxidant may be present in said etching solution in a volumetric ratio of 49: 1 to 10000: 1, preferably in a ratio of 100: 1 to 5000: 1, and even more preferably in a ratio of 500: 1 to 1000: 1.
The concentration ratio of fluorine-containing Lewis acid to semiconductor oxidant dictates the reaction kinetics for the formation or processing of porous semiconductors-the reaction will be fastest at said ratio of 49: 1 (or may even result in polishing etching instead of pore formation) and slowest (or even stop the reaction) at said ratio of 10000: 1. The choice of this ratio therefore depends on the particular experiment. For example, the etching solution may comprise hydrofluoric acid and nitric acid in a volumetric ratio of 500: 1. In addition to the ratio and type of etching solution components, the porous semiconductor film thickness will be dependent on the type of substrate material utilised and the etching time.
The formation, for example, of porous silicon (PSi) structures according to the present invention can take place upon etching in stain etchers on silicon wafers which do not, initially, have surface structural defects. Some of experimentally observed features of this process are: (i) the presence of oxidant (for example, nitric acid) in the PSi-forming stain etcher is usually at a low concentration (for example, the ratio of 71% HN03 in 40% hydrofluoric acid (HF) may be 0.1-0. 5 %); (ii) after initiation in the stain etcher, PSi formation proceeds by selective etching, wherein the formation of porous structures occurs only in the presence of structural defects on the silicon surface; and (iii) stirring the stain etcher disturbs the process of formation of the PSi structureupon stirring or agitation, polishing etching is initiated.
These features suggest that surface structural defects in the silicon are created in the PSi-forming stain etchers of the present invention. Silicon in hydrofluoric acid will not become etched in usual conditions unless an oxidant (usually nitric acid) is present in the etcher composition. Nitric acid in the stain etchers is diluted by hydrofluoric acid (HF) several-fold. In the initial moment of etching on a silicon surface there is a very small quantity of oxidant ions. The interaction of the etcher with the silicon surface in the initial moment occurs at discrete points on the silicon surface in the presence of the oxidant ions. At these points, small volumes of silicon are etched away at some distance from each other.
Thus, local breaks in the silicon crystal structure are created, similar to local breaks created by ion implantation or by mechanical means (for example, surface scoring by an abrasive paper or sand). At these local breaks, selective etching proceeds into the depth of silicon crystal structure, with the subsequent formation of PSi. After the formation process of porous structure is initiated in stain etcher, it continues by selective etching (where the formation of porous structures does not take place without the presence of structural defects on a silicon surface).
Stirring of a stain etcher noted in feature (iii) above accelerates the diffusion of the oxidant to a silicon surface. Thus the quantity of oxidant ions on the silicon surface sharply increases and becomes sufficient for initiation of polishing etching, and the process of formation of porous structure is not initiated. Polishing etching, rather than porous silicon formation, is initiated even without stir when concentration of nitric acid in hydrofluoric acid exceeds 1 %.
The process of porous semiconductor (for example, PSi) formation continues in the etchers on a basis of the fluorine-containing Lewis acid (for example, hydrofluoric acid (if)) after initiation in the etcher solutions of the present invention without the need for independent formation of structural defects on the semiconductor (for example, wafer) surface.
In order to provide for the formation of porous material it is necessary to generate the correct concentration of nitronium ions in the etching solution and eliminate the action of other oxidants such as cations of acids. For example, the dissociation of nitric acid in the etching solution can be described by the following equations:
The nitrous acid (ho2) is the material for nitronium ion formation. As with acid dissociation, nitrogen acid is lightly dissociated into ions NO'and OH- :
This reaction is accelerated by strong acidic conditions. Hydrofluoric acid (HF) is a weak acid. Hydrogen fluoride in liquid form exists as zigzag polymer chains: H F-H F-HF H ( HFH = 134'). Increasing the acidity of the etching solution by increasing of concentration of a nitric acid (ho3) or addition of the strong acids (for example, sulfuric (H2SO4) or perchloric (HC104) acids) will result in a proportional increase of the cation concentration (NO3-, SO42- and ClO4-). These ions are oxidants. In this case, instead of formation of a PSi structure, polishing etching will take place.
The fluorides suitable for production of fluorine-containing Lewis acids by dissociation in hydrofluoride (HF) break the HF-zigzag polymer chains. Therefore, fluorine-containing Lewis acids used in the present invention have a high dissociation constant greater than acids such as nitric acid (HNO3), sulphuric acid (H2SO4) or perchloric acid (HCIO4), and subsequently the required quantity of nitronium ion is generated by dissociation ofHNO :, in a Lewis acid environment.
The fluorides also form strong complexes with the fluoride ion (F-). These complexes do not change their valency during the etching process, so only the nitronium ion reacts with semiconductor and oxidises it. These two remarkable properties of fluorine-containing Lewis acids promote the pore formation process.
Light is not necessary for the formation of porous silicon onto n-type single crystal silicon wafers during the etching process of the present invention: the formation of porous silicon may take place in said etching solution onto n-type single crystal silicon wafer in absolute darkness. For certain applications, however, the invented method may additionally employ light energy photoillumination in the visible and/or UV spectrum. Photoillumination used either during or subsequent to porous semiconductor formation in the novel chemical etch of present invention will allow for modification of luminescent spectra, emission intensity and structure of the porous semiconductor. Etching time and solution composition, including concentration of acids, have an effect on the intensity and wavelengths of photoluminescence and electroluminescence.
The method according to the present invention may additionally comprise the application of a photoresist mask onto the substrate semiconductor material to enable the formation of predetermined porous patterns on a semiconductor substrate. The invented etching solution does not attack photoresist masks, unlike the prior art stain etching and anodisation techniques (Kelly et al., 1994, supra). Photoresist mask application according to known techniques (Sze, 1983, supra) provides a significantly easier alternative to commonly employed silicon nitride masks, and allow porous semiconductor patterns to be scaled at the micron level. Thus light emission devices, solar cell or photo-detectors may be integrated onto a single microelectronic chip together with signal processing circuits and amplifiers.
After generating porous silicon (or other semiconductor herein disclosed) patterns on n-type silicon single crystal wafer (or other semiconductor substrate herein disclosed) using a photoresist mask in the present invention, the substrate may be treated with prior art anodisation techniques, without employing light, in order to further and selectively etch the porous semiconductor patterns. In this case, the porous silicon formation process will take place on stain etched porous silicon areas and will not take place on other non-etched silicon surface.
Thus porous semiconductor channels which penetrate the wafer may be made. The porous semiconductor may then be removed selectively (eg. KOH, NaOH and other alkali solutions selectively attack porous silicon), leaving the desired geometry and size of channels in the semiconductor wafer. This application may be useful for micro-electromechanical devices and capacitor technology.
Porous semiconductor material manufactured or processed according to the present invention may be used as a nucleating layer for the epitaxy of single crystal silicon, gallium arsenide, diamond layers or themselves.
As long as porous silicon has been formed by the present invention without current, any non-conductive material may be covered with porous silicon.
For example, polycrystalline silicon may have been deposited upon a nonconducting material. In practice polycrystalline silicon may be easily deposited onto silicon oxide, quartz, sapphire, ceramic etc. using standard techniques. Other appropriate non-conducting materials may be readily applied. Standard techniques such as silane (SiH4) pyrolysis or chemical vapour deposition of silicon etc (Sze, 1983, supra) are used to deposit the polycrystalline silicon upon the non-conducting material.
The porous polycrystalline silicon of the present invention is extremely regular in its structure, making it a good nucleating layer for epitaxy of single crystal silicon, gallium arsenide and diamond. Its use avoids the problems associated with crystal lattice incompatibilities experienced using other materials.
For example, it avoids the peeling of the gallium arsenide film epitaxially grown onto single crystal silicon. For the realization of epitaxial process it is necessary to have proper nucleating layer. This layer should consist of the single crystal phase for epitaxial growth of a single crystal (Sze, 1983, supra). All porous materials usually consist of single crystal clusters. Even the porous polycrystalline silicon, made by the method of the present invention, consists of single crystal clusters. In
particular, it is useful for the formation of silicon-on-insulator (SOI) structures for high-speed/radiation-proof integrated circuits (microelectronic chips) as well as in integrated circuits for use at high temperatures.
This simple process for manufacturing SOI structures compares extremely favourably with the existing techniques of buried oxide and wafer bonding. Single crystal silicon, single crystal gallium arsenide and diamond (not diamond-like film but diamond itself) have been successfully epitaxially grown onto silicon oxide, quartz, sapphire and ceramics using the porous polycrystalline silicon of the present invention.
The porous single crystal silicon of the present invention is also a good nucleating layer for epitaxy of monocrystalline silicon, gallium arsenide and diamond. (The polysilicon may have been formed upon non-conductive materials.) Other materials of the present invention may be formed upon nonconductive materials. They may also have been made porous by the method of the present invention and may also have been used as a good nucleating layer for epitaxy of single crystal silicon, gallium arsenide, diamond or themselves.
An extensive range of porous materials based on elements of Group II, III, IV, V, VI of the periodic table (silicon, germanium etc. ) or a compound thereof or an alloy, the A'"B\ AW semiconductor structures (gallium phosphide (GaP), indium gallium arsenide (InGaAs), gallium antimonide (GaSb), indium phosphide (InP), cadmium telluride (CdTe), cadmium sulphide (CDs), aluminum gallium arsenide AlGaAs (or Al,, Gal, As), copper indium selenide (CuInSe), copper indium telluride (CuInTe2) etc. ), diamond-like-carbon, Ta-C, microcrystalline silicon, semi-insulating polycrystalline oxygen doped silicon (SIPOS), silicon carbide, silicon oxynitride, silicon germanium as well as gallium arsenide and gallium nitride, after being made porous according to the method of the present invention, are also suitable candidates for providing a nucleating layer for the epitaxy of single crystal silicon, gallium arsenide, diamond and other materials including themselves as well.
For microelectronic manufacturing, it is necessary to have some control over the processing of epitaxial, implanted or doped layers. The thickness, depth of p-n-junctions and the specific resistance of these layers are important parameters.
Porous silicon formation according to the present invention shows an enhanced sensitivity to doping impurities. The speed of etching is dependent on the level and type of doping in different areas on the silicon wafer, and on these areas formatted porous silicon has different thickness and optical properties, so areas are coloured differently. The speed of etching may be varied by changing the ratio and concentration of fluorine-containing Lewis acid and silicon oxidant in the etching solution. By slowing down the etching process, very small differences (down to three to four-fold) of the concentration of doping impurity can be detected. That is, areas having a difference in concentration of doping impurity of 3-4 times will be coloured differently. For example, the level of gate doping impurities in metal oxide semiconductor (MOS) transistors can be readily detected.
The present invention provides reproducible reaction kinetics. It is possible to determine empirically the one-to-one correspondences between colour, ratio of etch components and the type and concentration of impurities for different types of wafers. Thus this method provides the possibility of determining the confines of doped areas as well as estimating the type and concentration of impurities. The resolution of the technique can be down to micron levels. The method of the present invention is fully compatible with VLSI technology and very useful for the restoration of lost topology of microelectronic chips.
The surface of porous semiconductor material manufactured or processed using the etching solution provided by the present invention is highly protonated, i. e. hydrogen passivated. The extent of protonation is greater than that achieved by the prior art. This novel characteristic has a number of advantages. For example, porous semiconductors produced according to the present invention are more stable against oxidation in air. Furthermore, a broad range of metals may be chemically deposited (without current) onto the surface of the porous semiconductor by the reduction of metal salts in aqueous or other solutions.
Also provided is a method for the deposition of metal layers onto porous semiconductor material, comprising the reduction of a metal salt in an aqueous solution onto porous semiconductor material manufactured or processed according to the present invention. The deposition may be electroless. The metal salt may be soluble in water. Porous semiconductor material manufactured or processed according to the present invention may be used as a substrate for electroless metal deposition.
The conjugate couples for metals during the chemical reduction of metals onto porous silicon surface are SiHx groups. The number of these groups decreases during chemical deposition onto porous silicon. The value of the
thermodesorption activated energy of SiH groups from the porous silicon surface . groups from the porous silicon surface indicates that the potential of the reaction is approximately-0.148 V. Therefore, any substance which has a standard electrode potential in aqueous solutions greater than-0.148 V may be chemically deposited onto the protonated porous silicon surface. The metal may for example be selected from any one of the group of platinum, palladium, bismuth, indium, copper, osmium, silver, gold, etc.
These advantages can also be obtained with porous silicon and other porous semiconductors initially produced using other techniques such as electrochemical etching and chemical etching of previous art. Once the porous silicon has been produced, it may be protonated by treating it with a fluorinecontaining Lewis acid other than hydrofluoric acid.
There is a range of porous materials produced by the method of the present invention onto which have been successfully chemically deposited the abovementioned metals, including polysilicon, single crystal silicon, microcrystalline silicon, silicon germanium (SiGe) as well as gallium arsenide (GaAs).
An extensive range of porous materials based on elements of Group II, III, IV, V, VI of periodic table (silicon, germanium etc. ) or a compound thereof or an alloy, the A'I'Bv, A"B semiconductor structures (gallium phosphide (GaP), indium gallium arsenide (InGaAs), gallium antimonide (GaSb), indium phosphide (InP), cadmium telluride (CdTe), cadmium sulphide (CDs), aluminum gallium arsenide AlGaAs (or AlxGaAs), copper indium selenide (CuInSe), copper indium telluride (CuInTe2) etc. ), diamond-like-carbon, Ta-C, microcrystalline silicon, semi- insulating polycrystalline oxygen doped silicon (SIPOS), silicon carbide as well as silicon oxynitride are also suitable candidates for the chemical deposition of the abovementioned chemicals onto its surface after making it porous by the method of the present invention.
The present invention therefore allows for the production of porous semiconductor (particularly silicon) regions of a given geometry and size on nonconducting substances, said regions being amenable to coating with transition or catalytic metals (for example, platinum or palladium). The end product may be manufactured according to VLSI technology, and the large surface to volume ratio of the coated catalysts may be valuable in the microelectronic industry.
The application of traditional porous bearers (such as activated carbon, silica gel, A1203, aluminum silicate, MgO, ZrO2, asbestos, diatomite, etc. ) coated with catalytic or transition metals and platinum and/or palladium sponge in microelectronic technology have processing complexities and can not be widely utilised. The fabrication of such bearers on silicon, silicon oxide, silicon nitride etc. is quite complicated or currently impossible. To coat these structures with metal requires high-temperature evaporation or sputtering of metal.
Also provided is a method for the production of a functional element of an electrical device wherein said functional element comprises a metal-coated semiconductor substrate produced according to the present invention. The electrical device may be a chemical sensor. The functional element may comprise a smooth catalytic metal layer deposited onto a semiconductor substrate. Porous silicon coated with catalytic metals may be used in microelectronics in chemical sensors based on catalytic reactions.
A range of functional (sensitive) elements of chemical sensors which are based on catalytic reactions have been described in the literature. These functional elements usually comprise smooth catalytic metal layers deposited onto a suitable substrate. The technological advantages of the present invention may be used for the manufacture of novel and improved functional elements of this type of sensor. Functional elements produced according the present invention may be manufactured according to VLSI technology and used in microelectronics.
Also provided according to the present invention is porous semiconductor material manufactured or processed according to any one of the methods described herein. Said semiconductor material may be highly hydrogen passivated. Also provided is a product comprising porous semiconductor material or derivatives thereof according to the present invention. Said product may be an electrical device.
Porous semiconductor material manufactured or processed according to the present invention may be used in the manufacture of an information display device, light emission devices, solar cells, photo-detectors and waveguides integrated together with signal processing circuits and amplifiers in one chip (which makes the device less expensive and potentially more powerful). Porous silicon manufactured or processed according to the present invention has more stable luminescence than prior art porous silicon.
The stain etch of the present invention is fully compatible with Very Large Scale Integration sub-micron silicon technology. Porous semiconductor materials manufactured or processed by the present invention may be used in the manufacture of Micro Electro-Mechanical Systems or VLSI technology as a sacrificial layer.
Porous semiconductor material manufactured or processed according to the present invention may be used in desorption-ionisation mass spectroscopy.
Recent advances in desorption-ionisation on silicon (DIOS) as applied to mass spectroscopy (Wei, J. , Buriak, J. M. and Siuzdak, G. , 1999, Nature 399: 243-246) has demonstrated the usefulness of porous silicon in this application.
Porous semiconductor material manufactured or processed according to the present invention may be used in the manufacture of a medical prosthesis. Porous semiconductor material manufactured or processed according to the present invention may also be used in the manufacture of a medical implant.
Porous silicon is not rejected by the human or animal body, and tissue may grow on and into it in a manner similar to the way that tissue grows into implanted coral. Thus material which would normally be rejected by the body may be coated with a layer of porous silicon according to the present invention, and then implanted into a patient without subsequent rejection. The layering of human-and animal-compatible porous silicon onto implant material may be applied in cases when it is necessary to attach epidermal tissue to bone. For example, it may be possible to make a prosthetic appliance which provides attachment of the teeth to gums.
Porous semiconductor material manufactured or processed according to the present invention may be used in the manufacture of an integrated circuit.
Porous semiconductor material manufactured or processed according to the present invention may be used in the manufacture of a silicon-on-insulator device.
Porous semiconductor material manufactured or processed according to the present invention may be used in the manufacture of a functional element of a chemical sensor device.
The invention will be further apparent from the following description and figures which show by way of example only methods for the manufacture of porous semiconductor materials, and their use.
Of the Figures: Figure 1 shows the functional (sensitive) element of a prior art hydrocarbon sensor; and Figure 2 show the functional resistor manufactured according to the present invention for use in a hydrocarbon sensor.
Production of Porous Materials by Stain Etching A silicon wafer any of group n-and p-type with resistance range from 0. 001-ohm cm to 100-ohm cm, crystal-lattice orientation [111], [100], [110] or [101], etc. , is placed into a bath containing etching solution. The etch solution comprises as a first component the Lewis acid from any of the group fluoroboric (HBF4) 50% conc., hexafluorosilicic (H iF) 630 % conc., hexafluorotitanic (H2TiF6) 60% conc., hexafluoroantimonic (HSbF) 98 % conc., and second component nitric acid (HN03) 70% conc. in volumetric ratio in the range from 1 : 200 to 1 : 700. A porous silicon film of 0.6 micron thickness forms within 15 to 60 minutes. The porosity of the porous layer is 30-80 % depending on the etch solution, type of silicon substrate and etching time. The formation of the porous film can be monitored by eye, the colour of the silicon wafer changing through brown, blue, yellow, green, red, raspberry and others. The colour depends on the type of silicon wafer etch solution and etching time. When the desired porous silicon layer has been formed, the reaction is terminated by rinsing in pure water (Millipore UK). The wafer is dried in air using a nitrogen blower. Nitrogen gas is used to speed up drying of the wafer. The invention provide reproducible reaction kinetics, so it is possible to find a one-to-one correspondence between colour and porous film thickness and estimate the doping in situ.
For example, a p-type 6-ohm cm silicon wafer with crystal-lattice orientation [100] is placed into a bath containing etching solution. The solution comprise fluoroboric acid (HBF4) 50% conc. and nitric acid (HN03) 70% conc. in volumetric ratio 1: 500. Porous silicon film with porosity about 53 % and 0.6 micron thickness is forms in 20 minutes. The porous silicon has strong luminescence, which can be observed under room light by the naked eye, using an exciting light wave-length 337 nanometers and density 10 milliwatt per cm2.
The problem affecting the production of porous silicon using methods other than that provided the present invention is that of mechanical damage, caused by the evaporation of the etching solution or water after washing-capillary stress (dependent upon the surface tension of the evaporating liquid) simply cracks highly porous or thick structures (Cullis et aI., 1997, supra). Such cracks have never been observed in porous silicon produced according to the method of the present invention.
As another example, gallium arsenide wafer s/c-type Si doped supplied by MCP Electronic Materials Ltd. , Alperton, Middlesex, England (lot No
WL 9030) is placed into a bath containing etching solution. The solution comprises fluoroboric acid (HBF4) 50% conc. and nitric acid (HNO) 70% conc. in volumetric ratio 1: 500. Porous gallium arsenide layer with porosity about 60 % and 0.5 micron thickness is formed in 30 minutes. When the desired porous gallium arsenide layer has been formed, the reaction is terminated by rinsing in pure water (Millipore UK).
The wafer is dried in air using a nitrogen blower. Nitrogen gas is used to speed up drying of the water. The porous gallium arsenide can display visible luminescence.
Naturally, the method described above is not restricted to the given choice of fluorine-containing Lewis acid, semiconductor oxidant or semiconductor substrate.
Production of porous materials by anodization using Lewis acids.
A silicon wafer of either n-or p-type with resistance range from 0. 001-ohm cm to 100-ohm cm and crystal-lattice orientation [111], [100], [101] or [110], etc. , is placed into an etching cell, varieties of which have been described in literature (Cullis et al., 1997, supra), containing the etching solution. The solution comprises as a first component any Lewis acid of the group fluoroboric (HBF4) 50% conc., hexafluorosilicic (H2SiF6) 30 % conc., hexafluorotitanic (H2TiF6) 60% conc., hexafluoroantimonic (HSbF6) 98 % conc., and second component ethanol (CzHsOH) in volumetric ratio 1 : 1, or the solution comprises as first component any of mentioned Lewis acids, ethanol (C2HsOH) and water in volumetric ratio 1 : 2: 1. A porous silicon film of about 0.6 micron thickness forms within 15 to 60 minutes.
The current density applied is usually 10-80 mA. CM, 2. A porous silicon layer about 1 micron thickness forms in 15 minutes. The porosity of the porous layer is 30-80 % depending on etch solution, type of silicon substrate and etching time. The porous silicon has strong luminescence, which can be observed under room light by the naked eye, at an exciting light wave-length 337 nanometers and density 10 milliwatt per cm2.
As another example, a p-type 6-ohm cm silicon wafer with crystallattice orientation [100] is placed into an etching cell, as described in literature (Cullis et al., 1997, supra), containing etching solution. The solution comprises fluoroboric acid (HBF4) 50% conc. ethanol (CjHOH) and water in volumetric ratio
Aj 1 : 2 : 1. The etching process at the current density 15 mA/cm2 results in formation of 1 micron thickness porous layer with porosity 47 % in 15 minutes. The porous silicon has strong luminescence, which can be observed under room light by the naked eye, at the exciting light wave-length 337 nanometers and density 10 milliwatt per cm2.
Naturally, the method described above is not restricted to the given choice of fluorine-containing Lewis acid, ratio of components and semiconductor substrate.
The photo and electroluminescence spectra of porous silicon produced by the method of the present invention does not differ in any essential features from those described in the literature. The luminescent spectra of porous silicon depend on the type of preparation (chemical/stain, electrochemical/anodisation or chemical/stain and electrochemical/anodisation prior art or present invention), conditions of preparation, acid (fluoroboric or hexafluorosilicic, hexafluorotitanic, hexafluorozirconic etc) concentration, current density, etching time, solution composition and the material itself (single crystal silicon polysilicon, microcrystalline silicon, semi-insulating polycrystalline oxygen doped silicon (SIPOS), silicon carbide, silicon oxynitride or silicon germanium). The porous materials of the present invention can display red, orange, yellow, or green emission.
Patterned porous silicon.
The photo resist mask is produced using positive photo resist The (,. e (RTM MICROPOSITAS1400 PHOTO RESIST and developer MICROPOSITMF-319 DEVELOPER (supplied by SHIPLEY EUROPE LIMITED, Herald Way, Coventry
CV3 2RQ) according to well known standard procedures (Sze, 1983, supra). The patterns are parallel lines 5 micron width and 5 cm length. The distance between lines is 10 micron. The stain etch process according to the method provided by the present invention (described supra) is finished within 60 minutes. The etch solution
of the present invention does not attack the photo resist mask. No damage of the
photo resist mask has ever been observed. The mask is removed after completion (RTM) of porous silicon formation by the remover MICROPOSIT^REMOVER 1165 A
according to well known standard procedures (Sze, 1983, supra). The removal of photo resist mask in remover solution results in partial deterioration of the luminescence of porous silicon. The porous silicon properties are restored by placing the wafer in the etching solution taught by present invention (supra) for 3 to 5 second, without producing de novo formation of porous silicon only onto the regions which were protected by the photo resist mask.
The colouring of doped regions.
A silicon wafer having doped impurities (by diffusion, ion implantation or epitaxially grown) is placed in a bath containing etch solution. The solution comprises as first component the Lewis acid any of the group of
fluoroboric (HBF4) 50% conc., hexafluorosilicic (H Snif) 10 % conc., hexafluorotitanic (H2TiF6) 60% conc., hexafluoroantimonic acid (HSbF6) 98 % conc., and as second component nitric acid (HNO3) 70% conc. in volumetric ratio from 1 : 200 to 1 : 10 000. The porous silicon formation results in differently doped regions being different colours. The one-to-one correspondence between colour ratio of etch components and type and concentration of impurities for different type of wafers is determined empirically.
The topology of a microelectronic chip is determined by the same procedure. The chip is taken from the chip package, the metal and SiO2 layer are removed by standard procedures (Sze, 1983, supra), and then the chip is placed in the etch bath. The junction depth is determined by colouring the bevelled samples (Sze, 1983, supra) using the same procedure. Bevelled samples are prepared using well known standard procedures (Sze, 1983, supra).
The best results in terms of sensitivity have been obtained using the etch solution consisting of fluoroboric acid (HBF4) 50% conc. and nitric acid (ho3) 70% conc. in volumetric ratio from 1: 500 to 1 : 10 000. Chemical Deposition of Metals: A freshly prepared porous silicon wafer (up to five hours old) and GaAs wafer are placed into a bath containing a 5 mg/l solution of platinum (IV) chloride (PtCI4) at room temperature. The (chemical) deposition of platinum on the porous silicon wafer commences immediately, as evident from a metallic surface appearing on the wafer.
A number of variables of the specific embodiment described here can be manipulated. The speed of metal deposition depends on the type, concentration (mM to M range) and temperature of the metallic salt (s) utilised, the nature of the substrate and the depth of metal deposition layer required. Visually, the substrate surface may become a black, red, brown or metallic colour depending on the metal (s) used.
Hydrocarbon Sensor Porous silicon coated with platinum has been used as a catalytic layer, in place of smooth platinum, for construction of a sensor device which measures hydrocarbon concentration in air.
Figure 1 shows the functional (sensitive) element of a hydrocarbon sensor employed in the prior art. The functional (sensitive) element 100 of standard hydrocarbon sensors comprises a silicon framework 1 with a multilayer silicon membrane 2. The silicon membrane 2 is produced by means of ion implantation and selective etching according to standard selective etching methods. Thus p-or n-doped regions 1-2 microns thick are generated by ion implantation, followed by selective etching. The basic bulk silicon wafer framework 1 is etched to produce the desired pattern on the membrane 2 imova-Malinovska, D. , Sendova Vassileva, M. , Tzenov, N. and Kamenova, M. , 1997, Thin Solid Films 297: 9-12;
Desmond-Colinge, C. A. and Gosele, U., 1998, MRS Bulletin 23 (12) : 30-34).
A 300-500 A (3-5 x 10-8 m) thick silicon oxide layer 7 is grown onto the working surface of the membrane 2 by plasma oxidation (Sze, 1983, supra). Sensor element 100 has two separate platinum resistors 3 and 30 located on the silicon oxide surface 7 of the silicon membrane 2. A 500 A (5 x 10-8 m) thick dielectric film 4 of silicon nitride (Si3N4) protects the resistors 3 and 30 from the influence of atmosphere at high temperatures (the working temperature of the sensor can reach several hundred Celsius degrees). The catalytic platinum layer 5 is deposited on platinum resistor 3 on top of the dielectric film 4. The resistor 3 with the catalytic layer 5 forms the sensitive element, while the other resistor 30 is a reference element.
The other surface of the sensor element 100 is coated with a continuous platinum layer which forms the heater layer 6. An electrical current is passed through the heater layer 6, heating both platinum resistors 3 and 30. The catalytic platinum surface 5 of the sensitive element catalyses the oxidation of hydrocarbons, an exothermic reaction which then results in an increase in temperature of the sensitive resistor 3. The quantity of heat energy released is proportional to hydrocarbon concentration in air. The temperature of the reference resistor 30, not being affected by an exothermic oxidation reactions, remains stable.
By determining the difference in resistivity between the functional resistor 3 and the reference resistor 30, the concentration of hydrocarbon can be determined through a signal processing circuit (not shown).
The signal processing circuits may be formed together with the sensitive element in one chip, because the membrane protects the bulk silicon crystal from the high temperature of heater and functional resistor.
If the difference in resistivity between the functional resistor 3 and reference resistor 30 does not provide a consistent signal for processing, the current passing through the heater layer 6 can be modified accordingly. In this way, the sensor 100 may be altered to accurately measure different ranges of hydrocarbon concentrations. Of course, the relationship between differences in resistor resistivity and hydrocarbon concentration has to be determined empirically for each type of hydrocarbon at certain current densities of the heater. The type of hydrocarbon sensor described here may be used, for example, to measure methane levels.
A further specific embodiment, a functional (sensitive) element of a hydrocarbon sensor manufactured according to the present invention, is shown in Figure 2. Basically, it is the same construction as a prior art device except for the functional resistor (element). The functional element 200 of the sensor comprised a silicon framework of size 3 x 3 mm with a multilayer insulating membrane 2 of 1-2 microns thick and 2.4 x 2.4 mm (external dimensions). Membrane 2 provides mechanical stability in the range of 20-600 Oc and stability at thermoshock up to 1000 C. The functional element 200 is made by first depositing polycrystal silicon on the dielectric insulating film 4 using SiF4 pyrolysis, and then forming porous silicon 21 from the polycrystal silicon using a stain etching solution provided by the present invention. A platinum layer 22 is then coated onto the porous silicon 21 by chemical deposition as taught in the present invention. After coating, the element
200 is heated in a vacuum (P=10-) at 30C C for 30 minutes. Thereafter, the 10 Angstrom (Ix 10 m) platinum layer is deposited by splutter deposition or chemical vapour deposition (Sze, 1983, supra). This treatment is made to avoid catalyst poisoning. The formation of platinum and palladium silicide and silicon dioxide occur at the working temperature of the sensor on the porous silicon surface coated with platinum and palladium.
When the sensor device constructed according to the present invention was tested, it was shown that the device had an enhanced sensitivity for hydrocarbons, a faster response time to changes in hydrocarbon concentration, and a lower energy consumption (0.35 W as compared to 0.58 W for a smooth metal sensor). Furthermore, this specific embodiment requires simple fabrication at a lower cost than existing sensors employing a platinum and palladium sponge.

Claims (32)

  1. CLAIMS 1. A method for the manufacture or post-manufacturing processing of porous semiconductor material, comprising treating substrate semiconductor material with an etching solution containing a semiconductor oxidant and a fluorine-containing Lewis acid, wherein said fluorine-containing Lewis acid comprises any of the group of : (a) a fluorine-containing magic acid; (b) a Lewis acid prepared by dissolution of fluorides of any of the group of elements comprising positively charged metal elements with a charge of at least two, boron, phosphorus, silicon, antimony and arsenic, in an aqueous or ether solution of hydrofluoric acid; and (c) a Lewis acid prepared by dissolution of fluorides of any of the group of elements comprising positively charged metal elements with a charge of at least two, boron, phosphorus, silicon, antimony and arsenic, in gaseous hydrogen fluoride, followed by solubilisation into an aqueous or ether solution.
  2. 2. The method according to claim 1 wherein said fluorine-containing Lewis acid is prepared from any one of the group of compounds comprising ErF4, TiF4, ZrF4, BF3, Pifs, SiF4 and SbFs.
  3. 3. The method according to either one of claims 1 or 2 wherein said semiconductor material is any one of the group comprising semiconductor elements from Group II, III, IV, V, VI of the periodic table or a compound thereof or an alloy.
  4. 4. The method according to any one of claims 1-3 wherein said semiconductor material is any member of the group comprising polysilicon, single crystal silicon, microcrystalline silicon, silicon germanium (SiGe), diamond-likecarbon, Ta-C, microcrystalline silicon, semi-insulating polycrystalline oxygen doped silicon (SIPOS), silicon carbide and silicon oxynitride.
  5. 5. The method according to any one of claims 1-3 wherein said
    semiconductor material is any member of the group comprising the AXlXBv and AIIB VI semiconductor structure or a compound thereof.
  6. 6. The method according to claim 5 wherein said semiconductor material is any member of the group comprising gallium phosphide (GaP), gallium arsenide (GaAs), gallium antimonide (GaSb), indium phosphide (InP), cadmium telluride (CdTe), cadmium sulphide (CDs), indium gallium arsenide (InGaAs), aluminum gallium arsenide (AlGaAs or AlxGaAs), copper indium selenide (CuInSe) and copper indium telluride (CuInTe).
  7. 7. The method according to any one of claims 1-6 wherein said semiconductor oxidant is a chemical which can dissociate to form the nitronium ion (NO+) in said etching solution.
  8. 8. The method according to claim 7 wherein said semiconductor oxidant is any one of the group comprising nitric acid (HN03), NOBF4, sodium chromate (Na2CrO4), potassium permanganate (KMnO4) and green rouge (CrO3).
  9. 9. The method according to claim 7 wherein said semiconductor oxidant is any one of the group comprising the metal-nitrite salts and the metal-nitrate salts.
  10. 10. The method according to claim 9 wherein said semiconductor oxidant is any one of the group comprising sodium nitrite (NaNO2) and sodium nitrate (NaNO3).
  11. 11. The method according to any one of claims 1-10 wherein said fluorine-containing Lewis acid not being a magic acid is any one of the group
    comprising fluoroboric acid (HBF4), hexafluorosilicic acid QT SiF), hexafluorotitanic acid (H2TiF6), hexafluorozirconic acid (H ZrF), 6 hexafluoroantimonic acid (HSbF6), hexafluoroantimonic tetrahydrate acid (HSbF6. O), hexafluoroantimonic hexahydrate acid (HSbF. OH OJ and hexafluorophosphoric acid (HPFJ.
  12. 12. The method according to any one of claims 1-11 wherein said fluorine-containing Lewis acid being a magic acid is either one of the group comprising hydrofluoric acid-antimony trifluoride (SbF3. HF) and fluorosulfuric acid-antimony pentafluoride (SbF. HSO3F).
  13. 13. The method according to any one of claims 1-12 wherein said fluorine-containing Lewis acid and said semiconductor oxidant are present in said etching solution in a volumetric ratio of 49: 1 to 10000: 1, preferably in a ratio of 100: 1 to 5000: 1, and even more preferably in a ratio of 250 : 1 to 1000: 1.
  14. 14. The method according to any one of claims 1-13 additionally employing light energy photoillumination in the visible and/or UV spectrum.
  15. 15. The method according to any one of claims 1-14 wherein a photoresist mask is applied onto the substrate semiconductor material.
  16. 16. The method according to claim 15 wherein said photoresist mask enables the formation of predetermined porous patterns on the semiconductor substrate.
  17. 17. The method according to any one of claims 1-16 wherein the manufacture or post-manufacturing processing of porous semiconductor material is monitored using the optical properties of the material during the treatment.
  18. 18. A method for the epitaxy of further semiconductor material wherein porous semiconductor material manufactured or processed according to any one of claims 1-17 is used as a nucleating layer.
  19. 19. The method according to claim 18 wherein said further semiconductor material is any one of the group comprising single crystal silicon, gallium arsenide, and diamond layers.
  20. 20. A method for the deposition of metal layers onto porous semiconductor material manufactured or processed according to any one of claims 1-17 comprising reduction of a metal salt in an aqueous solution onto said porous semiconductor material.
  21. 21. The method according to claim 20 wherein said deposition is electroless.
  22. 22. The method according to either one of claims 20 or 21 wherein said metal salt is soluble in water.
  23. 23. The method according to any one of claims 20-22 wherein said metal is any one of the group comprising platinum, palladium, bismuth, indium, copper, osmium, silver and gold.
  24. 24. A method for the production of a functional element of an electrical device wherein said functional element comprises a metal-coated semiconductor substrate produced according to any one of claims 21-23.
  25. 25. The method according to claim 24 wherein said electrical device is a chemical sensor.
  26. 26. The method according to either one of claim 24 or 25 wherein said functional element comprises a smooth catalytic metal layer deposited onto a semiconductor substrate.
  27. 27. Porous semiconductor material manufactured or processed according to any one of claims 1-26, or derivates thereof.
  28. 28. Porous semiconductor material according to claim 27, characterised in that said material is highly hydrogen passivated.
  29. 29. A product comprising porous semiconductor material or derivatives thereof according to either one of claims 27 or 28.
  30. 30. The product of claim 29 being an electrical device.
  31. 31. The product according to claim 30 wherein the electrical device is any one of the group comprising: information display devices, light emission devices, solar cells, integrated circuits, photo-detectors and waveguides integrated together with signal processing circuits and amplifiers in a chip, Micro Electro-Mechanical Systems, VLSI technology products, desorption-ionisation mass spectroscopy (DIOS) devices, silicon-on-insulator devices.
  32. 32. The product of claim 29 being any one of the group comprising medical prostheses and medical implants.
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