GB2369972A - Method of encoding data to produce balanced codes - Google Patents
Method of encoding data to produce balanced codes Download PDFInfo
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- GB2369972A GB2369972A GB0029703A GB0029703A GB2369972A GB 2369972 A GB2369972 A GB 2369972A GB 0029703 A GB0029703 A GB 0029703A GB 0029703 A GB0029703 A GB 0029703A GB 2369972 A GB2369972 A GB 2369972A
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- 238000000034 method Methods 0.000 title claims description 66
- 238000004891 communication Methods 0.000 claims abstract description 13
- 239000003550 marker Substances 0.000 claims description 20
- 238000000638 solvent extraction Methods 0.000 claims description 6
- 238000013519 translation Methods 0.000 claims description 3
- 230000003287 optical effect Effects 0.000 abstract 1
- 230000004044 response Effects 0.000 description 4
- 238000003491 array Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000013307 optical fiber Substances 0.000 description 2
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- 238000013459 approach Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
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- 238000005192 partition Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 238000009877 rendering Methods 0.000 description 1
- 238000007363 ring formation reaction Methods 0.000 description 1
- 239000004576 sand Substances 0.000 description 1
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- 230000001360 synchronised effect Effects 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/31—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining coding for error detection or correction and efficient use of the spectrum
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M5/00—Conversion of the form of the representation of individual digits
- H03M5/02—Conversion to or from representation by pulses
- H03M5/04—Conversion to or from representation by pulses the pulses having two levels
- H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
- H03M5/145—Conversion to or from block codes or representations thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
- H04L25/40—Transmitting circuits; Receiving circuits
- H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
- H04L25/4906—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes
- H04L25/4908—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using binary codes using mBnB codes
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- Signal Processing (AREA)
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- Probability & Statistics with Applications (AREA)
- Dc Digital Transmission (AREA)
Abstract
The invention is concerned with producing balanced, robust coding schemes that also incorporate markers for synchronisation purposes. In a preferred embodiment a 4/6 coding scheme is used, i.e. each four bit input data block is mapped to a unique, balanced six bit output (see table 1 on page 6 for details). Single bit errors in the encoded data can be detected at a receiver since each six bit block should have an equal number of logic zeros and ones. Certain bit patterns are allocated to markers, including 000111 and 111000 for denoting frame boundaries, and 010101 and 101010 for alarm indication purposes. Other encoding schemes referred to are 1/4, 6/8, 7/10, 9/12, 11/14 and 13/16. Application is to an optical ring communications network (figure 1).
Description
METHOD OF ENCODING DATA
The present invention concerns a method of encoding data. Moreover, the invention also relates to a corresponding method of decoding data. Furthermore, the invention also relates to an apparatus operating according to one of more of the method of encoding data and the method of decoding data according to the invention. The present invention is especially pertinent to, but not limited to, communication systems.
Contemporary communication systems each include a plurality of nodes mutually interconnected through communication paths, for example optical fibre waveguides. In an example contemporary system, information is conveyed in the form of digital data. Clients connected to input nodes of the system provide information to the input nodes. The information is encoded at the input nodes to generate corresponding encoded data which is then communicated to output nodes of the system. At the output nodes, the encoded data is correspondingly decoded to reconstitute the information which is then output to other clients connected to the output nodes.
The output nodes need to synchronize to the encoded data for purposes of decoding it. Moreover, to provide the system with a favourably low bit error rate performance, the encoded data has to be in a form which is robust to corruption, for example robust to burst noise. Moreover, the output nodes will often include high-pass filter stages handling the encoded data for removing static offsets, for example for removing offsets arising in photodetectors. Such high-pass filter stages and associated threshold detection circuits rely on their being substantially a similar number of logic 0 states and logic 1 states in the encoded data otherwise the threshold circuits can generate spurious output or become sensitive to system noise. There therefore arises simultaneously three problems of : (a) synchronizing to the encoded data; (b) balancing the number of logic 0 and logic 1 states in the encoded data; and (c) rendering the encoded data robust to corruption for obtaining a satisfactorily low bit error rate.
Encoding schemes known in the prior art do not adequately address these three problems simultaneously; they tend to cope satisfactorily with only two of the three problems.
The inventor has therefore devised a method of encoding data which is capable of addressing the aforementioned three problems simultaneously. Moreover, the inventor has also devised a corresponding method of decoding data.
Thus, according to a first aspect of the present invention, there is provided a method of encoding data, the method including the steps of: (a) receiving input data to be encoded and then partitioning the input data into data blocks; (b) translating the blocks into corresponding encoded equivalents; and (c) assembling the encoded equivalents together to generate output encoded data, the method characterised in that: (d) each encoded equivalent includes equal numbers of logic 0's and logic l's ; (e) the encoded equivalents are mutually distinguishable such that a single bit error in one or more of the equivalents is unambiguously detectable; (f) at least one equivalent included in the output encoded data is a marker equivalent for denoting where equivalents occur in the output encoded data for synchronisation purposes; and (g) each value of data block uniquely maps onto a corresponding encoded equivalent.
The method of the invention provides the advantage that it is capable of simultaneously addressing issues of balance, synchronisation and improving robustness to errors.
Preferably, the marker equivalent is operable to denote frame boundaries within the output encoded data. Use of marker equivalents is beneficial to assist with synchronising to the output encoded data when subsequently decoding it. More preferably, the marker equivalent is of a form which is readily identifiable in the output data, for example by arranging for the marker equivalent to have its logic l's grouped consecutively together and its logic 0's grouped consecutively together.
In communication systems, a situation frequently arises where it is necessary to send an alarm signal, for example where an item of equipment has failed or imminent failure is likely to occur.
In order to convey alarm information, it is preferable that at least one of the equivalents is reserved for alarm indication purposes. It is especially preferable that there are two equivalents reserved for alarm indication purposes, the two equivalents corresponding to the alternative bit patterns... 0101... and... 1010....
The inventor has appreciated that the method of encoding data according to the invention can employ a number of alternative coding schemes. Such alternative coding schemes for translating blocks into corresponding equivalents preferably involve the use of one of the following coding schemes : [4, 1], [6, 4], [8, 6], [10, 7], [12, 9], [14, 11], [16, 13]. The inventor has also appreciated that the coding scheme should preferably satisfy a criterion:
where a parameter K is the number of bits in each of the partitioned blocks, a parameter N is the number of bits in each of the equivalents, and a parameter B is the number of equivalents reserved for one or more of alarm and synchronisation functions.
In practical communication hardware, the inventor has found it especially appropriate to employ a [6, 4] coding scheme employing the following equivalents to uniquely represent 4-bit blocks: 001011,001101, 001110, 010011,010110, 011100,011010, 011001,110100, 110010,110001, 101100,101001, 100011,100101, 100110. This coding scheme provides an especially appropriate performance in terms of simplicity of code and data overhead. Moreover, the inventor has appreciated that it is also especially convenient in the coding scheme that at least one equivalent has the form 000111,111000 for denoting frame boundaries in the output data.
Furthermore, it is found especially beneficial to employ a coding scheme as presented in Table 1.
In a second aspect of the present invention, there is provided a method of decoding data, the method including the steps of : (a) receiving input encoded data to be decoded and then identifying where marker equivalents in the encoded data occur and thereby partitioning the encoded data into equivalents; (b) translating the equivalents into corresponding decoded data blocks ; and (c) assembling the decoded blocks together to generate output decoded data, the method characterised in that: (d) each encoded equivalent includes equal numbers of logic O's and logic l's ; (e) the encoded equivalents are mutually distinguishable such that a single bit error in one or more of the equivalents is unambiguously detectable;
(f) at least one of the equivalents is a marker equivalent for denoting where equivalents occur in the output encoded data for synchronisation purposes ; and (g) each value of data block uniquely maps onto a corresponding encoded equivalent.
In a third aspect of the present invention, there is provided an apparatus for at least one of decoding and encoding data according to the methods of the first and second aspect of the invention.
In a fourth aspect of the present invention, there is provided a communication system including an apparatus according to the third aspect of the invention.
Embodiments of the invention will now be described, by way of example only, with reference to the following diagram in which:
Figure 1 is a schematic diagram of a communication system arranged in a ring formation including a transponder path overhead device operable to encode and decode data according to the invention.
In Figure 1, there is shown a communication system indicated generally by 5. The system 5 comprises a transponder path overhead device 10 coupled to a communication ring 15. The ring 15 further comprises a plurality of nodes therearound, for example a node 20. The ring 15 includes two communication paths 25,30 for conveying traffic in clockwise and counterclockwise directions around the ring 15 respectively. The two paths 25,30 are employed for security in case communication along one of the paths becomes disabled, for example due to an optical fibre waveguide break.
The device 10 is operable to receive encoded data propagating in a clockwise direction around the ring 15 at its West RX input port, and also to receive encoded data propagating in an counterclockwise direction around the ring 15 at its East RX input port. Moreover, the device 10 is operable to decode the encoded data received thereat, the data encoded according to a method of the present invention. Furthermore, the device 10 is operable to encode data therein according to the method to generate corresponding encoded data for output at a TX Data output port of the device 10; this TX Data output can be optionally coupled to the ring as illustrated.
The device 10 is implemented using field programmable gate arrays (FPGA) which operate from a 3.3 volt power supply. The arrays employ LVTTL logic levels at their interfaces.
Component parts of the device 10 will now be described with reference to Figure 1. The device 10 comprises a first frame alignment interface 50 coupled to a first data extractor 60, a second frame alignment interface 70 coupled to a second data extractor 80, a microprocessor interface 90 connected to the first and second data extractors 60,80, and a transmit data injector 100 coupled to the microprocessor interface 90 and to a transmit frame generator 110. Moreover, the data injector 100 includes the aforesaid TX Data output port. The first and second frame alignment interfaces 50,70 include the aforementioned input ports West RX and East RX respectively.
In operation, the first and second alignment interfaces 50,70 receive encoded data comprising frame information at the input ports West RX, East RX respectively. The interfaces 50,70 synchronize to frames in the data and output synchronised data to the first and second data extractors 60,80 respectively. Decoded data from the extractors 60,80 is output therefrom to the microprocessor interface 70 which interprets the data and outputs, if required, response data to the data injector 100. The injector 100 encodes the response data according to the method of the invention, partitions the encoded response data into frames generated by the frame generator 110 and then outputs the framed encoded response data at the TX Data output port.
In the following description, a specific example of a method of encoding data according to the present invention will initially be described. Thereafter, a general approach to selecting encoding schemes for the method will be elucidated.
In operation, the device 10 receives at its frame alignment interfaces 50,70 a data stream from the ring 15. In the stream, base-16 (hexadecimal) characters"0"to"F"are each represented by 6-bit equivalents. The characters and their corresponding equivalents are listed in Table 1 :
Table 1
Character Binary Encoded equivalent Character Binary Encoded equivalent name data according to the name data according to the pattern invention pattern invention "0000001011F1000110100 "1" 0001 001101 "9" 1001 110010 "2"0010 001110"A"1010 110001 0011010011Tr1011101100 "4" 0100 010110 "C" 1100 101001 "5"0101 011100"D"1101 100011 "6" 0110 011010 "E" 1110 100101 "7" 0111 011001 "F" 1111 100110 In Table 1, it is to be noted that: (a) all the encoded equivalents are balanced, namely each equivalent includes three logic O's and three logic 1's ; (b) all the encoded equivalents include at least two transitions from 0 to 1 or vice versa; (c) the encoded equivalents for the characters"0"to"7"are negated versions of the encoded equivalents for the characters"8"to"F'respectively ; (d) a consecutive pair of encoded equivalents in the data stream include no more than four consecutive logic O's or logic 1's ; (e) a single bit error in any of the equivalents is immediately detectable; and (f) alternative patterns 101010 and 010101 in the equivalents are not used for representing characters for circumventing potential ambiguity.
When encoding data to the device 10 according to the invention, it is preferable that the data is sent with most significant bits first. For example, a data byte 00010110 comprises corresponding hexadecimal characters"16"which is represented by encoded equivalents in a form 001101011010 where left hand side logic digits are received before right hand side digits; in other words, with time travelling from left to right.
The method of encoding data and the method of decoding data of the present invention reserve encoded equivalents Y=000111 and Z= 111 000 as special characters for frame alignment purposes. Thus, the frame alignment interfaces 50,70 are operable to scan data streams received thereat for the equivalents Y, Z and use them for identifying where frames occur in the data streams when synchronising to equivalents included within the frames.
Characters and their corresponding equivalents depicted in Table 1 represent a specific example of the present invention where 4-bit characters are encoding into corresponding 6-bit encoded equivalents. However, the method of the invention is capable of being adapted to providing equivalents including other numbers of bits.
Thus, the method of encoding data in the device 10 requires the following steps to be formed: (a) receiving an input stream of data to be encoded; (b) partitioning the stream into a plurality of 4-bit blocks corresponding to the characters in
Table 1; (c) translating the blocks into corresponding equivalents as depicted in Table 1; (d) assembling the equivalents together to form an encoded data stream; (e) inserting synchronisation marker equivalents, for example the equivalents Y, Z, at periodic intervals into the encoded data stream, the marker equivalents being included for denoting where frames occur within the encoded data stream; and (f) outputting the encoded data stream including the marker equivalents.
Moreover, the method of decoding data in the device 10 requires the following steps to be performed: (a) receiving an encoded stream of data to be decoded; (b) correlating bit templates corresponding to marker equivalents, for example the equivalents Y, Z, to determine where marker equivalents occur in the encoded stream of data, thereby synchronizing to frames of the encoded stream of data; (c) partitioning the encoded stream into blocks corresponding to equivalents therein; (d) translating the equivalents into corresponding characters as depicted in Table 1 but ignoring marker equivalents for translation purposes; (e) assembling the translated characters into a decoded data stream and then outputting the decoded data stream.
In a generalised case of the method of encoding data according to the invention, an input data stream to be encoded includes consecutive blocks of data, each block including K data bits. Each block is converted by the method into encoded equivalents, each equivalent comprising N data bits. The equivalents are code-words which each comprise equal numbers of logic 0'sand l's ; in the other words, the code-words are said to be balanced.
When decoding data according to the method in the device 10, N-bit code-words are gathered.
Each code-word is then decoded to yield its corresponding K-bit block of data. Such decoding is known as an [N, K] coding scheme. Because all the code-words are balanced and as a single bit error in a code-word will always create an imbalance, it will be appreciated that all possible equivalents will unambiguously reveal single bit errors.
In addition to 2K encoded equivalents which convey corresponding characters, each character represented by a data block of K bits and each equivalent including N bits, B additional equivalents are preferably reserved for special functions. B is preferably numerically equal to 4 but can have other values. When B is 4, two or these four additional equivalents are beneficially reserved for special purposes, for example the aforementioned Y and Z equivalents are reserved for frame alignment purposes; another two of these four additional equivalents are alternating
patterns... 010101... and... 101010... which are preferably reserved for indicating an alarm situation. Thus, given B additional encoded equivalents, (2K+B) balanced combination for equivalents are required to convey all characters comprising K bits. Use of specific code-words for frame alignment purposes ensures that data patterns comprising equivalents can never induce ambiguous frame alignment. It is to be noted that synchronisation in the device 10 is necessary in order to identify code-word boundaries.
When devising a code for use in the method of encoding according to the present invention, it is necessary to commence with an N-bit binary quantity. Into this quantity is distributed Nh logic 0's and N/2 logic l's. Thus, N must be an even number in the method. There are N ways of
selecting a position for a first logic 0 in the quantity, N-1 ways of selecting a position for a second logic 0 in the quantity, N-2 ways of selecting a position for a third logic 0, and so on. Once N/2 selections have been made for the quantity, then the remaining N/2 symbols must be logic I's for balancing purposes. Since the order of the distribution is irrelevant to the method provided that it is used systematically for encoding and subsequent corresponding decoding, it follows that the total number of arrangements T is given by Equation 1 (Eq. 1) :
A D
where A = a total number of combination arrangements possible ; and D = a corresponding number of distributions which is (N/2) (N/2-1) (N/2-2).. (2).
For example, where the method of the present invention gives rise to an 8-bit code-word for use in the encoded equivalents, the number of balanced combinations T is (8 7.6.5) / (4 3.2 1) = 70. A value for T can be determined in a generic case by Equation 2 (Eq. 2):
Hence, for a [N, K] coding scheme for use in a method of encoding data according to the present invention, a scheme exists for the method when N is even and the condition in Equation 3 (Eq. 3) is satisfied:
Example practical values of N and K which are viable for the method of encoding data according to the present invention are provided in Table 2. Basic properties of coding schemes for the method are also listed.
Table 2
N K Number of balanced Number of Data overhead associated equivalents unused codes with the method, Q 4 1 6 0 300% 8 6 70 2 33% 10 7 252 120 43% 12 9 924 408 33% 14 11 3432 1384 27% 16 13 12870 4674 23% It can be seen from Table 2 that the method of the invention becomes more efficient as more character bits K are employed giving rise to a correspondingly greater value of N. Data overhead
Q is a parameter defined by Equation 4 (Eq. 4):
From Table 2, it can be seen that [6, 4] and [8, 6] encoding schemes are convenient practical choices. Not only do large values of N require more coding effort but their relatively large number of unused codes degrades their overall efficiency to a value in the order of 20%.
It will be appreciated by one skilled in the art that modifications can be made to the method of encoding data of the present invention without departing from the scope of the invention. For example, the values of N, B and K can be modified subject to Equation 3 being satisfied.
Claims (22)
- CLAIMS 1. A method of encoding data, the method including the steps of : (a) receiving input data to be encoded and then partitioning the input data into data blocks; (b) translating the blocks into corresponding encoded equivalents; and (c) assembling the encoded equivalents together to generate output encoded data, the method characterised in that: (d) each encoded equivalent includes equal numbers of logic 0's and logic l's ; (e) the encoded equivalents are mutually distinguishable such that a single bit error in one or more of the equivalents is unambiguously detectable; (f) at least one equivalent included in the output encoded data is a marker equivalent for denoting where equivalents occur in the output encoded data for synchronisation purposes; and (g) each value of data block uniquely maps onto a corresponding encoded equivalent.
- 2. A method according to Claim 1 wherein the marker equivalent is operable to denote frame boundaries within the output encoded data.
- 3. A method according to Claim 1 or 2 wherein the marker equivalent includes its logic 1's grouped consecutively together and its logic O's grouped consecutively together.
- 4. A method according to Claim 1,2 or 3 wherein at least one of the equivalents is reserved for alarm indication purposes.
- 5. A method according to Claim 4 wherein there are two equivalents reserved for alarm indication purposes, the two equivalents corresponding to the alternative bit patterns ... 0101... and... 1010....
- 6. A method according to any preceding claim wherein translation of the blocks into corresponding equivalents involves use of one of the following coding schemes: [4, 1], [6,4], [8, 6], [10, 7], [12, 9], [14, 11], [16, 13].
- 7. A method according to any preceding claim wherein the coding scheme satisfies a criterion:where a parameter K is the number of bits in each of the partitioned blocks, a parameter N is the number of bits in each of the equivalents, and a parameter B is the number of equivalents reserved for one or more of alarm and synchronisation functions.
- 8. A method according to Claim 6 or 7 wherein the coding scheme is a [6, 4] coding scheme employing the following equivalents to uniquely represent 4-bit blocks: 001011, 001101, 001110,010011, 010110, 011100,011010, 011001,110100, 110010, 110001, 101100, 101001, 100011, 100101,100110.
- 9. A method according to Claim 8 wherein at least one equivalent having the form 000111, 111000 is employed for denoting frame boundaries in the output data.
- 10. A method of decoding data, the method including the steps of: (a) receiving input encoded data to be decoded and then identifying where marker equivalents in the encoded data occur and thereby partitioning the encoded data into equivalents; (b) translating the equivalents into corresponding decoded data blocks; and (c) assembling the decoded blocks together to generate output decoded data, the method characterised in that: (d) each encoded equivalent includes equal numbers of logic O's and logic 1's ; (e) the encoded equivalents are mutually distinguishable such that a single bit error in one or more of the equivalents is unambiguously detectable; (f) at least one of the equivalents is a marker equivalent for denoting where equivalents occur in the output encoded data for synchronisation purposes; and (g) each value of data block uniquely maps onto a corresponding encoded equivalent.
- 11. A method according to Claim 10 wherein the marker equivalent is operable to denote frame boundaries within the input encoded data.
- 12. A method according to Claim 10 or 11 wherein the marker equivalent includes its logic l's grouped consecutively together and its logic 0's grouped consecutively together.
- 13. A method according to Claim 10,11 or 12 wherein at least one of the equivalents is reserved for alarm indication purposes.
- 14. A method according to Claim 13 wherein there are two equivalents reserved for alarm indication purposes, the two equivalents corresponding to the alternative bit patterns ... 0101... and... 1010....
- 15. A method according to any one of Claims 10 to 14 wherein translation of the equivalents into corresponding blocks involves use of one of the following coding schemes: [4, 1], [6,4], [8, 6], [10, 7], [12, 9], [14, 11], [16, 13].
- 16. A method according to Claim 15 wherein the coding scheme satisfies a criterion:where a parameter K is the number of bits in each of the partitioned blocks, a parameter N is the number of bits in each of the equivalents, and a parameter B is the number of equivalents reserved for one or more of alarm and synchronisation functions.
- 17. A method according to Claim 15 or 16 wherein the coding scheme is a [6, 4] coding scheme employing the following equivalents to uniquely represent 4-bit blocks: 001011, 001101, 001110, 010011,010110, 011100, 011010,011001, 110100,110010, 110001, 101100,101001, 100011, 100101,100110.
- 18. A method according to Claim 17 wherein at least one equivalent having the form 000111, 111000 is employed for denoting frame boundaries in the input data.
- 19. A method of encoding data substantially as hereinbefore described with reference to Table 1.
- 20. A method of decoding data substantially as hereinbefore described with reference to Table 1.
- 21. An apparatus for at least one of decoding and encoding data according to a method as claimed in any preceding claim.
- 22. A communication system including an apparatus according to Claim 21 for one or more of encoding and decoding data.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
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GB0029703A GB2369972A (en) | 2000-12-05 | 2000-12-05 | Method of encoding data to produce balanced codes |
PCT/GB2001/005378 WO2002047340A1 (en) | 2000-12-05 | 2001-12-05 | Balanced mbnb coding |
AU2002220892A AU2002220892A1 (en) | 2000-12-05 | 2001-12-05 | Balanced mbnb coding |
Applications Claiming Priority (1)
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GB0029703A GB2369972A (en) | 2000-12-05 | 2000-12-05 | Method of encoding data to produce balanced codes |
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GB0029703D0 GB0029703D0 (en) | 2001-01-17 |
GB2369972A true GB2369972A (en) | 2002-06-12 |
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GB0029703A Withdrawn GB2369972A (en) | 2000-12-05 | 2000-12-05 | Method of encoding data to produce balanced codes |
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GB (1) | GB2369972A (en) |
WO (1) | WO2002047340A1 (en) |
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US10084570B2 (en) | 2016-02-08 | 2018-09-25 | Rockley Photonics Limited | System and method for line coding |
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US5625644A (en) * | 1991-12-20 | 1997-04-29 | Myers; David J. | DC balanced 4B/8B binary block code for digital data communications |
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2000
- 2000-12-05 GB GB0029703A patent/GB2369972A/en not_active Withdrawn
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2001
- 2001-12-05 AU AU2002220892A patent/AU2002220892A1/en not_active Abandoned
- 2001-12-05 WO PCT/GB2001/005378 patent/WO2002047340A1/en not_active Application Discontinuation
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GB2041702A (en) * | 1979-02-01 | 1980-09-10 | Standard Telephones Cables Ltd | Digital transmission systems |
US4698809A (en) * | 1986-03-31 | 1987-10-06 | Northern Telecom Limited | Method and apparatus for the channelized serial transmission of redundantly encoded binary data |
EP0629066A1 (en) * | 1993-06-11 | 1994-12-14 | STMicroelectronics Limited | Checksum arrangement |
EP0629068A1 (en) * | 1993-06-11 | 1994-12-14 | STMicroelectronics Limited | 4B6B coding scheme |
EP0629067A1 (en) * | 1993-06-11 | 1994-12-14 | STMicroelectronics Limited | 4B6B Coding |
US5539666A (en) * | 1993-12-17 | 1996-07-23 | International Business Machines Corporation | Data communications method and system coupling device |
Also Published As
Publication number | Publication date |
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GB0029703D0 (en) | 2001-01-17 |
WO2002047340A1 (en) | 2002-06-13 |
AU2002220892A1 (en) | 2002-06-18 |
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