GB2367703A

GB2367703A - Controlling the usable range of a buffer

Info

Publication number: GB2367703A
Application number: GB0200835A
Authority: GB
Inventors: Kanji Mihara
Original assignee: Sony Corp
Current assignee: Sony Corp
Priority date: 1997-12-08
Filing date: 1998-12-08
Publication date: 2002-04-10
Anticipated expiration: 2018-12-08
Also published as: GB2367703B; GB0200835D0

Abstract

An upper limit of a usable range of a VBV buffer is determined from a preset delay time of the VBV buffer and a designated bit rate. A target bit quantity of a picture (j) and a data occupancy quantity of the VBV at the time when a picture (j+1) is coded are calculated, and the target bit quantity T(j) for coding the picture (j) is corrected so that the data occupancy quantity of the VBV of the picture (j+1) constantly falls within the limited range. By this, even when a low coding bit rate is set, the delay due to the VBV buffer of a predetermined delay time or longer does not reach a prescribed delay time or longer. Thus, an MPEG encoder suitable for a live broadcast in which the problem of delay time is not desired can be realized.

Description

DESCRIPTION Coding Device and Method Technical Field This invention relates to a coding device and method, for example, a coding device and method which enables maintenance of a short delay time in a VBV (video buffering verifier) buffer even when a low bit rate is set in multiplexing and transmitting image data coded by an MPEG (Moving Picture Experts Group) technique, and thus enables real-time processing such as broadcasting.

Background Art In digital broadcast represented by satellite broadcast, a plurality of programs processed by data compression coding using, for example, an MPEG (Moving Picture Experts Group) technique are multiplexed and transmitted with the transmission rate dynamically changed by a statistical multiplexing technique. Thus, programs of high picture quality as a whole can be transmitted by effectively using the limited transmission rate.

Specifically, in the case where three programs are multiplexed at a fixed rate, each program is transmitted at a preset constant rate, as shown in Fig. I. The transmission rate is allocated to each program so that predetermined picture quality is maintained even at a part where deterioration in picture quality is most perceptible in reducing the transmission rate in each program. Therefore, in this multiplexing at the fixed rate, an excess rate is allocated to a part where deterioration in picture quality is imperceptible.

On the other hand, in the case of a statistical multiplexing technique as shown in Fig. 2, for example, in multiplexing four programs, the transmission rate of each program is dynamically changed by utilizing the fact that parts where deterioration in picture quality is perceptible in plural programs are unlikely to be generated simultaneously. Thus, it is not necessary to allocate an excess rate to a part where deterioration in picture quality is imperceptible. By allocating the redundant rate to other programs, the transmission efficiency can be improved as a whole without deteriorating the picture quality.

Meanwhile, in the case where various programs are transmitted with the bit rate changed by statistical multiplexing, it is necessary to control the bit rate on the side of an encoder (image coding device) so as to enable continuous (seamless) decoding of images on the side of a decoder (image decoding device). Specifically, in order to prevent overflow or underflow of a so-called VBV (video buffering verifier) buffer for temporarily holding transmitted data on the side of the image decoding device, it is necessary to provide a virtual VBV buffer in the encoder and control the bit rate so as not to generate overflow or under flow of this virtual VBV buffer.

Particularly, in such applications as broadcasting or communication, reading of bit streams cannot be controlled on the decoder side, unlike a storage medium such as a DVD (digital versatile disk). Therefore, it is necessary to control the data quantity of the virtual VBV buffer on the side of the image coding device.

I For example, in a digital broadcasting system for transmitting a bit stream outputted from an image coding device 81 to a transmission line through an output buffer 82 and then decoding the bit stream from an input buffer 83 by an image decoding device 84 as shown in Fig. 3, in order to enable seamless changes of the bit rate, a delay time T from when data encoded by the image coding device 81 is written to the output buffer 82 until the corresponding data is read out from the input buffer 83 by the image decoding device 84 is made constant regardless of the bit rate. By thus controlling the bit rate, constant transport stream data is held in the input buffer 83 as a VBV buffer. Therefore, overflow or underflow of the input buffer 83 can be prevented and the bit rate can be controlled seamlessly.

The delay time due to the VBV buffer is the maximum when the bit rate of the transport stream is the minimum bit rate minbitrate, and the value of the delay time is vbv-size (0)/minbitrate. In this case, vbv~size (0) is the capacity of the VBV buffer. Therefore, the minimum delay time trin of the delay time T of Fig. 3 is expressed by the following equation, where a line delay time td of a fixed value is added to the delay time vbvsize (0)/minbitrate of the VBV buffer.

Tmin = vbvsize (0)/mmbitrate + td If the bit rate bitrate of the transport stream is greater than the minimum bit rate minbitrate, the delay tune T is smaller than the delay time Tmin. However, by delaying the data by using FIFO (first in first out), the delay time T can be made coincident with the delay time Tmin. (That is, the delay time T can be made constant.) As is clear from the above-mentioned equation, the delay time rmin becomes greater as the minimum bit rate minbitrate becomes smaller. For example, in MP&commat;ML of MPEG2 (where the capacity of the VBV buffer is approximately 1.8 [Mbits]), if the minimum bit rate min~bit~rate is set at 3.0 [Mbps], the delay time (vbvsize (0)/min~bit~ rate) of the VBV buffer as the first term of the abovementioned equation is 0.6 [sec] (= 1. 8 [Mbits]/3. 0 [Mbits/sec]). If the minimum bit rateminbit~rate is set at 0.5 [Mbps], the delay time (vbv~size(0)/min~bit~rate) is 3.6

[sec] (= 1. 8 [Mbits]/0. 5 [Mbits/sec]).

To the delay time vbvsize (0)/minbitrate of the VBV buffer thus obtained, the delay time td due to the transmission line and the delay time due to encoding and decoding are added, thereby specifically calculating the overall delay time from when image signals are inputted to the image coding device until the image signals are decoded and outputted from the image decoding device. The overall delay time thus calculated is 4 to 5 seconds.

In a live broadcast in which response to the broadcast contents is made while the broadcast contents are confirmed on a monitor, such a large delay time causes an uncomfortable feeling and thus generates a large problem. Therefore, it is desired to minimize the delay time T of this type.

As a method for minimizing the delay time, it is considered to set the minimum bit rate nu'n-bit-rate at a large value and transmit the transport stream at a transmission rate not lower than the minimum bit rate minbitrate. In this method, however, since the transmission rate of the transport stream must be made higher, the allowable range for dynamically changing the bit rate is narrowed and the advantage of statistical multiplexing for improving the overall picture quality cannot be utilized satisfactorily.

Disclosure of the Invention In view of the foregoing status of the art, it is an object of the present invention to enable maintenance of a short delay time due to the VBV buffer even when a low bit rate is set, and thus to enable improvement of the overall picture quality by utilizing the advantage of statistical multiplexing.

Specifically, a coding device according to the present invention includes: control means for calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means ; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means.

The control means prescribes a usable range of the virtual buffer in accordance with a second bit rate when the designated bit rate is changed from a first bit rate to the second bit rate. The control means also controls the target bit quantity supplied to the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.

A coding device according to the present invention includes: control means for calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means. The control means prescribes a usable range of the virtual buffer in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer. The control means also controls the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.

A coding device according to the present invention includes: control means for calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means. The control means prescribes a usable range of the virtual buffer in accordance with a changed designated bit rate in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time. The control means also controls the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.

A coding method according to the present invention includes: a control step of calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step. At the control step, when the designated bit rate is changed from a first bit rate to a second bit rate, a usable range of the virtual buffer is prescribed in accordance with the second bit rate, and the target bit quantity supplied to the coding step is controlled so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.

A coding method according to the present invention includes: a control step of calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step ; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step. At the control step, a usable range of the virtual buffer is prescribed in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and the coding step is controlled so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.

A coding method according to the present invention includes: a control step of calculating a target bit quantity to be allocated to each picture on the basis of a designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step. At the control step, in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, a usable range of the virtual buffer is prescribed in accordance with the changed designated bit rate, and the coding step is controlled so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.

In the coding device of the present invention, when the designated bit rate is changed from a first bit rate to a second bit rate in coding a coding target picture, the usable range of the virtual buffer is prescribed in accordance with the second bit rate, and the target bit quantity is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

Also, in the coding device of the present invention, the usable range of the virtual buffer is prescribed in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and the coding means is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

In addition, in the coding device of the present invention, in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, the usable range of the virtual buffer is prescribed in accordance with the changed designated bit rate, and the coding means is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

In the coding method of the present invention, when the designated bit rate is changed from a first bit rate to a second bit rate, the usable range of the virtual buffer is prescribed in accordance with the second bit rate, and the target bit quantity is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

Also, in the coding method of the present invention, the usable range of the virtual buffer is prescribed in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and the coding step is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

In addition, in the coding method of the present invention, in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, the usable range of the virtual buffer is prescribed in accordance with the changed designated bit rate, and the coding step is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

Brief Description of the Drawings Fig. l illustrates multiplexing using a fixed rate.

Fig. 2 illustrates multiplexing using statistical multiplexing.

Fig. 3 is a block diagram showing an exemplary structure of a conventional digital broadcasting system.

Fig. 4 is a block diagram showing an exemplary structure of an image multiplexing system to which the present invention is applied.

Fig. 5 is a block diagram showing an exemplary structure of an image coding device 2-1 of Fig. 4.

Fig. 6 is a flowchart for explaining the operation of the image coding device 2-1 of Fig. 5.

Fig. 7 is a flowchart for explaining the operation of the image coding device 2-1 of Fig. 5.

Fig. 8 illustrates changes of the capacity of a VBV buffer.

Fig. 9 illustrates changes of the capacity of the VBV buffer.

Fig. 10 illustrates changes of the capacity of the VBV buffer.

Fig. 11 illustrates changes of the capacity of a VBV buffer.

Fig. 12 illustrates changes of the capacity of the VBV buffer.

Fig. 13 illustrates changes of the capacity of the VBV buffer.

Fig. 14 illustrates changes of the bit quantity R.

Fig. 15 illustrates changes of the bit quantity R in the case where the bit rate is changed at a halfway point of GOP.

Fig. 16 illustrates the function of a value"e"of step S 11 of Fig. 7.

Fig. 17 is a block diagram showing another exemplary structure of the image multiplexing system to which the present invention is applied.

Fig. 18 is a block diagram showing an exemplary structure of an image coding device 2-1 of Fig. 17.

Fig. 19 is a flowchart for explaining the operation of the image coding device 2-1 of Fig. 18.

Fig. 20 is a flowchart for explaining the operation of the image coding device 2-1 of Fig. 18.

Fig. 21 illustrates changes of the bit quantity R'.

Fig. 22 illustrates changes of the bit quantity G.

Fig. 23 illustrates changes of the bit quantity R'in the case where the bit rate is changed at a halfway point of GOP.

Fig. 24 illustrates changes of the bit quantity G in the case where the bit rate is changed at a halfway point of GOP.

Fig. 25 illustrates the function of a correction value"e"at steps S46 and S47 of Fig. 20.

Fig. 26 illustrates a reversal phenomenon of the bit quantity R.

Fig. 27 illustrates a cause of the reversal phenomenon of the bit quantity R.

Fig. 28 illustrates the principle for restraining the reversal phenomenon of the bit quantity R.

Best Mode for Carrying Out the Invention Preferred embodiments of the present invention will now be described in detail with reference to the drawings. Fig. 4 shows an exemplary structure of an image multiplexing system 1 to which the present invention is applied. The image multiplexing system I has a plurality of image coding devices 2-i for inputting and compression-coding programs Pi (i = 1,2,..., n) as program data of the present invention, a controller 3 for carrying out feedback-like control of the bit rate with respect to the individual image coding devices 2-i, and a multiplexer 4 for multiplexing compression-coded data sti outputted from the image coding devices 2-i and outputting image data Sm to a transmission line. The image coding devices 2-i find the complexity (global complexity) Ci of the programs Pi and output the complexity Ci to the controller 3. On the basis of the global complexity Ci from the image coding devices 2-i, the controller 3 determines the bit rate bit-ratez of the image coding devices 2-i by statistical multiplexing and outputs the determined bit rate to the image coding devices 2-i.

In the case where the image multiplexing system 1 is used as a transmission system, the image data Sm outputted from the multiplexer 4 is outputted as transmission data to a transmission line. On the other hand, in the case where the image multiplexing system 1 is used as a broadcasting system, the image data Sm outputted from the multiplexer 4 is transmitted as broadcast data to a receiving device through a transmission line for broadcasting.

Fig. 5 is a block diagram showing the detailed structure of the image coding device 2-1 of Fig. 4. (Although not shown, the image coding devices 2-2 to 2-n are similarly constituted. ) As shown in Fig. 5, the image coding device 2-1 has a picture rearrangement circuit 11 for inputting a program PI and rearranging the order of pictures (1-picture, P-picture, B-picture) in accordance with the coding order, and a scan conversion macroblock forming circuit 12 for inputting output data of the picture rearrangement circuit 11, then discriminating whether the output data has a frame structure or a field structure, then carrying out scan conversion in accordance with the discrimination result, and carrying out macroblock forming of 16 x 16 pixels. A motion detection circuit 21 searches for a noted macroblock in a picture as a compression coding target on the basis of output data of the scan conversion macroblock forming circuit 12, and also searches for a macroblock (predictive macroblock) in a reference picture having the minimum absolute value sum or square sum of difference in pixel value from the noted macroblock. Then, the motion detection circuit 21 detects a motion vector MV from these macroblocks and sends the motion vector MV to a motion compensation circuit 22.

A subtracter 13 subtracts predictive image data (predictive macroblock) generated by the motion compensation circuit 22 on the basis of the motion vector MV from the motion detection circuit 21, from the output of the scan conversion macroblock forming circuit 12, and outputs the subtraction result to a DCT (discrete cosine transform) circuit 14. The DCT circuit 14 carries out DCT of inputted data and outputs the DCT result to a quantization circuit 15. The quantization circuit 15 quantizes the data inputted from the DCT circuit 14 on the basis of a quantizer scale code Ql outputted from a quantizer scale code determination circuit 33 of a rate controller 23, and outputs the quantized data to a variable-length coding circuit 16 and an inverse quantization circuit 18.

The variable-length coding circuit 16 carries out variable-length coding of the data inputted from the quantization circuit 15 and outputs the coded data to the multiplexer 4 through a buffer memory 17. The usable capacity of the buffer memory 17 is controlled by a controller 24.

The inverse quantization circuit 18 carries out inverse quantization of the data supplied from the quantization circuit 15 and outputs the inversely quantized data to an inverse DCT circuit 19. The inverse DCT circuit 19 carries out inverse DCT of the data supplied from the inverse quantization circuit 18 and outputs the inverse DCT result to an adder 20. The adder 20 adds the predictive image data outputted from the motion compensation circuit 22 and the data outputted from the inverse DCT circuit 19. The adder 20 then outputs to the motion compensation circuit 22 the original image data (locally decoded image data) obtained by addition, and causes the motion compensation circuit 22 to store the image data into its built-in frame memory.

The rate controller 23 generates the quantizer scale code Q I based on the signal bit-rate&num; I from the controller 3 of Fig. 4 and the quantity of generated bits S 1 from the

buffer memory 17, and outputs the quantizer scale code Q I to the quantization circuit 15. Therefore, a complexity calculation circuit 31 of the rate controller 23 calculates the global complexity Cl in accordance with the following equations (where Xi, Xp and Xb represent the global complexity). The global complexity Cl is data indicating the complexity of the pattern of compressed image data, and its value is obtained by multiplying the quantity of generated bits (data quantity) S I of the compressed image data (supplied from the buffer memory 17) and the quantizer scale code Q I (supplied

from the quantizer scale code determination circuit 33).

Xi=SixQi... (1) Xp = Sp x Qp... (2) Xb = Sb x Qb... (3) In the above-mentioned equations, Xi, Xp and Xb express the global complexity Cl of I-picture, P-picture and B-picture, respectively. Si, Sp and Sb express the quantity of generated bits Sl in the case where I-picture, P-picture and B-picture are coded by the variable-length coding circuit 16. Qi, Qp and Qb express the quantizer scale code Qu in generating I-picture, P-picture and B-picture, respectively.

This global complexity Cl is necessarily coincident with the coding difficulty Dl used in a feed-forward bit rate control system, which will be later described with reference to Figs. 17 and 18. However, it is substantially coincident with the coding difficulty D I unless the quantizer scale code Q I is extremely large or small.

The complexity calculation circuit 31 outputs the complexity Cl (Xi, Xp, Xb) found by arithmetic operation in accordance with the equations (1) to (3), to the controller 3 of Fig. 4. The complexity calculation circuit 31 also outputs the complexity Cl together with the quantity of generated bits S I (Si, Sp, Sb) to a target bit quantity setting circuit 32. The target bit quantity setting circuit 32 sets a target bit quantity Tl based on the signal bit-ratel supplied from the controller 3 and the complexity C1 and the quantity of generated bits S I (Si, Sp, Sb) supplied from the

complexity calculation circuit 31, and outputs the set target bit quantity Tl to the quantizer scale code determination circuit 33. The quantizer scale code determination circuit 33 determines the quantizer scale code Ql in accordance with the inputted target bit quantity T1, and outputs the quantizer scale code Q1 to the quantization circuit 15 and the complexity calculation circuit 31.

The operation of the image multiplexing system 1 shown in Fig. 4 will now be described. In this image multiplexing system 1, each program Pi is coded by each image coding device 2-i. The image coding device 2-i calculates the global complexity Ci expressing the complexity of the image which is already coded with respect to the program Pi, and outputs the calculated global complexity Ci to the controller 3. On the basis of the inputted global complexity Ci, the controller 3 determines the target bit rate bit ratez as a target bit rate, which is a target quantity of generated bits per unit time with respect to each program Pi, by using a statistical multiplexing technique, and outputs the determined target bit rate to the image coding device 2-i. On the basis of the inputted target bit rate bitrate&num;i, the image coding device 2-i compressioncodes the program Pi and outputs compression-coded data sti to the multiplexer 4.

The multiplexer 4 multiplexes the inputted compression-coded data sti to generate image data Sm for output, and outputs the image data Sm to the transmission line.

The basic operation of the image coding device 2-1 shown in Fig. 5 will now be described. First, the picture rearrangement circuit 11 of the image coding device 2-1 rearranges the order of pictures (1-picture, P-picture and B-picture) of the program P 1 in accordance with the coding order. Then, the scan conversion macroblock forming circuit 12 discriminates whether the pictures have a frame structure or a field structure, and carries out scan conversion and macroblock forming in accordance with the discrimination result. The output data of the scan conversion macroblock forming circuit 12 is sent to the motion detection circuit 21 and the subtracter 13.

If the inputted picture is I-picture, no difference from predictive image data is taken by the subtracter 13. The output data of the scan conversion macroblock forming circuit 12 is inputted directly to the DCT circuit 14 and is converted to a DCT coefficient. The DCT coefficient is quantized by the quantization circuit 15 on the basis of the quantizer scale code Qu determined by the quantizer scale code determination circuit 33, and is then coded by variable-length coding by the variablelength coding circuit 16. The output data of the variable-length coding circuit 16 is temporarily held by the buffer memory 17, and is then outputted to the multiplexer 4 as compression-coded data stl made up of bit streams.

The inverse quantization circuit 18 inversely quantizes the output data of the quantization circuit 15. The inverse DCT circuit 19 carries out inverse DCT of the output data of the inverse quantization circuit 18 and inputs the inverse DCT data to the motion compensation circuit 22 through the adder 20 so as to hold the data in the motion compensation circuit 22.

If the inputted picture is P-picture, the motion compensation circuit 22 generates predictive image data based on image data corresponding to the past Ipicture or P-picture held therein and the mOTion vector MV from the motion detection circuit 21, and the predictive image data is outputted to the subtracter 13 and the adder 20. The subtracter 13 calculates the difference between the output data from the scan conversion macroblock forming circuit 12 and the predictive image data from the motion compensation circuit 22. This differential data is converted to a DCT coefficient by the DCT circuit 14 and is then quantized by the quantization circuit 15.

The variable-length coding circuit 16 carries out variable-length coding of the output data from the quantization circuit 15 and outputs the resultant data as compressioncoded data stl to the multiplexer 4 through the buffer memory 17.

The inverse quantization circuit 18 inversely quantizes the output data of the quantization circuit 15. The inverse DCT circuit 19 carries out inverse DCT of the output data of the inverse quantization circuit 18. The adder 20 adds the output data of the inverse DCT circuit 19 and the predictive image data outputted from the motion compensation circuit 22, and inputs the added data to the motion compensation circuit 22 so as to hold the data therein.

If the inputted picture is B-picture, the motion compensation circuit 22 generates predictive image data based on two image data corresponding to the past and future I-pictures or P-pictures held therein and two motion vectors MV from the motion detection circuit 21, and the predictive image data is outputted to the subtracter 13 and the adder 20. The subtracter 13 calculates the difference between the output data of the scan conversion macroblock forming circuit 12 and the predictive image data from the motion compensation circuit 22. This differential data is converted to a DCT coefficient by the DCT circuit 14 and is then quantized by the quantization circuit 15. The variable-length coding circuit 16 carries out variable-length coding of the output data of the quantization circuit 15 and outputs the resultant data as compression-coded data stl to the multiplexer 4 through the buffer memory 17. Bpicture is not held by the motion compensation circuit 22.

The rate control operation of the rate controller 23 and the controller 24 will now be described with reference to the flowcharts of Figs. 6 and 7. In the following description, the subscript"i"as in the quantity of generated bits Si, global complexity Ci, target bit quantity Ti, quantizer scale code Qi, compression-coded data (coded stream) sti and bit rate bit-ratez corresponding to each program Pi is basically omitted in order to avoid complication of symbols, except for the case where these must be discriminated individually.

In a GOP (group of pictures) defined in accordance with the MPEG standard, the j-th picture is expressed as a picture (j), and the (j+l) th picture is expressed as a picture (j+1). The number of pictures included in the GOP is denoted by N.

In the following description, pictures up to the picture (j) are coded at a first bit rate bitrate (j), and pictures from the picture (j+1) are coded at a second bit rate bit~rate(j+1).

At step S 1, the target bit quantity setting circuit 32 of the rate controller 23 calculates target bit quantities Ti (j), Tp (j), Tb (j) with respect to the picture (j) as the j-th picture in the GOP, in accordance with the following equations (4) to (6).

... (4)

... (5)

... (6) In the above equations, R (j) expresses the bit quantity allocated to an non-coded picture which has not been coded (that is, a picture to be coded from now on) in the GOP including the picture (j) as a coding target. In short, this R (j) is a value obtained by adding bit quantities that should be allocated to the picture (j), picture (j+1),.... picture (N). Np and Nb express the number P-pictures or B-pictures which have not been coded in the GOP. Xi, Xp and Xb express the global complexity C of I-picture, P-picture and B-picture, respectively. Kp and Kb express the ratio of the quantizer scale code of P-picture and B-picture with reference to the quantizer scale code of I- picture, and take values expressed by the following equations.

Kp=1. 0... (7) Kb 1. 4... (8) That is, the quantizer scale code of P-picture is once the quantizer scale code of I-picture, but the quantizer scale code of B-picture is constantly 1.4 times the

quantizer scale code of I-picture and P-picture. Thus, since B-picture is coded relatively roughly in comparison with I-picture or P-picture, the bit quantity that can be saved in B-picture can be added to the bit quantity of I-picture and P-picture.

Therefore, the S/N ratio of I-picture and P-picture is improved and the S/N ratio of B- picture which refers to the S/N ratio of I-picture and P-picture is also improved. The overall S/N ratio is thus improved.

The initial values of the complexity Xi, Xp, Xb are set at values expressed by the following equations based on the target bit rate bitrate (j) (bits/sec).

Xi = 160 x bitrate (j)/115... (9) Xi 60 x bitrate (j)/115... (10) Xb==42xbitrate (j)/115... (11) Bitrate (j) expresses the bit rate which has been designated with respect to the pictures up to the picture (j) by the controller 3. Picrate expresses the picture rate.

For example, in the case of the NTSC system, this picture rate is 30 (frames/sec).

Max {A, B} expresses a function selecting the greater one of A and B.

The values of R (j), Np, Nb, Kp, Kb and pic-rate are supplied from the controller 24 (Fig. 5) provided in each image coding device 2-i. The values of Xi, Xp and Xb are calculated by the complexity calculation circuit 31 in accordance with the equations (1) to (3), as described above.

In the equations (4) to (6), the bit quantity of what number of allocation target pictures to which the estimate bit quantity generated for the entire non-coded pictures corresponds is found.

For example, in the equation (4), NpXp/XiKp of the second term of the denominator of the first factor expresses the bit quantity of what number ofl-pictures to which Np non-coded P-pictures in the GOP correspond, and NbXb/XiKb of the third term expresses the bit quantity of what number of I-pictures to which Nb noncoded B-pictures in the GOP correspond. The first term, 1, expresses the number of I-pictures in the GOP. (The number of I-pictures in one GOP is constantly 1).

Therefore, the first factor in the equation (4) expresses the bit quantity per picture on the assumption that all the remaining (ni+1) pictures in the GOP are I-pictures. N expresses the number of pictures included in the GOP.

Similarly, in the equation (5), NbKpXb/KbXp of the second term of the denominator of the first factor expresses the bit quantity of what number of P-pictures to which Np non-coded B-pictures in the GOP correspond. Therefore, the first factor in the equation (5) expresses the bit quantity per picture on the assumption that all the remaining (ni+1) pictures in the GOP are P-pictures.

Moreover, in the equation (6), NpKbXp/KpXb of the second term of the denominator of the first factor expresses the bit quantity of what number of B-pictures to which Np non-coded P-pictures in the GOP correspond. Therefore, the first factor expresses the bit quantity per picture on the assumption that all the remaining (N-j+1) pictures in the GOP are B-pictures.

Fundamentally, the values of the first factors in the equations (4) to (6) are determined as the target bit quantities Ti (j), Tp (j) and Tb (j) of I-picture, P-picture and B-picture. (Hereinafter, if I-picture, P-picture and B-picture need not be discriminated, the target quantity is described simply as T (j).) However, if the values found by arithmetic operation are too small, there is a risk that the VBV buffer of the image decoding device will overflow. Therefore, the value bit~rate(j)/(8#pic~rate) prescribed by the second factors in the equations (4) to (6) is selected as the target bit quantity T (j).

On the assumption that the data occupancy quantity of the VBV buffer immediately before encoding the picture (j) as the coding target is B* (j) and that the bit quantity of the same value as the target bit quantity T (j) is generated by actual coding of the picture (j), the occupancy quantity B*(j+1) of the VBV buffer immediately before encoding the next picture (j+1) is expressed by the following equation. At step S2, the controller 24 calculates this occupancy quantity B*(j+1) in accordance with the following equation.

B+l) = B*(j+1) - T(j) + (tJ+I-t) x bitrate (j+l) ... (12) In this equation (12), t, expresses the timing at which the picture (j) is read out from the VBV buffer, and tj+1 expresses the timing at which the picture 0+1) is read

out from the VBV buffer. Bitrate (j+l) expresses the bit rate newly set with respect to the picture (j+1) and the subsequent pictures.

In addition, at step S2, the controller 24 determines a usable range of the VBV buffer in accordance with the following equation. vbvsize (j+l) = min {rmax x bit~rate(j+1), vbv~size(0)} ... (13) In this equation, vbvsize (O) expresses the capacity of the VBV buffer in the case where the delay time of the VBV buffer reaches the maximum value-rmax, and min {A, B} expresses a function selecting the smaller one of A and B.

That is, in this example, in the case where the maximum value of the delay time of the VBV buffer is prescribed in advance by the operator or the like and where such a bit rate that the delay time of the VBV buffer exceeds the prescribed maximum value is used, the controller 24 narrows the usable range of the VBV buffer (corresponding to the buffer memory 17 of Fig. 5), that is, equivalently reduces the capacity of the VBV buffer, and controls the delay time so as not to exceed the maximum value. The maximum value #max is expressed by the following equation. rmax = vbvsize (0)/bitrate (0)... (14) In this equation, vbv~size(0) expresses the maximum capacity of the VBV buffer (a predetermined value in the MPEG standard), and bitrate (O) expresses the bit rate in the case where the delay time of the VBV buffer reaches the maximum value-rmax.

At step S3, the controller 24 compares the value of the occupancy quantity B*0+1) of the VBV buffer calculated at step S2 and the value of the vbvsize (j+l).

As a result of comparison, ifB* (j+l) is equal to or greater than vbv-size (J+l), (that

is, if the target bit quantity TO) must be corrected because the delay time of the VBV buffer exceeds the value smax if the vbvsize (j+l) of the VBV buffer is used as it is,) the processing goes to step S4 and the target bit quantity TO) calculated at step S 1 is corrected by the amount of difference between B*(j+1) and vbvsize (j+l) in accordance with the following equation.

TO) = TO) + B*0+1)-vbv-Sizeo+l)... (15) If it is determined at step S3 that B* (j+l) is smaller than vbv-size (j+l), it does not enter the unusable range of the VBV buffer. Therefore, the processing of step S4 is skipped.

Next, at step S5, the picture (j) is encoded on the basis of the target bit quantities Ti (j), Tp (j) and Tb (j) calculated at step Sl or the target bit quantities Ti (j), Typo) and Tb (j) corrected at step S4. Specifically, the quantizer scale code determination circuit 33 determines the quantizer scale code Q I corresponding to the target bit quantity Tl (Ti (j), Tp (j) or Tb(j) set by the target bit quantity setting circuit 32. The quantization circuit 15 quantizes the picture (j) in accordance with the

quantizer scale code Ql. The processing in this case is as described above and therefore will not be described further in detail.

Up to this step, processing for the j-th picture (j) in the GOP is completed. At the following steps, processing for the (j+l) th picture (j+1) in the GOP is carried out.

At step S6, the controller 24 subtracts the bit quantity SO) generated by coding the picture (j) from the bit quantity RO) of the non-coded picture before coding the picture 0), in accordance with the following equation, and thus finds the bit quantity R (J+l) allocated to non-coded pictures including the coding target picture (j+1). In

short, R (j+l) expresses the bit quantity obtained by adding the bit quantities allocated to all the pictures from the picture (j+1) as the coding target to the last picture (N) in the GOP.

R (j+i) = R < j)-S (j)... (16) At step S7, the controller 24 corrects the bit quantity R (j+l) calculated at step S6 by using the quantity of change {vbv~size(j) - vbv~size(j+1)} of the usable range of the VBV buffer, in accordance with the following equation.

R (j+1) = R(j+1) + {vbv~size(j) - vbv~size(j+1)} ... (17) The meaning of processing up to step S7 will now be described further in detail with reference to Figs. 8 to 13.

If the bit rate bitrate (j) designated by the controller 3 is equal to the bit rate bitrate (O) (hereinafter referred to also as a threshold value) of the case where the delay time of the VBV buffer reaches the maximum value-rmax, the controller 24 controls the VBV buffer (buffer memory 17) as shown in Fig. 8. (The character"j" does not indicate the character"i" (for program Pi) in bit~rate&num;i of Fig. 4 but indicates the order of the picture. Both of these characters can be collectively described as in bit~rate&num;i (j).) As shown in Fig. 8, the capacity of the VBV buffer sequentially increases at the bit rate bit-rate (O). At the point when the delay time #max has

elapsed, the capacity of the VBV buffer becomes vbvsize (0). Then, image data stored in the VBV buffer is reduced every time it is suitably read out and decoded.

When image data is newly written, the data quantity is increased. The operation as described above is sequentially repeated.

If the bit rate bitrate (1) designated by the controller 3 is greater than the threshold value bitrate (O), the controller 24 controls the buffer memory 17 at the time of encoding processing of step S5 and delays the output of image data by the time #1.

This delay time I is calculated in accordance with the following equation.

- cl =-rmax-r2 rmax-vbv~size (0)/bit~rate (1)... (18) After this delay time rl, data is written into the VBV buffer at the bit rate bitrate (l). At the point when the time T2 has elapsed after the start of writing, the capacity of the VBV buffer becomes vbv~size (l) = vbv~size (O). As is clear from comparison between Fig. 8 and Fig. 9, the maximum delay time-rmax of the VBV buffer is the same in both cases.

If the bit rate bitrate (2) designated by the controller 3 is smaller than the threshold value bitrate (O), the controller 24 controls the buffer memory 17 and sets (limits) the capacity (usable range) of the buffer memory 17 to not more than vbvsize (2). This arithmetic operation is carried out at step S2 of Fig. 6. Specifically, the range exceeding the vbv~size (2), of the capacity vbvsize (0) of the VBV buffer, is not used in this example. As a result, at the point when the delay time-rmax has been elapsed, the capacity vbvsize of the VBV buffer becomes vbvsize (2) (= Tmax x bitrate (2) ). Therefore, in this case, too, the delay time of the VBV buffer is rmax.

In other words, the delay time of the VBV buffer is constant at Tmax in any of the cases of Figs. 8 to 10.

Thus, seamless changes of the bit rate can be carried out in a broad range and can be applied to a live broadcast having a constant delay time in digital broadcasting.

In Fig. 10, if data is written into the VBV buffer for a delay time r3 (=

vbvsize (0)/bitrate (2)), the capacity of the VBV buffer will become vbvsize (O). In this example, however, since only the range not more than the capacity vbvsize (2) is used, the capacity does not actually reach vbv-size (O).

Fig. 11 shows the state of changes of the VBV buffer in the case where the bit rate is changed from bitrate (l) to bit-rate (2) at a halfway point. During the time period up to the time point tl, the value of the bit rate is bitrate (l), which is greater than the threshold value bitrate (O). Therefore, the state of changes of the VBV buffer in this case is similar to that of Fig. 9. On the other hand, if the bit rate is changed at the time point tl to the bit rate bitrate (2), which is smaller than the threshold value bitrate (O), the capacity of the VBV buffer is limited to vbvsize (2) (=-rmax x bitrate (2) ).

In the case where a rate control system on the assumption of a fixed bit rate such as TM5 and a fixed capacity of the VBV buffer is used, calculation of the usable range of the VBV buffer alone generates a problem as shown in Fig. 12.

Specifically, in the case where the bit rate is changed from the value bitrate (l) greater than the threshold value bitrate (O) to the value bitrate (2) smaller than the threshold value bitrate (O), the locus of data transition in the VBV buffer needs to be as indicated by a solid line in Fig. 12 so that the data volume shifts within the limited range of the VBV buffer. However, in the TM5 rate control algorithm, since the target bit quantity is determined to shift in an area close to the maximum value of the VBV buffer, limitation of the usable range alone will cause transition of the VBV buffer in an unusable range, as indicated by a dotted line in Fig. 12.

Thus, it can be considered to increase the quantity of generated bits by stuffing by the quantity of generated bits of the first I-picture, when the usable range of the VBV buffer is limited. In this way, however, the quantity of generated bits of the first I-picture increases. Therefore, when the remaining bit quantity R (j) in the GOP is updated in accordance with the equation (16) (that is, R (j+l) = R (j)-S (j)), the bit quantity R (j+l) allocated to the remaining non-coded pictures becomes a very small value, and the locus of the VBV buffer will return to the unusable upper range in Fig. 12.

Thus, at step S3, the value of the buffer occupancy quantity B* (j+l) calculated in accordance with the equation (12) and the value of the capacity vbvsize (2) of the VBV buffer calculated in accordance with the equation (13) are compared with each other. IfB* (j+l) is greater than vbvsize (2), the target bit quantity T (j) calculated at step Sl is corrected at step S4 by the difference (B* (j+l)-vbv-size (2) ) as shown in the equation (15). As a result, the corrected target bit quantity T (j) has a value smaller than the capacity vbvsize (2) of the VBV buffer by the difference (B* (j+l)- vbvsize (2) ) as shown in Fig. 13, and the unusable range of the VBV buffer is prevented from being used.

After the processing for limiting the usable range of the VBV buffer is carried out as described above, processing of step S8 and subsequent steps of the flowchart of Fig. 7 continuing from Fig. 6 is carried out. In this case, processing in the case where the bit rate is changed at a halfway point in the GOP is carried out.

The target bit quantity setting circuit 32 determines at step S8 whether the picture (j+1) is the leading picture of the GOP or not. In short, it determines whether (j+1) is I or not. If the picture (j+1) is not the leading picture of the GOP, the processing goes to step S9 and the target bit quantity setting circuit 32 determines whether or not a change of the bit rate in that GOP is designated by the controller 3.

If a change of the bit rate is not designated, the processing goes to step S 10 and the target bit quantity setting circuit 32 determines whether the processing target has reached the sequence end or not. If the sequence end has not been reached, the processing returns to step S I and the subsequent processing is repeatedly carried out.

If it is determined that the processing target has reached the sequence end, the processing ends.

If it is determined at step S9 that a change of the bit rate is designated, the target bit quantity setting circuit 32 goes to step S12 and corrects the bit quantity RU+ 1) corrected at step S7, using a value obtained by multiplexing the number of remaining pictures (N-j) of the GOP by the difference in bit quantity per picture (bit~rate (j+l)-

bitrate (j))/picrate, in accordance with the following equation.

RU+1) = fbit-rateo+l)-bit-rateo)) x (N-j)/pic~rate + R (j+l) ... (19) That is, if the bit rate is not changed at a halfway point in the GOP, the bit quantity R is gradually reduced from the initial value Rl as encoding proceeds, as shown in Fig. 14. In Fig. 14, a solid line indicates the case where it is assumed that the respective pictures are encoded with the equal bit quantity. Actually, since the quantity of generated bits of I-picture or P-picture is greater than that ofB-picture, the bit quantity R changes as indicated by a dotted line.

On the other hand, if a change of the bit rate is required at the next picture (j+1) after encoding the picture (j) of the GOP, the bit quantity RU) allocated to non-coded pictures following the picture (j) is corrected at step S 12 as expressed by the equation (19). Specifically, though the bit quantity R allocated to the remaining non-coded pictures has been controlled to be gradually reduced from the initial value RI at the first bit rate bit~rate(j+1), the bit quantity R (] +l) is corrected at the timing of the picture (j+1).

This corrected bit quantity R (j+l) is equal to the bit quantity R (j+l) of the picture (j+1) in the case where the pictures from the leading picture of the GOP are encoded at the second bit rate bit~rate (j+l) with an initial value ofR2.

In other words, in coding the picture (j+1) as a picture at a halfway point in the GOP, when the bit rate is changed from the first bit rate to the second bit rate, the bit quantity allocated to the non-coded pictures of the picture (j+1) and the subsequent pictures is corrected as if coding processing had been carried out at the second bit rate from the leading picture (j) of the GOP.

Next, the processing goes to step S13 and the target bit quantity setting circuit 32 determines whether or not the bit quantity R (j+l) corrected at step S12 is smaller than a predetermined minimum value Rmin. If the bit quantity R (j+l) is equal to or greater than the minimum value Rmin, 0 is set as the correction value"e", at step S14. If the bit quantity R (j+I) is smaller than the minimum value Rmin, the difference (R (j+l)-Rmin) between the bit quantity R (j+l) and the minimum value Rmin is set as the correction value"e", at step S l 5. This correction value"e"is used at step Sl 1.

The function of this correction value"e"will be described later.

After the processing of step S 14 or step S 15, the processing goes to step S 10 and the subsequent processing is repeatedly carried out.

If it is determined at step S8 that the coding target picture (j+1) is the leading picture of the GOP, the processing goes to step Sol 1 and the target bit quantity setting circuit 32 corrects the bit quantity R(j+1) in accordance with the following equation.

In short, the bit quantity R (l) allocated to non-coded pictures including the leading picture (1) of the GOP and the subsequent pictures is calculated by the following equation.

R (l) = bitrate (j+l) x N/pic~rate + R (j+1) + e ... (20) This bit~rate (j+l) expresses the new bit rate set with respect to the picture (j+1), and R (j+l) expresses the result of arithmetic operation in accordance with the equation (16) for the last picture (N) of the previous GOP.

After that, the processing returns to step S 10 and the subsequent processing is repeatedly carried out.

The function of the correction value"e"will now be described. In the case where the bit quantity R (j+l) corrected by the equation (19) at step S12 is smaller than the predetermined minimum value Rmin, if the bit rate of the next GOP is controlled while this R (j+l) < Rmin is left as it is, there is a risk that the VBV buffer will overflow.

Thus, a change of the bit rate at a halfway point in the GOP is designated. If R (j+l) is smaller than the minimum value Rmin at the point when the last picture (Nth picture) of the GOP is encoded, the initial value R2 of the bit quantity R for the next GOP is reduced by the difference"e"and the bit quantity for that GOP is set with an initial value of R2-e, as shown in Fig. 16. Thus, overflow of the VBV buffer is prevented.

In the above description, in each image coding device 2-i, the program Pi is statistically multiplexed by feeding back the global complexity Ci of actually coded data to the controller 3. However, the bit rate can also be controlled by feed-forward control. Fig. 17 shows an exemplary structure of such case. The structure of an image multiplexing system 1 shown in Fig. 17 is basically similar to that of the image multiplexing system 1 shown in Fig. 4 except that the coding difficulty Di, instead of the global complexity Ci, is outputted from each image coding device 2-i to the controller 3. The other parts of the structure are similar to those of Fig. 4.

The coding difficulty is an index indicating the quantity of bits generated as a result of coding processing. If the image of the coding target picture is complicated or highly dynamic, this coding difficulty is high. If the image of the coding target picture is simple or less dynamic, the coding difficulty is low.

Fig. 18 shows an exemplary structure of the image coding device 2-1 of Fig. 17.

(Although not shown, the image coding devices 2-2 to 2-n have the same structure as that of the image coding device 2-1. ) The basic structure is similar that of Fig. 5. However, in the exemplary structure of Fig. 18, an intra-AC calculation circuit 41 and a FIFO (first in first out) 42 are provided between the scan conversion macroblock forming circuit 12 and the subtracter 13. Also, an ME residual calculation circuit 51 and a coding difficulty calculation circuit 52 are additionally provided in the rate controller 23.

The intra-AC calculation circuit 41 receives the output of the scan conversion macroblock forming circuit 12, then calculates intra-AC in I-picture, and outputs the calculated intra-AC to the coding difficulty calculation circuit 52. The intra-AC calculation circuit 41 also outputs image data supplied from the scan conversion macroblock forming circuit 12 to the FIFO 42. The FIFO 42 delays the inputted image data at least by the time corresponding to the time required for the target bit quantity setting circuit 32 to set the target bit quantity, and outputs the delayed image data to the subtracter 13.

The ME residual calculation circuit 51 calculates an ME residual based on ME residual data outputted by the motion detection circuit 21 and outputs the calculated ME residual to the coding difficulty calculation circuit 52. The ME residual is a value obtained by adding the absolute value or the square value of a motion prediction error to the entire picture. The ME residual data is data for finding the ME residual.

The coding difficulty calculation circuit 52 calculates the coding difficulty Dl expressing the difficulty of coding of the picture on the basis of the ME residual

calculated by the ME residual calculation circuit 51 and the intra-AC calculated by the intra-AC calculation circuit 41. The coding difficulty calculation circuit 52 transmits the coding difficulty D 1 to the controller 3 and to the target bit quantity setting circuit 32. In this exemplary structure, since the coding difficulty D 1 calculated by the coding difficulty calculation circuit 52 is transmitted to the controller 3, the global complexity Cl arithmetically found by the complexity calculation circuit 31 is not supplied to the controller 3.

The other parts of the structure of the image coding device 2-1 shown in Fig. 18 is similar to those of Fig. 5.

The operation of the image coding device 2-1 of Fig. 18, mainly of the structure different from that of Fig. 5, will now be described. The intra-AC calculation circuit 41 calculates intra-AC from the image data outputted from the scan conversion macroblock forming circuit 12. The intra-AC means the absolute value sum of the difference between the pixel value of each pixel in a macroblock of 8 x 8 pixels and the average value of the pixel values in the macroblock in I-picture. The intra-AC is expressed by the following equation.

IntraAC = SI fcurr (x, y)- (#fcurr)/N# ... (21) In this equation, IntraAC expresses intra-AC, and fcurr (x, y) expresses the pixel value of each pixel in the macroblock. Efcurr (x, y) expresses the sum of the pixel values in the macroblock, and N expresses the number of pixels in the macroblock.

I ! expresses the sum with respect to the individual pixels in the macroblock.

In finding the motion vector, the motion detection circuit 21 outputs the absolute value sum (or square sum) of the difference in pixel value between macroblocks having the minimum value, as the ME residual data to the ME residual calculation circuit 51. The ME residual calculation circuit 51 adds the ME residual data from the motion detection circuit 21 to the entire picture and calculates the ME residual. That is, arithmetic operation is carried out by the ME residual calculation circuit 51 in accordance with the following equation.

ME-reside = F, I fj (x, y)-fj-l (x, y) I... (22) In the above equation, ME~reside expresses the ME residual, and fj (x, y) and fj-l (x, y) express the pixel values of the respective macroblocks. F, expresses the sum with respect to the individual pixels in the macroblock.

The coding difficulty calculation circuit 52 calculates the coding difficulty on the basis of the intra-AC supplied from the intra-AC calcula. on circuit 41 and the ME residual supplied from the ME residual calculation circuit 51. The coding difficulty expresses the dil : iculty of coding of the picture. In other words, it is the ratio of data quantity necessary for maintaining the same picture quality in coding. The intra-AC expresses complexity of the pattern, and the ME residual ex, !-esses quickness of motion of the image and complexity of the pattern. Since thes intra-AC and ME residual have strong correlation with the coding difficulty, these are used as variables.

For example, the coding difficulty D I is calculated by the coding difficulty calculation circuit 52 using a linear function.

Thus, the coding difficulty with high precision is calculated on the basis of the pre-read statistical quantity (intra-AC). The controller 3 determines the target bit rate bit#rate&num;i on the basis of the coding difficulty Di and outputs the determined bit rate to the image coding device 2-i.

The operation of the target bit quantity setting circuit 32 and the controller 24 of Fig. 18 will now be described with reference to the flowcharts of Figs. 19 and 20.

The processing of steps S31 to S37 is basically similar to the processing of steps S 1 to S7 shown in Fig. 6. However, at step S31, the target bit quantity T (j) of the picture (j) is calculated in accordance with the following equation, instead of the equations (4) to (6). In the following equation (23), subscripts"i", "p"and"b"corresponding to the picture types are omitted.

... (23)

In this equation, T (j) expresses the target bit quantity of the processing target picture (j), and RO) expresses the bit quantity allocated to future L pictures from the processing target picture (j). Dj expresses the coding difficulty of the picture (j). That is, in accordance with the above equation, the target bit quantity T (j) of the picture (j) is found by weighting the bit quantity R' (j) allocated to the pre-read L pictures by the ratio of the coding difficulty Dj of that picture and the sum of the coding difficulty Dj of pre-read N pictures.

The processing of steps S32 to S35 is similar to the processing of steps S2 to S5 of Fig. 6 and therefore will not be described further in detail. At step S36, the bit

quantity R' (j+1) allocated to the future L pictures from the processing target picture (j+1) is calculated in accordance with the following equation (24), instead of the equation (16).

R' (j+1) = R'G)-S (j) +F (j+L)... (24) In the equation (24), R' (j) expresses the bit quantity allocated to the future L pictures from the picture 0). SO) expresses the quantity of generated bits of the picture (j). F (j+L) expresses the predictive bit quantity allocated to the picture (j+L) as the L-th future picture from the picture (j+1).

The initial value ofR' (j) is expressed by the following equation in accordance with the bit quantity of the pre-read L pictures.

R' (1) = bitrate (1) x L/picrate... (25) In the equation (24), F (j+L) expresses the bit quantity corresponding to the picture type of the pictures (j+L) as the L-th future picture from the picture (j+1) and is prescribed, for example, by the following equations. In the equation (24), subscripts "i","p"and"b"corresponding to the picture types in the following equations (26) to (28) are omitted.

... (26)

... (27)

... (28) In the above equations, G expresses the bit quantity allocated to the future noncoded pictures of the picture (j+L) and the subsequent pictures in the GOP including the picture (j+L), and corresponds to the bit quantity R in the feedback rate control system shown in Figs. 4 and 5. This bit quantity G is also updated in accordance with the following equation, at step S36.

G (j+L+l) = G (j+L)-F (j+L)... (29) F (j+L) in the equation (29) is expressed by the equation of the corresponding picture type, from among the equations (26) to (28).

Since the bit quantity R'expresses the bit quantity of the L pictures to be coded from now, basically, the bit quantity R'has a constant value as indicated by a solid line in Fig. 21 regardless of the proceeding status of encoding. Actually, however, since the bit quantity changes for each picture type, the value varies around the value indicated by the solid line, as indicated by a broken line in Fig. 2 1.

On the contrary, the bit quantity G is the bit quantity allocated to the non-coded pictures in the GOP. Therefore, the value of the bit quantity G is gradually reduced along with the proceeding of encoding and is reset at the beginning of the GOP, as shown in Fig. 22, similarly to the bit quantity R in the feedback rate control.

Next, at step S37, updating processing of the bit quantity R'(j+1) is carried out in accordance with the following equation (30), instead of the equation (17) at step S7 of Fig. 6.

R'(j+1) = R'(j+1) + {vbv~size(j) - vbv~size(j+1)} ... (30) The above-described processing of steps S31 to S37 is the processing carried out for limiting the usable range of the VBV buffer, as described in the example of feedback rate control.

Next, the processing goes to step S38 and the target bit quantity setting circuit 32 determines whether the picture (j+1) is the leading picture of the GOP or not. If the picture (j+1) is not the leading picture of the GOP, the processing goes to step S39 and it is determined whether a change of the bit rate at a halfway point in the GOP is designated or not. If a change of the bit rate is not designated, the processing goes to step S40 and it is detennined whether the encoding processing has reached the sequence end or not. If the sequence end has not been reached, the processing returns to step S31 and the subsequent processing is repeatedly carried out. If it is determined at step S40 that the processing has reached the sequence end, the processing ends.

If it is detennined at step S39 that a change of the bit rate at a halfway point in the GOP is designated, the processing goes to step S41 and the target bit quantity setting circuit 32 corrects the bit quantity R' (j+l) and the bit quantity G (j+l) m accordance with the following equation.

R'G+1) = {bitrate (j+l)-bitrate (j)} x L/picrate + R' (j+l) ... (31) G (j+l) = {bitrate < j+l)-bitrate (j)} x (N-j)/picrate + G (j+l) ... (32) In the above equations, bitrate (j) expresses the first bit rate designated in coding the pictures up to the picture (j), and bitrate (j+l) expresses the second bit rate designated in coding the pictures from the picture (j+1). L expresses the number of pictures for which the coding difficulty is calculated prior to coding processing (that is, the number of pictures for which the coding difficulty is pre-read). N expresses the number of pictures included in the GOP.

In the case where the bit rate is thus changed from the first bit rate to the second bit rate at a halfway point in the GOP, the bit quantity R'allocated to the predetermined number (L) of pictures is corrected from the value RI corresponding to the first bit rate to the value R2 corresponding to the second bit rate, as shown in Fig. 23. In short, the bit quantity R'allocated to the non-coded pictures up to the L future pictures including the coding target picture is corrected as if coding processing had been carried out at the newly set second bit rate. Specifically, as understood from the equation (31), the bit quantity R'is corrected using the value obtained by multiplying the difference in bit quantity per picture by the number of L pictures for which the coding difficulty is pre-read.

On the other hand, the bit quantity G allocated to the non-coded pictures including the coding target picture in the GOP is changed from the value G (j+l) in the case where encoding is carried out at the bit rate bit-rate (l) to the value G I) in the case where encoding is carried out with the initial value R2 from the beginning, as shown in Fig. 24. This is similar to the case of the bit quantity R which is described with reference to Fig. 15. In short, the bit quantity G can be corrected using the value obtained by multiplying the difference in bit quantity per picture by the number of non-coded pictures (N-j) in the GOP.

Next, the processing goes to step S42 and the target bit quantity setting circuit

32 determines whether or not the bit quantity G (j+l) allocated to the non-coded pictures of the picture (j+1) and the subsequent pictures in the GOP is smaller than a minimum value Grin. If the bit quantity G (j+l) is equal to or greater than the minimum value Gmin, 0 is set as the correction value"e", at step S43.

If the bit quantity G (j+1) allocated to the non-coded pictures of the picture (j+1) and the subsequent pictures is smaller than the minimum value Gmin, the difference (G (j+l)-Gmin) between the bit quantity G (j+l) and the minimum value Gmin is set as the correction value"e", at step S44. This processing is similar to the processing of steps S 13 to S 15 of Fig. 7. This correction value"e"is used in the processing at step S46 or S47 as will be later described.

If it is determined at step S38 that the picture (j+1) as the coding target is the leading picture of the GOP (that is, (j+1) is (1) ), the processing goes to step S45 and the target bit quantity setting circuit 32 determines whether a change of the bit rate is designated or not.

The presence or absence of a change of bit rate is determined here. Meanwhile, if it is determined at step S8 of Fig. 7 that the picture (j+1) is the leading picture of the GOP, bit rate change processing is not carried out. In the processing of Fig. 7, since the same equation (20) is used at step Sil 1 regardless of whether the picture (j+1) is the leading picture of the GOP or not, determination of a change of the bit rate is not necessary. On the other hand, in the processing of the flowchart of Fig. 20, even when the picture (j+1) is the leading picture of the GOP, processing differs depending on the presence or absence of a change of the bit rate. Therefore, the determination processing of step S45 is inserted.

Specifically, if it is determined at step S45 that a change of the bit rate is not designated, the target bit quantity setting circuit 32 calculates the bit quantity G (l) allocated to the non-coded pictures including the first picture of the GOP, in accordance with the following equation at step S46.

G (l) = bitrate (j+l) x N/picrate + G (j+l) + e ... (33) If it is determined at step S45 that a change of the bit rate is designated, the processing goes to step S47 and the target bit quantity setting circuit 32 updates the bit quantity RI (1) allocated to the L-th non-coded picture from the first picture (1) of the GOP and the bit quantity G (l) allocated to the non-coded pictures including the first picture (1) of the GOP, in accordance with the following equations.

R' (1) = {bit~rate(j+1) - bit~rate(j)} x L/pic~rate + R'(j+l) ... (34)

G (l) = bitrate (j+l) x N/pic~rate + G 1) + e ... (35) In the above equations, bitrate (j) is the bit rate corresponding to the picture (j), and bitrate (j+l) is the bit rate corresponding to the picture (j+1).

As is clear from comparison between the processing of step S46 and the processing of step S47, the processing of step S47 includes updating processing of the bit quantity R' (1) in addition to the processing of the bit quantity G (1).

The function of the correction value"e"is similar to the function explained with reference to Fig. 16. As shown in Fig. 25, if the value of "e" is not 0 immediately after the last picture of the GOP is coded along with the change of the bit quantity G, the initial value R2 of the bit quantity G at the time of coding the next GOP is adjusted to a value smaller by the value of"e".

After the processing of steps S43, S44, S46 and S47, the processing goes to step S40 and the subsequent processing is repeatedly carried out.

In both of the above-described embodiments of feedback bit rate control and feed-forward bit rate control, the usable range of the VBV buffer is limited. However, there may be some problems in consideration of the picture quality. Specifically, it is assumed that a bit rate of 3 Mbps is set in the first GOP while a bit rate of 1.5 Mbps

is set in the second GOP, and that a bit rate of 3 Mbps is set again in the third GOP, as shown in Fig. 26. At this point, if the capacity of the VBV buffer is 1. 8 Mbits and the threshold value bitrate (O) is 3. 0 Mbps, the delay time-rmax is-rmax = 1. 8/3. 0 = 0. 6 (sec).

At this point, the initial value of the bit quantity R allocated to non-coded pictures in the GOP applied to the TM5 bit rate control algorithm in each GOP is found as follows from the formula ofbitrate x N/picrate. It is assumed that the number of GOPs N is 15 and that picrate is 30.

Specifically, in the first GOP, the initial value of the bit quantity R allocated to the non-coded pictures is 1. 5 (= 3. 0x 15/30) Mbits. In the next GOP, the initial value is 0. 75 (= 1. 5x 15/30). However, while the VBV buffer capacity vbvsize (1) (of the previous GOP) before being corrected by the difference (vbvsize (l)-vbvsize (2)) of the capacity of the VBV buffer in accordance with the equation (17) at step S7 of Fig. 6 is 1. 8 (= rmax x bit~rate (l) = 0. 6x3. 0), the VBV buffer capacity vbvsize (2) in the second GOP is 0. 9 (=-rmax x bitrate (2) = 0. 6x1. 5). Consequently, the initial value R is 1. 65 (= 0. 75+ (1. 8-0. 9)) Mbits.

In the third GOP, the initial value is 1. 5 (= 3. 0x15/30). However, while the capacity vbvsize (2) of the VBV buffer before changing is 0. 9, the capacity vbvsize (3) in this GOP is 1. 8. Therefore, the initial value R is 0. 6 (= 1. 5+ (0. 9-1. 8)) Mbits.

In the second GOP, though the bit rate is set at a small value of 1. 5 Mbps since the picture has a pattern easy to encode, the initial value of the bit quantity R is set at a larger value of 1. 65. In the third GOP, though the bit rate is set at a large value of 3.0 Mbps since the picture has a pattern difficult to encode, the initial value of the bit quantity R is set at a smaller value of 0.6 Mbps. That is, a reversal phenomenon is generated such that the initial value of the bit quantity R of the second GOP is large while the initial value of the bit quantity R of the last GOP is very small.

This reversal phenomenon is caused by the fact that the usable range of the capacity vbvsize of the VBV buffer is abruptly restricted when the value of the bit rate bitrate becomes smaller than the threshold value bitrate (O), as shown in Fig. 27.

In Fig. 27, the horizontal axis represents the bit rate bit-rate and the vertical axis represents the capacity vbv~size of the VBV buffer. In Fig. 27, a shaded area represents an area where the use of the VBV buffer is restricted.

Thus, a threshold value bitrate (Ou) greater than the threshold value bitrate (O) and a threshold value bitrate (OL) smaller than the threshold value bitrate (O) are set, as shown in Fig. 28. When the value of the bit rate bitrate becomes smaller than the threshold value bitrate (Ou), the usable range of the VBV buffer is gradually restricted until the bit rate reaches the threshold value bitrate (os). When the bit rate becomes smaller than the threshold value bitrate (OL), the usable range of the VBV buffer can be abruptly restricted as in the case of Fig. 27. In this case, the first factor on the right side prescribing the usable range of the VBV buffer in the equation (13) at step S2 of Fig. 6 is Tmax x bit~rate (j+l) when the bit rate is not higher than bitrate (OL). However, when the bit rate has a value between bitrate (OL) and bitrate (Ou), the first factor may be changed to the following formula.

{(vbv~size(0) - vbv~size(0L)) x bit-rate + vbvsize (OL) x bitrate (Ou) - vbv-size (O) x vbv-size (ou))

/ {bitrate (0u)-bitrate (OJ}... (36) Meanwhile, vbvsize (OL) is expressed by the following equation. vbvsize (OL) = vbvsize (0) x bitrate (OL)/bit~rate (0) ... (37) In the feed-forward bit rate control, too, the capacity of the VBV buffer is similarly calculated in accordance with the arithmetic operation of step S32 of Fig. 19.

Although the intra-AC calculation circuit 41 of Fig. 18 is adapted for calculating

intra-AC, it may be adapted for calculating flatness instead of intra-AC. The flatness is data indicating spatial flatness of the image. In this case, a DCT block of 8x8 pixels is divided into subblocks each consisting of 2 x2 pixels. Then, the difference between pixel data (pixel values) located on the diagonal in each subblock is calculated, and the smaller value of absolute values of difference is selected. The selected differential value is compared with a predetermined threshold, and the total number of subblocks having the differential value smaller than the threshold value is found as the flatness for each picture.

The value of flatness becomes smaller as the pattern of the image is spatially more complicated. The value of flatness becomes greater as the pattern of the image is spatially flatter. This flatness has strong negative correlation with the coding difficulty Di. Therefore, the coding difficulty Dj of a picture to be I-picture before compression coding can be found from the flatness and the target bit quantity TO) for I-picture can be found from the flatness.

As described above, the bit rate can be changed at a halfway point in the GOP while the rate control method for a fixed bit rate is used. Therefore, the codes of the pattern quickly meet changes of the difficulty so as to change the bit rate. As a result, even when the phases of GOP of individual programs are not synchronized, the transmission capacity can be effectively used and the overall picture quality can be improved.

Also, by using the rate control method used for encoding at a fixed bit rate, rate control that can prevent underflow or overflow of the VBV buffer (or the buffer of the decoder) can be extended to statistical multiplexing.

This invention is not limited to statistical multiplexing, and can be applied to the case where the bit rate is searnlessly changed while the rate control method for fixedrate coding is used in encoding data to be stored into a recording medium such has a hard disk. Thus, it is possible to change the bit rate in accordance with the picture pattern and hence to realize predetermined picture quality and saving of the capacity of the storage medium.

In the above-described embodiment, the target bit quantity is calculated on the GOP basis by using the TM5 algorithm. However, this invention is not limited to the embodiment and can be broadly applied to the case where the target bit quantity is calculated by calculating the bit quantity using a target transmission rate on the basis of a predetermined number of pictures as a unit from among pictures to be coded.

Also, in the above-described embodiment, the bit rate is changed on the picture basis by correcting the bit quantity R allocated to the remaining non-coded pictures. However, this invention is not limited to the embodiment and can be broadly applied to the case where the bit rate is changed on the GOP basis.

Moreover, in the above-described embodiment, each program is coded and transmitted in accordance with the MPEG system. However, this invention is not limited to the embodiment and can be broadly applied to the case where various programs are coded and transmitted by using various coding systems.

In the present specification, the system represents an entire device constituted by a plurality of devices and units.

As providing media for providing a computer program for carrying out processing as described above to the user, communication media such as a network and a satellite as well as recording media such as a magnetic disk, a CD-ROM and a solid state memory can be used.

As described above, according to the present invention, when a designated bit rate is changed from a first bit rate to a second bit rate, the usable range of the virtual buffer is prescribed in accordance with the second bit rate, and the target bit quantity is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

According to the present invention, the usable range of the virtual buffer is prescribed in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and the coding means is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

According to the present invention, in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, the usable range of the virtual buffer is prescribed in accordance with the changed designated bit rate, and the coding means is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

According to the present invention, when the designated bit rate is changed from a first bit rate to a second bit rate, the usable range of the virtual buffer is prescribed in accordance with the second bit rate, and the target bit quantity is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

According to the present invention, the usable range of the virtual buffer is prescribed in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and the coding step is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

According to the present invention, in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, the usable range of the virtual buffer is prescribed in accordance with the changed designated bit rate, and the coding step is controlled so that the data occupancy quantity of the bit stream falls within the usable range.

Thus, in any case, seamless changes of the bit rate can be realized in a broad range without increasing the delay quantity between the coding device and the decoding device and can be applied to the case where real-time property is required as in a live broadcast.

Description of Numerals I image multiplexing system; 2-1 to 2-n image coding device; 3 controller; 4 multiplexer; 11 picture rearrangement circuit; 12 scan conversion macroblock forming circuit ; 13 subtracter; 14 DCT circuit ; 15 quantization circuit ; 16 variablelength coding circuit; 17 buffer memory ; 18 inverse quantization circuit; 19 inverse DCT circuit; 20 adder; 21 motion detection circuit; 22 motion compensation circuit; 23 rate controller; 24 controller; 31 complexity calculation circuit; 32 target bit quantity setting circuit; 33 quantizer scale code determination circuit

Claims

CLAIMS 1. A coding device for coding video data on the basis of a designated bit rate, the device comprising: control means for calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means; the control means prescribing a usable range of the virtual buffer in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, the control means controlling the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.
2. A coding method for coding video data on the basis of a designated bit rate, the method comprising: a control step of calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step ; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step; the control step including prescribing of a usable range of the virtual buffer in accordance with a preset prescribed delay time and the designated bit rate so that the delay quantity of the virtual buffer does not reach the prescribed delay time or longer, and controlling of the coding step so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.
3. A coding device for coding video data on the basis of a designated bit rate, the device comprising : control means for calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means; the control means prescribing a usable range of the virtual buffer in accordance with a second bit rate when the designated bit rate is changed from a first bit rate to the second bit rate; the control means controlling the target bit quantity supplied to the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.
4. The coding device is claimed in claim 3, wherein the control means verifies whether or not the data occupancy quantity of the virtual buffer means in the case where the coding target picture is coded on the basis of the target bit quantity falls within the usable range of the virtual buffer, and corrects the target bit quantity allocated to a picture preceding the coding target picture in accordance with the result of verification.
5. The coding device as claimed in claim 3, wherein the control means increases the target bit quantity allocated to a picture preceding the coding target picture by an amount exceeding an upper limit of the usable range of the virtual buffer in the case where the data occupancy quantity of the virtual buffer in the case where the coding target picture is coded on the basis of the target bit quantity exceeds the upper limit of the usable range of the virtual buffer.
6. The coding device as claimed in claim 4, wherein the target bit quantity allocated to the coding target picture is found by distributing a bit quantity allocated to non-coded pictures that have not been coded in a GOP including the coding target picture, in accordance with the picture type of the coding target picture.
7. The coding device as claimed in claim 6, wherein the control means corrects the bit quantity of the non-coded pictures, by using a value obtained by the difference between a bit quantity per picture at the first bit rate and a bit quantity per picture at the second bit rate by the number of non-coded pictures, and calculates the target bit quantity of the coding target picture on the basis of the corrected bit quantity of the non-coded pictures.
8. The coding device as claimed in claim 7, wherein in coding pictures up to a picture immediately before the coding target picture at the first bit rate and in coding pictures from the coding target picture at the second bit rate, the control means finds the bit quantity of the non-coded pictures at and after the coding target picture, by subtracting the quantity of generated bits generated by coding processing of the picture immediately before the coding target picture from the bit quantity allocated to the non-coded pictures at and after the picture immediately before the coding target picture.
9. The coding device as claimed in claim 8, wherein a first virtual buffer size indicating a usable range of the virtual buffer corresponding to the first bit rate is calculated on the basis of the first bit rate and a preset delay time so that the delay quantity of the virtual buffer does not reach the preset delay time or longer, and wherein a second virtual buffer size indicating a usable range of the virtual buffer corresponding to the second bit rate is calculated on the basis of the second bit rate and a preset delay time so that the delay quantity of the virtual buffer does not reach the preset delay time or longer, the control means correcting the bit quantity of the non-coded pictures at and after the coding target picture by using the difference between the first virtual buffer size and the second virtual buffer size.
10. The coding device as claimed in claim 6, wherein in coding a coding target picture d+1) as a (j+l) th picture in the GOP, a bit quantity R (j+l) allocated to non-coded pictures including the coding target picture (J+1) in the target GOP is calculated in accordance with the following equation, R (j+l) =R (j)-S (j) and

wherein a target bit quantity allocated to the coding target picture (j+1) is calculated on the basis of the bit quantity Ru+ 1) allocated to the non-coded pictures.
11. The coding device as claimed in claim 10, wherein the coding target picture (j+1) is a picture at a halfway point in the target GOP, and wherein in coding pictures up to a picture (j) before the coding target picture at the first bit rate and in coding pictures from the coding target picture (j+1) at the second bit rate, the control means calculates a first virtual buffer size indicating a usable range of the virtual buffer corresponding to the first bit rate on the basis of the first bit rate and a preset delay time so that the delay quantity of the virtual buffer does not reach the preset delay time or longer, and calculates a second virtual buffer size indicating a usable range of the virtual buffer corresponding to the second bit rate on the basis of the second bit rate and a preset delay time so that the delay quantity of the virtual buffer does not reach the preset delay time or longer.
12. The coding device as claimed in claim 11, wherein the control means corrects the

bit quantity Ru+ 1) allocated to the non-coded pictures in accordance with the following equation, R (j+l) = R (j+l) + (vbvsize (j)-vbvsize (j+l)) where Ru+ 1) on the right side expresses the bit quantity allocated to the non-coded pictures, corrected in claim 11, vbvsize (j) expresses the first virtual buffer size corresponding to the first bit rate, and vbvsize (j+l) expresses the second virtual buffer size corresponding to the second bit rate.
13. The coding device as claimed in claim 12, wherein the bit quantity R (j+l) of the non-coded pictures at and after the picture (j+1) in the GOP including the coding target picture (j+1) is corrected in accordance with the following equation, Ru+ 1) = (bit~rate (j+l)-bitrate (j)) x (N-j)/picturerate + Ru+ 1) where bitrate (j) expresses the first bit rate, bit~rate(j+1) expresses the second bit rate, N expresses the number of pictures included in the GOP, picture~rate expresses the frame rate, and Ru+ 1) expresses the bit quantity allocated to the non-coded pictures, corrected in claim 12.
14. The coding device as claimed in claim 13, wherein the target bit quantity TO) allocated to the picuture (j) is calculated in accordance with the following equations, Ti(j) = max (R(j) / (1 + NpXp/XiKp + NbXb/XiKb), bit~rate/8xpicture~rate)

Typo) max (pro)/ (Np + NbKpXb/KbXp), bitrate/8xpicturerate) Tb (j) = max (reg)/ (Nb + NpKbXp/KpXb), bitjrate/8xpicture~rate) where Ti (j) expresses the target bit quantity in the case where the picture (j) is I-picture, Typo) expresses the target bit quantity in the case where the picture 0) is P-picture, Tb (j) expresses the target bit quantity in the case where the picture G) is Bpicture, R (j) expresses the bit quantity allocated to the non-coded pictures at and after the picture (j) in the GOP including the coding target picture (j), Xi expresses global complexity indicating complexity of a screen of I-picture,

Xp expresses global complexity indicating complexity of a screen of P-picture, Xb expresses global complexity indicating complexity of a screen ofB-picture, Np expresses the number of non-coded P-pictures in the GOP including the coding target picture 0), Nb expresses the number of non-coded B-pictures in the GOP including the coding target picture 0), Kp expresses the ratio of a quantizer scale code of P-picture with reference to a quantizer scale code of I-picture, and Kb expresses the ratio of a quantizer scale code of B-picture with reference to the quantizer scale code of I-picture.
15. The coding device as claimed in claim 14, wherein in order to verify whether or not a data occupancy quantity B*(j+1) of the virual buffer after coding the picture (j+1) falls within the range of the second virtual buffer size when the designated bit rate is changed from the first bit rate to the second bit rate, the control means calculates the

data occupancy quantity B*0+1) of the virtual buffer after coding the picture 0+1) in accordance with the following equation, B*0+l) = B* (j)-T (j) + (t (j+l)-to)) x bit~rate (j+l) where B* (j) expresses the data occupancy quantity of the virtual buffer after coding the picture G), TO) expresses a target bit quantity allocated to the picture to) expresses the time for decoding the picture 0), te+ 1) expresses the time for decoding the picture (j+1), and bitrate (j+1) expresses the second bit rate.
16. The coding device as claimed in claim 15, wherein in the case where the data occupancy quantity of the virtual buffer after coding the picture (j+1) is greater than the second virtual buffer size when the designated bit rate is changed from the first bit rate to

the second bit rate, the control means corrects the target bit quantity TO) allocated to the picture 0) in accordance with the following equation, TO) = TO) + (B*0+1)-vbv-sizeo+l)) where TO) on the right side expresses the target bit quantity allocated to the picture (j), calculated in claim 14, B* (j+l) expresses the data occupancy quantity of the virtual buffer after coding the picture 0+1), and

vbvsize (j+l) expresses the second virtual buffer size corresponding to the second bit rate.
17. A coding device for coding video data on the basis of a designated bit rate, the device comprising : control means for calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; coding means for coding a coding target picture on the basis of the target bit quantity controlled by the control means; and virtual buffer means for verifying the bit quantity of a bit stream outputted from the coding means; the control means prescribing a usable range of the virtual buffer in accordance with a changed designated bit rate in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, the control means controlling the coding means so that the data occupancy quantity of the bit stream outputted from the coding means falls within the usable range.
18. A coding method for coding video data on the basis of a designated bit rate, the method comprising: a control step of calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step; the control step including prescribing of a usable range of the virtual buffer in accordance with a second bit rate when the designated bit rate is changed from a first bit rate to the second bit rate, and controlling of the target bit quantity supplied to the coding step so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.
19. A coding method for coding video data on the basis of a designated bit rate, the method comprising: a control step of calculating a target bit quantity to be allocated to each picture on the basis of the designated bit rate; a coding step of coding a coding target picture on the basis of the target bit quantity controlled at the control step; and a virtual buffer step of verifying the bit quantity of a bit stream outputted from the coding step; the control step including prescribing of a usable range of the virtual buffer in accordance with a changed designated bit rate in the case where the designated bit rate is changed to not more than a prescribed bit rate defined by the size of the virtual buffer and a preset prescribed delay time, and controlling of the coding step so that the data occupancy quantity of the bit stream outputted from the coding step falls within the usable range.