GB2363013A

GB2363013A - Circuit board and method for impedance matching

Info

Publication number: GB2363013A
Application number: GB0013277A
Authority: GB
Inventors: Moshe Einat; Rami Abramowitz; Gadi Shirazi
Original assignee: Motorola Israel Ltd
Current assignee: Motorola Solutions Israel Ltd
Priority date: 2000-06-01
Filing date: 2000-06-01
Publication date: 2001-12-05
Anticipated expiration: 2020-06-01
Also published as: GB0013277D0; GB2363013B

Abstract

The board 200 has input, output and intermediate nodes; pads 212, 214 for coupling a first component between the input node and the output node; pads 222, 224 for coupling a second component between the input node and earth; pads 232, 234 for coupling a third component between the output node and the datum potential; pads 242, 244 for coupling a fourth component between the input node and the intermediate node; pads 252, 254 for coupling a fifth component between the intermediate node and the datum potential; and pads 262, 264 for coupling a sixth component between the intermediate node and the output node. The components may be added in stages until necessary impedance matching performance is obtained. In arrangements using fewer components, no unnecessary wiring nor blank components are required. This minimises energy losses while allowing more complex multi-element configurations to be used if necessary without PCB re-design.

Description

2363013 APPARATUS AND METHOD FOR IMPEDANCE MATCHING

Field of the Invention

This invention relates to impedance matching in circuits generally, and particularly, though not exclusively, to impedance matching in radio frequency (RF) circuits.

Background of the Invention

In the field of this invention it is known, after designing a circuit comprised of a few elements, to introduce a final stage of impedance matching between the different elements.

The input and output impedance of electrical elements are crucial parameters that determine the amount of energy being transferred from one element to another. The wellknown impedance- condition that must be fulfilled in order to obtain maximal energy transfer between two elements is:

Z I out Z2 in where Zlout is the output impedance of a first element (as shown at 102 in FIG. 1) that transfers energy to a second element (104) whose input impedance is Z2in. Usually, the design of the elements is meant to achieve this ideal impedance condition, but an exact matching is frequently hard to achieve.

Therefore a matching network that performs the fine tuning of the matching is typically inserted between the 0 elements, as shown in at 103 FIG. 2. This matching network has input impedance:

ZNin Z 1 out and output impedance:

ZNout Z 2 in - Therefore the matching network is matched both to the output of the first element and to input of the second element, and maximal energy transfer is obtained.

There are few methods known (see, for example, the publication "RF circuit design", chapter 4, by Cheris Bowick, published by SAMS, 1991) to design such a matching network. The basic network is comprised of one element. A capacitor or coil is connected in series or in parallel between the elements. This network has the advantage of simplicity, but it has limited abilities: it cannot match all cases, but only specific cases. A twoelement matching network, which is also called an " L 11 network, is a better network that can match wider range of cases; however, it still does not cover all cases. A three-element matching network, also known as either "T" or "E" can theoretically match all cases, but the bandwidth of matching may not be well defined. In order to control the bandwidth, a network with more elements is needed. Every element adds a further degree of freedom to the network, so a 5-element network (for example) can match for all cases and for varying bandwidth and for varying voltage standing wave ratio (VSWR). More elements can give even better bandwidth tuning, meaning that the good matching between the elements is achieved across a relatively wide bandwidth. Accordingly, it is clear that from this point of view a matching network with many elements is preferable.

However, this approach has the disadvantage that in a multi-element network there is increased loss in the matching network. Obviously, unlike ideal elements, practical elements have loss. Adding elements increases the power loss in the network, and less power reaches the final elements so the effectiveness of the matching network is reduced.

Since the matching network is the final stage of the design, usually a general matching network is designed on the printed circuit board (PCB) that determines only the matching network type. The exact component values are determined at the end of the process.

The designer faces a conflict. If a 3-element network is designed it might be not satisfactory from the bandwidth point of view. On the other hand, if a network of 5 elements or more is designed, and only 3 elements or fewer are good enough, blank elements (OQ resistance) must be inserted in place of the absent serial elements. Such elements and their extra wiring always have loss, and so therefore an unnecessary RF loss will be present. Occasionally, when this matching can not be achieved in the first PCB model, a second or further PCB models are required.

A matching network design method, that enables the designer to determine the final type of the network (3 elements or more), after the PCB exists, is required.

It is an object of the present invention to provide apparatus and method for impedance matching wherein the abovementioned disadvantages may be alleviated.

Summary of the Invention

In accordance with a first aspect of the invention there is provided an apparatus for impedance matching as claimed in claim 1.

In accordance with a second aspect of the invention there is provided a method for producing an impedance matching network as claimed in claim 4.

Brief Description of the Drawings

One RF impedance matching network and method of production will now be described, by way of example only, with reference to the accompanying drawings, in which:

FIG. 1 shows in block diagrammatic form an impedance relationship between two series connected components; FIG. 2 shows in block diagrammatic form an impedance relationship between two components connected serially via an impedance matching network; FIG. 3 shows diagrammatically a printed circuit board carrying an impedance matching network employing the present invention; FIG. 4 shows diagrammatically the printed circuit board impedance matching network of FIG. 3 with a first configuration of components; FIG. 5 shows diagrammatically the printed circuit board impedance matching network of FIG. 3 with a second configuration of components; and FIG. 6 shows diagrammatically the printed circuit board impedance matching network of FIG. 3 with a third configuration of components.

Description of Preferred Embodiment(s)

Referring now to FIG. 3, a printed circuit board (PCB) is used to carry one or more components (210, 220, 230, 240, 250 and/or 260), as will be described below, configured as an impedance matching network. The PCB has an input node for receiving signals from a matching network input port 202, and an output node for providing signals to a matching network output port 204.

The PCB 200 is provided with six pairs of solder pads (212, 214; 222, 224; 232, 234; 242, 244; 252, 254; and 262, 264). Conductive tracks are provided on the PCB to connect pads 224 and 212, to connect pads 214 and 234, to connect pads 224 and 242, to connect pads 234 and 264, and to connect pads 244, 252 and 262 via a common node.

Conductive tracks are also provided to allow pads 222, 232 and 254 to be connected to ground potential.

As will be more fully understood from the following, in different configurations of the impedance matching network different ones of the components may be present or absent from the PCB 200, and so consequently in FIG.

3 the components 210, 220, 230, 240, 250, 260 (typically capacitors or inductors) are shown in dotted line only.

Referring now to FIG. 4, in use of the PCB 200 to produce a desired impedance matching network, the component 210 is first connected to and between the solder pads 212 and 214. The performance of the resulting simple impedance matching network as shown in FIG. 4 is tested to determine whether it meets the performance criteria for the desired application. If the desired performance criteria are met, the PCB is used, with only the component 210 as shown in FIG. 4, as the impedance matching network for the desired application.

It will be understood that the impedance matching network shown in FIG. 4, although simple and providing only minimal matching, requires no unnecessary wiring nor blank components. The impedance matching network shown in FIG. 4 therefore provides a low loss solution that may be 20 used in suitable applications. If used in the configuration shown in FIG. 4, the overhead of the additional pairs of unused solder pads would typically be considered tolerable.

However, if the testing of the PCB as shown in FIG. 4 shows that the necessary performance criteria are not met, then two further components are added to the board (as shown in FIG. 5): the component 220 is connected to and between the solder pads 222 and 224, and the 30 component 230 is connected to and between the solder pads 232 and 234. The performance of the resulting simple impedance matching network as shown in FIG. 5 is tested to determine whether it meets the performance criteria for the desired application. If the desired performance criteria are met, the PCB is used, with the three components 210, 220 and 230 as shown in FIG. 5, as the impedance matching network for the desired application.

It will be understood that the impedance matching network shown in FIG. 5, although relatively simple, provides matching over a wider band than possible with the simple network of FIG. 4, requires no unnecessary wiring nor blank components. The impedance matching network shown in FIG. 4 therefore provides a wider bandwidth, with only losses necessary to achieve the wider bandwidth solution, that may be used in suitable applications. If used in the configuration shown in FIG. 5, the overhead of the three additional pairs of unused solder pads would typically be considered tolerable.

However, if the testing of the PCB as shown in FIG. 5 shows that the necessary performance criteria are not met, then (as shown in FIG. 6) one component is removed and three further components are added to the board: the component 210 is removed between the pads 212 and 214, the component 240 is connected to and between the solder pads 242 and 244, the component 250 is connected to and between the solder pads 252 and 254, and the component 260 is connected to and between the solder pads 262 and 264. The PCB is then used, with the five components 220, 230, 240, 250 and 260 as shown in FIG. 6, as the impedance matching network for the desired application.

It will be understood that the impedance matching network shown in FIG. 6, provides broadband matching (which may be necessary for some applications), and allows this to be achieved on the same PCB 200 as for the simplest a matching network of FIG. 4 without requiring a re-design of the PCB.

It will be understood that (although in the above described example first one element, then if necessary three elements are used), if one element alone does not allow the necessary performance criteria to be met, two elements (for example, elements 210 and 220, or elements 210 and 230) could next be tried before if necessary moving to three elements as described. Similarly, if it is necessary to move beyond three elements, four elements could be tried before moving to five elements as described.

Claims

Claim (s)

An apparatus for impedance matching, comprising: an input node; an output node; an intermediate node; first circuit means for receiving a first circuit element for coupling between the input node and the output node; second circuit means for receiving a second circuit element for coupling between the input node and a datum potential; and third circuit means for receiving a third circuit element for coupling between the output node and the datum potential; fourth circuit means for receiving a fourth circuit element for coupling between the input node and the intermediate node; fifth circuit means for receiving a fifth circuit element for coupling between the intermediate node and the datum potential; and sixth circuit means for receiving a sixth circuit element for coupling between the intermediate node and the output node.

2. The apparatus according to claim 1, wherein the apparatus comprises a printed circuit board, and the circuit means comprise pairs of solder pads for receiving therebetween the circuit elements.

a) The apparatus according to claim 1 or 2, apparatus is arranged for radio frequency impedance matching.

wherein the b) A method for producing an impedance matching network, comprising the steps of:

c) providing:

e) an input node; an output node; first circuit means for coupling a first circuit element between the input node and the output node; second circuit means for coupling a second circuit element between the input node and a datum potential; and third circuit means for coupling a third circuit element between the output node and the datum potential; d) providing a first circuit element at the first circuit means; determining if the network performance meets a predetermined level of acceptability; f) if the predetermined level of acceptability in step c) is not met, providing a second circuit element at the second circuit means and providing a third circuit element at the third circuit means.

5. The method step according to claim 4, wherein a) includes providing:

an intermediate node; fourth circuit means for coupling a fourth circuit element between the input node and the intermediate node; fifth circuit means for coupling a fifth circuit element between the intermediate node and the datum potential; and sixth circuit means for coupling a sixth circuit element between the intermediate node and the output node; and the method further comprises the steps of g) determining if the network performance meets a predetermined level of acceptability; and h) if the predetermined level of acceptability in step e) is not met, removing the first circuit element, providing a fourth circuit element at the fourth circuit means, providing a fifth circuit element at the fifth circuit means and providing a sixth circuit element at the sixth circuit means.

6. The method according to claim 4 or 5 wherein step a) comprises providing a printed circuit board, and the steps of providing circuit means comprise providing pairs of solder pads for receiving therebetween the circuit elements.

7. The method according to claim 4, 5 or 6 wherein the impedance matching network is a radio frequency impedance matching network.

8. An apparatus for impedance matching substantially as hereinbefore described with reference to FIG. 3 to FIG. 6 of the accompanying drawings.

9. A method for producing an impedance matching network substantially as hereinbefore described with reference to FIG. 3 to FIG. 6 of the accompanying drawings.

t 3 Amendments to the claims have been filed as follows Claim (s) 1. An apparatus for providing alternative connection configurations for one or more circuit elements in a circuit in which the one or more circuit elements when contained in the circuit are required to provide impedance matching with other elements in the circuit, the apparatus comprising: an input node; an output node; an intermediate node; first circuit means for receiving a first circuit element for coupling between the input node and the output node; second circuit means for receiving a second circuit element for coupling between the input node and a datum potential; and third circuit means for receiving a third circuit element for coupling between the output node and the datum potential; fourth circuit means for receiving a fourth circuit element for coupling between the input node and the intermediate node; fifth circuit means for receiving a fifth circuit element for coupling between the intermediate node and the datum potential; and sixth circuit means for receiving a sixth circuit element for coupling between the intermediate node and the output node.

2. The apparatus according to claim 1, wherein the apparatus comprises a printed circuit board, and the circuit means comprise pairs of solder pads for receiving between each pair a circuit element.

L- 3. The apparatus according to claim 1 or 2, wherein the apparatus includes one or more circuit elements arranged f or radio frequency impedance matching with other elements in a circuit connected to the apparatus.

4. A method for producing an impedance matching within a circuit, comprising the steps of:

a) providing an apparatus as claimed in claim 1 or claim 2:

b) providing a first circuit element at the first circuit means; determining if the performance of a circuit containing the apparatus including the circuit element meets a predetermined level of acceptability; if the predetermined level of acceptability in step c) is not met, providing a second circuit element at the second circuit means and providing a third circuit element at the third circuit means. 5. The method according to claim 4, wherein the method further comprises the steps of:

e) determining if the circuit performance following step d) meets a predetermined level of acceptability; and f) if the predetermined level of acceptability in step d) is not met, removing the first circuit element, providing a fourth circuit element at the fourth circuit means, providing a fifth circuit element at the fifth circuit means and providing a sixth circuit element at the sixth circuit means.

d) 15, 6. The method according to claim 4 or claim 5 wherein a radio frequency impedance matched circuit or network is produced by the method.

7. An apparatus as claimed in claim 1 and substantially as hereinbefore described with reference to FIG. 3 to FIG. 6 of the accompanying drawings.

8. A method as claimed in claim 4 and substantially as hereinbefore described with reference to FIG. 3 to FIG. 6 of the accompanying drawings.