GB2358939A - Scheduling resource requests in a computer system - Google Patents

Scheduling resource requests in a computer system

Info

Publication number
GB2358939A
GB2358939A GB0109904A GB0109904A GB2358939A GB 2358939 A GB2358939 A GB 2358939A GB 0109904 A GB0109904 A GB 0109904A GB 0109904 A GB0109904 A GB 0109904A GB 2358939 A GB2358939 A GB 2358939A
Authority
GB
United Kingdom
Prior art keywords
tables
computer system
scheduling resource
resource requests
slot assignments
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB0109904A
Other versions
GB2358939B (en
GB0109904D0 (en
Inventor
Siamack Haghighi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of GB0109904D0 publication Critical patent/GB0109904D0/en
Publication of GB2358939A publication Critical patent/GB2358939A/en
Application granted granted Critical
Publication of GB2358939B publication Critical patent/GB2358939B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4843—Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881—Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00—Indexing scheme relating to G06F9/00
    • G06F2209/48—Indexing scheme relating to G06F9/48
    • G06F2209/485—Resource constraint

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
  • Multi Processors (AREA)

Abstract

A system (10) includes resources, execution entities adapted to issue requests for the resources, and tables or table segments (202) containing slot assignments for each execution entity. A controller (314) is adapted to access the tables or table segments and to process requests from the execution entities according to the slot assignments. The system also includes a scheduler (232) to update slot assignments. In addition, the system may include an operating system (220) that negotiates with the execution entities to determine resource usage requirements. The tables or table segments may be updated by the operating system based on the resource usage requirements.
GB0109904A 1998-11-09 1999-08-26 Scheduling resource requests in a computer system Expired - Fee Related GB2358939B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US18861498A 1998-11-09 1998-11-09
PCT/US1999/019596 WO2000028418A1 (en) 1998-11-09 1999-08-26 Scheduling resource requests in a computer system

Publications (3)

Publication Number Publication Date
GB0109904D0 GB0109904D0 (en) 2001-06-13
GB2358939A true GB2358939A (en) 2001-08-08
GB2358939B GB2358939B (en) 2003-07-02

Family

ID=22693875

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0109904A Expired - Fee Related GB2358939B (en) 1998-11-09 1999-08-26 Scheduling resource requests in a computer system

Country Status (7)

Country Link
JP (3) JP2002529850A (en)
AU (1) AU5902299A (en)
DE (1) DE19983709B4 (en)
GB (1) GB2358939B (en)
HK (1) HK1036860A1 (en)
TW (1) TW511034B (en)
WO (1) WO2000028418A1 (en)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW511034B (en) * 1998-11-09 2002-11-21 Intel Corp Scheduling requests in a system
US20020040381A1 (en) * 2000-10-03 2002-04-04 Steiger Dianne L. Automatic load distribution for multiple digital signal processing system
US7673304B2 (en) * 2003-02-18 2010-03-02 Microsoft Corporation Multithreaded kernel for graphics processing unit
US7690003B2 (en) * 2003-08-29 2010-03-30 Fuller Jeffrey C System and method for increasing data throughput using thread scheduling
KR101014149B1 (en) 2008-11-13 2011-02-14 (주)인디링스 Controller for solid state disk of controlling access to memory bank
US8255615B1 (en) 2009-01-08 2012-08-28 Marvell International Ltd. Flexible sequence design architecture for solid state memory controller
DE102009016742B4 (en) 2009-04-09 2011-03-10 Technische Universität Braunschweig Carolo-Wilhelmina Multiprocessor computer system
CN101667159B (en) 2009-09-15 2012-06-27 威盛电子股份有限公司 High speed cache system and method of trb
EP2656216B1 (en) 2010-12-20 2018-12-19 Marvell World Trade Ltd. Device with descriptor scheduler and corresponding method and system
DE102011013833B4 (en) 2011-03-14 2014-05-15 Continental Automotive Gmbh display device
KR102149171B1 (en) * 2018-05-18 2020-08-28 강원대학교산학협력단 Method and apparatus of real-time scheduling for industrial robot system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0798638A2 (en) * 1996-03-28 1997-10-01 Hitachi, Ltd. Periodic process scheduling method
EP0817041A2 (en) * 1996-07-01 1998-01-07 Sun Microsystems, Inc. Method for reserving resources
US5809261A (en) * 1995-11-20 1998-09-15 Advanced Micro Devices, Inc. System and method for transferring data streams simultaneously on multiple buses in a computer system
US5812844A (en) * 1995-12-07 1998-09-22 Microsoft Corporation Method and system for scheduling the execution of threads using optional time-specific scheduling constraints

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AU3416293A (en) * 1991-12-23 1993-07-28 Network Express System for internetworking data terminal equipment through a switched digital network
JP2904483B2 (en) * 1996-03-28 1999-06-14 株式会社日立製作所 Scheduling a periodic process
US5928327A (en) * 1996-08-08 1999-07-27 Wang; Pong-Sheng System and process for delivering digital data on demand
EP0939928B1 (en) * 1996-11-06 2003-08-20 Motorola, Inc. A method for determining the number of accesses granted during wcl and apparatus
US6567839B1 (en) * 1997-10-23 2003-05-20 International Business Machines Corporation Thread switch control in a multithreaded processor system
TW511034B (en) * 1998-11-09 2002-11-21 Intel Corp Scheduling requests in a system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5809261A (en) * 1995-11-20 1998-09-15 Advanced Micro Devices, Inc. System and method for transferring data streams simultaneously on multiple buses in a computer system
US5812844A (en) * 1995-12-07 1998-09-22 Microsoft Corporation Method and system for scheduling the execution of threads using optional time-specific scheduling constraints
EP0798638A2 (en) * 1996-03-28 1997-10-01 Hitachi, Ltd. Periodic process scheduling method
EP0817041A2 (en) * 1996-07-01 1998-01-07 Sun Microsystems, Inc. Method for reserving resources

Also Published As

Publication number Publication date
GB2358939B (en) 2003-07-02
JP2010044784A (en) 2010-02-25
HK1036860A1 (en) 2002-01-18
JP2002529850A (en) 2002-09-10
JP2011044165A (en) 2011-03-03
WO2000028418A1 (en) 2000-05-18
GB0109904D0 (en) 2001-06-13
DE19983709B4 (en) 2007-02-22
TW511034B (en) 2002-11-21
AU5902299A (en) 2000-05-29
DE19983709T1 (en) 2002-02-14

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20110826