GB2357912A

GB2357912A - DC-DC converter

Info

Publication number: GB2357912A
Application number: GB9930723A
Authority: GB
Inventors: Jim H Liang
Original assignee: Skynet Electronic Co Ltd
Current assignee: Skynet Electronic Co Ltd
Priority date: 1999-12-29
Filing date: 1999-12-29
Publication date: 2001-07-04
Also published as: GB9930723D0; GB2357912A8

Abstract

A DC-DC converter includes a zero-voltage switching control circuit ski which drives an output voltage filter capacitor C2 to partially feed back storage energy to an input side thereof by means of the operation of a transformer T1, and provides a complementary driving signal to switches Q1, Q2 in the converter when the switches reaching a zero-voltage switching control condition, so as to control turned-off or turn-on time of the switches, enabling the switches to repeat the switching operation at zero-voltage again and again. Further aspects relate to switching DC-DC converters having an input or output inductor (L1, Figs 11 and 13).

Description

2357912 EXCHANGING CONVERTER WITH ZERO-VOLTAGE SWITCHING CONTROL FUNCTION

The present invention relates to an exchanging converter with zero potential switching control function, and more particularly to such a converter, which drives every switch to achieve a switching operation at a zero-voltage status, so as to effectively eliminate power loss due to a high frequency switching operation.

In recent years, semiconductor fabrication technology has been fast developed, and semiconductor elements are made more and more smaller. This development trend in semiconductor drives electronic product manufacturers to create and design thinner, lighter and shorter products. However, in conventional hard type exchanging converters, a power switch is operated under a high frequency environment. This operation consumes much power, and produces much heat. In order to prevent damage due to heat, heat sink, fan, and suitable cooling means must be installed to carry heat from the converter. Further, these conventional hard typeswitching converters are expensive, and wear quickly with use. Because of the aforesaid numerous drawbacks, conventional hard type switching converters cannot be made as small as desired.

Since 1980, following the development of microcomputer, "smallsize" has become more and more important in the fabrication of electronic products. In order to meet this requirement, following, converters are developed:

(I)Flyback Converter: A flyback converter, as shown in Figure 1, comprises an input voltage filter capacitor Cl connected between two opposite ends of an input power source Vi, to provide a stable input voltage to a posterior 1 converter. The posterior converter comprises a transformer. The transformer comprises a primary winding L and a secondary winding i p Ls. The primary winding LP is connected to a switching element S,, formine a series loop at two opposite sides of the filter capacitor C,. The secondary winding L, is connected to a diode D forming a series loop at two opposite sides of a filter capacitor C2. Modulated high frequency from the switching element S, is smoothened through the posterior converter, so that the transformer provides a DC output voltage Voto the load. In this flyback converter, when the switching, element S, is on, input power source Vi, charges the primary winding LP, enabling energy to be stored therein. At this time, the polarity of the primary winding L is reversed to the secondary winding L, and the p diode D, is biased reversely, and therefore the output voltage filter capacitor C2 provides the load with the necessary energy. When:he 1: switching element S, is off, the magnetic flux at the transformer starts to contract, and the voltage polarity of the second winding L, is reversed to produce an induced current, thereby causing the diode D, to be electrically connected. When the diode D, is electrically connected, it charges the filter capacitor C2, enabling electricity to be Outputted to the load. Because a high voltage exists in the switching element S, when the switching element S, is off, a potential eneigy (CV212) is accumulated in its parasitic capacitance. This potential energy (CV212) is changed into heat energy at the moment lhe switching element S, is switched off. Therefore, the switching element produces high heat under a high frequency switching environment, and wears quickly with use. U.S. Patent Number 5,057,986 disclose a converter, which eliminates the aforesaid problem. According to this desia,n, as shown in Figure 2, another switching element S, and capacitor Cp are added to the primary circuit, so that the resonance formed at the parasitic capacitance of the inductance Lp, capacitor CP and switching elements S1;S2 Of the converter is utilized to achieve a 2 zero-voltac,e control scheme. However, because this zero-voltage control scheme provides the necessary energy for zero-voltage control by means of the inductor Lp, zero-voltage control becomes more difficult to achieve when the load is high. U.S. Patent Number 5,402,329 discloses another design, in which, as shown in Figure 3, a small inductance L, is installed in the converter to provide the necessary energy for zero- voltage control. This inductance can be an externally added inductance, or a leakage inductance of the transformer itself. This design eliminates the drawback of the disclosure of U.S. Patent Number 5,057,986, however because the zero-voltage control of this design relays much on the stray capacitance and leakage inductance of the circuit, it is difficult to manage the specification of design when designing and fabricating this structure of converter.

(2)Boost Converter:

A boost converter, as shown in Figure 4, is used to improve power factor correction. Because power factor correction runs under a high voltage environment, a voltage about 40OV exists when the switching element S, is switched off, and accumulated high electric energy will changed into heat energy at the switching element S] at the moment the switching element S, is switched on, causing the service life of the switchina element S, to be shortened. In 1992 Lee Yuart-Tse et al disclosed another design of converter, in which, as shown in FIG. 5, an auxiliary switch S2, an inducto.r L2 and a diode D2 are added to the circuit shown in FIG. 4. When operated, the auxiliary switch S, is transiently turned on and maintained electrically connected until the volta e at the switching element S, is discharged, and the switchina 9 element is S, is turned on to complete zero-voltage switching control when reached the status of zero-voltage. This design greatly increases the cost. Because of high cost, this design is not popularly accepted. FIG. 6 shows another design according to U.S. Patent Number 5,402,329. This design simply reduces discharge loss at the 3 switching element S, due to deposit charge at the rectifier diode D]. However, because the switching element S, is of hard type switching mode, power loss under a high frequency switching operation is,till significant.

(3)Buck Converter:

A buck converter, as shown in FIG. 7, is designed for use under a ow voltage high current condition. This design biases the reduction of turnon power loss at the switching element S, and the rectifier diode D,, however it neglects switching loss, and no application example of this design has been disclosed. FIG. 8 shows another design of bijck converter, in which power MOSFET transistors Q, and Q2 are used as substitutes for the switching element S, and the rectifier diode 0,. Because these two transistors Q, and Q2 adopt complementiry switching, the advantage of low impedance of these two transistors Q] and Q2 is used to reduce turn-on loss. However, because these two transistors Q, and Q2 are of hard switching mode, a high power loss during switching of the switching element is inevitable when used i,'1 a high voltage condition.

The present invention has been accomplished to provide an exchanging converter with a zero-voltage switching control functi)n, which eliminates the aforesaid drawbacks. According to the present invention, the exchanging converter comprises a zero-voltage switching 1 control circuit. The zero-voltage switching control circuit drives an output voltage filter capacitor to partially feed back storage enera U to an input side thereof by means of the operation of a transformer (or storage 1 inductor), and provides a complementary driving signal to switches in t e exchanging converter when the switches reaching a zero- volta,,e switching control condition, so as to control turned-off or turn- on time of the switches, enabling the switches to repeat the switching operation at 1! zero-voltage again and again.

4 The prior art (Figs 1 to 8) and the invention (Figs 9 to 14) will now be described further by way of example with reference to the accompanying drawings in which:-

FIG. 1 illustrates the basic architecture of a conventional flyback converter.

FIG. 2 illustrates the basic architecture of a flyback converter according to U.S. Patent Number 5,057,986.

FIG. 3 illustrates the basic architecture of a flyback converter according to U.S. Patent Number 5,402,329.

FIG. 4 illustrates the basic architecture of a conventional boost converter.

FIG. 5 illustrates the basic architecture of a switching type boost converter according to the prior art.

FIG. 6 illustrates the basic architecture of another switching type boost converter according to the prior art.

FIG. 7 illustrates the basic architecture of a conventional buck converter.

FIG. 8 illustrates the basic architecture of a low turn-on loss type buck converter according to the prior art.

FIG. 9 illustrates the circuit architecture of an exchanging converter according to one embodiment of the present invention.

FIG. 10 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 9.

FIG. 11 illustrates the circuit architecture of an - exchanging C converter according to an alternate form of the present invention.

FIG. 12 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 11.

FIG. 13 illustrates the circuit architecture of an exchanging converter according to another alternate form of the present invention.

FIG. 14 illustrates voltage or current waveform of every major component part of the circuit shown in FIG. 13.

The present invention uses a zero-voltage switching control circuit SKI to control a power converter, enabling an output voltage filter i capacitor to partially feed back storage energy to an input side thereof by means of the operation of a transformer (or storage inductor), an to provide a complementary driving signal to switches in the exchanging converter when the switches reaching a zero-voltaee switching con rol condition, so as to control turned-off or turn-on time of the switches, enabling the switches to repeat the switching operation at zero- voltige aaain and again. The zero-voltage switching control circuit SK, regulates its pulse width by means of detecting the output voltage of the exchanging converter. The switches can be power MOSFET having a respective body diode.

FIG. 9 shows a circuit design of the present invention used irl a flyback converter. The circuit comprises an input voltage filter capacitor Cl bridged the two opposite ends of input power source V,, to provide a stable input voltage to a posterior converter. The posterior converter comprises a transformer T1 for storing and releasing electric energy. The transformer TI comprises a primary winding L and a p secondary winding L, The inductance of the primary winding L nd p the secondary winding ip are i, and the ratio of number of turns betw( en the primary winding L and the secondary winding ip is N:1. 71he p primary winding LP is connected in series to a primary power switch 91, forming a series loop bridged the two opposite ends of the filter capaci, or Cl. The secondary winding L, forms with a secondary power switch Q2 a series loop bridged the two opposite ends of an output voltage filter capacitor C2. The output voltage filter capacitor C, smoothens the high frequency switching waveform modulated by the switches Q, and 0 2, SO as to provide a stable DC output voltage VO to the load bridging lhe output ends.

During operation, the voltage or current waveform of every ma. or 1 component part of the circuit is shown in FIG. 10. As illustrated, when t=tl, the control circuit SKI outputs a forward pulse wave driving voltage 6 VG,I. to the gate of the primary power switch Q,, causing the primary power switch Q, to be turned on, and at this time, the input voltage Vi, is almost fully added to the primary winding LP if the impedance of the passage is neglected. Therefore, a charging current ip passes through the primary winding LP. and the value of the charging current ip is subject to the following equation (l):

(t) (t.) + V- (t - t,) (1) LP in which, ip(tl) is the initial charging value; ViJLP is the charging slope. At this stage, the voltage induced by the secondary winding L, is a reversed bias voltage to the body diode Db of the secondary power switch Q2, and the passage at the secondary power switch Q2 is turned off, therefore 4=0.

When t=t2, the control circuit SKI changes the forward pulse wave driving voltage VGs, to zero potential, causing the primary power switch Q, to be turned off, and at this time, the charting current ip is turn'ed off, and the magnetic flux established by the charting current ip at the transformer T1 starts to contract, causing the induced current i. to pass from the secondary winding L, to the diode Db to charge the filter capacitor C2. The value of the induced current i,, when forward voltage drop of the diode Di, is not considered, is subject to the following equation (2):

i, (t) = i, (t,)x N - L2 (t - t,) (2) LS in which, ip(t2)xN is the initial discharging value of the induced current i,, -V0,1L, is its discharging slope. In this embodiment, when the body diode Db is turned on by the induced current i,, the voltage VGS2 between the drain and source of the secondary power switch 02 is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the body diode Db. Therefore, the period where the body diode Db is maintained turned on is the time for the 7 secondary power switch Q2 to perform a zero-voltage switching operati n, and 13 can be any time spot in this period.

When t=t3, the control circuit SKI outputs a forward pulse wave VGS2 to the gate of the secondary power switch Q2, causing -he secondary power switch Q2 to be turned on, and at this time, the impedance at the secondary power switch Q2 is lower than the body dicde Db, therefore current is mainly shunted from the body diode Db, to i he passage at the secondary power switch Q2, and when the energy is completely discharged from the secondary winding L, i.e. when i.=O, ihe passage of the secondary power switch Q2 is maintained turned on, and the voltage passes from the filter capacitor C2 through the secondary power switch Q2 to charge the secondary winding L, of the transformer T,, causina the current value of the current is to be changed to negative val, e. however its charging slope is still maintained at -VOILs.

When the secondary winding L, obtains certain energy due to charging operation of the capacitor C2, i.e., when t=t4, the control circuit SKI changes the driving voltage VGs, to zero potential, causina t'le secondary power switch Q, to be turned off, and at this time, the curreni i, is turned off, and the magnetic flux established by the current is at tie transformer T, starts to contract, causing the induced current ip to pass from the primary winding L to the diode D and to charge the filt r C. p a capacitor C,. The value of the current ip, when forward voltage drop f the diode Da is not considered, is subject to the following equation (3):

(4 ip (t) = 'S + (t tJ (3) N LP in which, i,(14)1N is the initial discharging value; VJLP is the charg slope. In this embodiment, when the body diode D,, is turned on, tl e 1 voltage VDs, between the drain and source of the primary power switch is approximately at the zero potential status, and this zero potential stati js is maintained unchanged until zero current at the body diode D. Therefore, the period where the body diode D, is maintained turned on s 8 the time for the primary power switch Q, to perform a zero-voltage switching operation, and 1.5 can be any time spot in this period.

When t=ts, the control circuit SKI outputs a forward pulse wave VGs, to the gate of the primary power switch Q,, causing the primary power switch Q, to be turned on, and at this time, the passage impedance at the primary power switch Q, is lower than the body diode D, therefore current is mainly shunted from the body diode D, to the passage at the primary power switch Q,, and when the energy is completely discharged from the primary winding LP. i.e. when ip=0. the passage of the primary power switch Q, is maintained turned on, and the voltage passes from the filter capacitor Cl through the primary power switch 01 to charge the primary winding LP of the transformer TI, so as to store energy in the transformer TI, and at this stage, the slope of the charging current ip is still maintained at Vi,,ILP. Therefore, by means of controlling the output time sequence of the output pulse wave VGS2 and the output pulse wave VGS], the control circuit SKI drives the switches 01 and Q2 to be repeatedly turned on at zero-voltage again and gain to effectively reduce the switches Q, and Q2 from power loss during a high frequency switching operation.

FIG. 11 shows a circuit design of the present invention used in a boost converter. The circuit comprises an input voltage filter capacitor C, bridged the two opposite ends of input power source Vi, a storage inductor L, and a charging power switch Q, connected in series and bridged the two opposite ends of the filter capacitor Cl, a discharging power switch Q2 connected in series to the charging power switch 01 and forming with the charging power switch Q, a series loop bridged the two opposite ends of an output voltage filter capacitor C2. The drain of the charging power switch Q, is connected to the source of the discharging power switch Q2, and its source is connected to the negative terminal of the capacitor C2, so that the filter capacitor C, is capable of providing a stable DC output voltage VO to the load at its output end.

9 During operation, the voltage or current waveform of every mjor 1 component part of the circuit of FIG. 11 is shown in FIG. 12. As illustrated, when t=t,, the control circuit SKI outputs a forward pulse wave driving voltage VGS] to the gate of the power switch Q,, causing the power switch Q, to be turned on, and at this time, the passage of the power switch Q2 is off, and the input voltage Vi,, is almost fully added to the storage inductor L,, therefore a charging current i, passes through the storage inductor L,, and the value of the charging current il is subjeci to the following equation (4):

il il (ti + (t - t, (4) L1 in which, il(I1) is the initial charging value; Vi,,1L, is the charging slope. At this stage, the input voltage Vi,, is lower than the output voltage VO, he i voltage to the body diode Db of the power switch Q2 is a reverse bias voltage, and the passage of the power switch Q, is turned off, rid therefore il= '3, and i2=0.

When t=t2, the control circuit SKI changes the forward pulse wc, ve driving voltage VGs, to zero potential, causing the power switch Q] to be turned off. At this time, the induction current i, must be maintained in continuation, and the passage of the power switch Q2 is maintained ( ff, :i the direction of the body diode Db provides a path for the induct'on current il to charge the filter capacitor C, and the voltage at the stor, ge inductor L,, if forward voltage drop of the diode D,, is not considered. is i equal to (V,-ViJ when the body diode Db is turned on, and the value of the induced current is is subject to the following equation (5):

V (t tl-......................... (5) il(t)= '1(t2)- V L1 in which, il(t2) is the initial discharging value of the induced current i, (V,,-ViJIL, is its discharging slope. In this embodiment, when the bcdy diode Db is turned on by the induced current i,, the voltage VGS2 between the drain and source of the power switch Q2 is approximately at the z( ro potential status, and this zero potential status is maintained unchanged until zero current at the body diode Db. Therefore, the period where the body diode Db is maintained turned on is the time for the power switch 0, to perform a zero-voltage switching operation, and '3 can be any time spot in this period.

When t=t3, the control circuit SKI outputs a forward pulse wave VGS2 to the gate of the secondary power switch Q2, causing the power switch Q2 to be turned on, and at this time, the passage impedance at the secondary power switch Q2 is lower than the body diode Db, therefore current is mainly shunted from the body diode Db, to the passage at the power switch Q2, and when the energy is completely discharged from the storage inductor L,, i.e. when il=O, the passage of the power switch Q2 is maintained turned on, and the voltage passes from the filter capacitor C, through the power switch Q2 to charge the storage inductor L] and the capacitor C,, causing the current value of the current is to be changed to negative value, however its charging s.lope is still maintained at -(V, ,ViJIL 1 When the storage inductor L, obtains certain energy due to charging operation of the capacitor C2, i.e., when t=t4, the control circuit SKI changes the driving voltage VGS2 to zero potential, causing the power switch Q2 to be turned off, and at this time, the current il is maintained in continuation, and the current il passes from the storage indudtor L, to the diode Da and to charge the filter capacitor C,. The value of the current i,, when forward voltage drop of the diode D, is not considered, is subject to the following equation (6):

(t -0 (6) L1 in which, i,(t.) is the initial discharging value of the il; Vi,/L1 is the charging slope. In this embodiment, when the body diode D,, is turned on by the current il, the voltage VDs, between the drain and source of the power switch Q, is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the body diode D,,. Therefore, the period where the body diode D. is maintained turned on is the time for the primary power switch Q, to perform a zero-voltage switching operation, and t5can be any time spo in this period.

When t=t the control circuit SKI outputs a forward pulse wave 3 V6s, to the gate of the power switch Q,, causing the power switch Q] to be turned on, and at this time, the passage impedance at the power switch 0 is lower than the body diode D,,, therefore current is mainly shunted frDM the body diode D, to the passage at the power switch Q,, and when:he energy is completely discharged from the storage inductor L,, i.e. when i, =O, the passage of the power switch Q, is maintained turned on, causing the voltage to pass from the filter capacitor C, through the power swi - ch Q, to charge the storage inductor L,, and the slope is still maintained at Vi,IL 1. Therefore, by means of controlling the output time sequence of the output pulse wave VGS2 and the output pulse wave VGsI, the control circuit SKI drives the switches Q, and Q2 to be repeatedly turned on at zero-voltage again and again to effectively reduce the switches Q, and 0 CY 2 from power loss during a high frequency switching operation.

FIG. 13 shows a circuit design of the present invention used in a buck converter. The circuit comprises an input voltage filter capaci-or C, bridged the two opposite ends of input power source V, a charging n5 power switch Q, and a discharging power switch Q2 connected in seres and bridged the two opposite ends of the filter capacitor C,, a storacye inductor L, forming with the discharging power switch Q, a series loop bridged the two opposite ends of an output voltage filter capacitor C 2. The storage inductor L, and filter capacitor C, form a low-pass filter to smoothen the hiah frequency waveform outputted from the switches 9 and Q2, so as to provide a stable DC output voltage VO to the load at ts output end.

During operation, the voltage or current waveform of every major 12 component part of the circuit of FIG. 13 is shown in FIG. 14. As illustrated, when t=tl, the control circuit SKI outputs a forward pulse wave driving voltage VGs, to the gate of the power switch Q,, causing the power switch Q, to be turned on, and at this time, the passage of the power switch Q2 is off, and the input voltage Vi,, is greater than the output voltage Vi, therefore a voltage drop -(Vi,, -VO) exists in the storage inductor L,, which voltage drop forms a charging current i, at the storage inductor L,, and the value of the charging current i, is subject to the following equation (7):

i,-(t)=i,(t.)+ v -, (t-tl) (7) L1 in which, i2 (t dis the initial charging value; (Vi,,-V0)1LI is the charging slope. At this stage, current il= i2, and i3=0.

When t=t7 , the control circuit SKI changes the forward pulse wave driving voltage VGs, to zero potential, causing the power switch Q] to be turned off. At this time, the induction current i2 must be maintained in continuation, and the passage of the power switch Q2 is Maintained off, the direction of the body diode Db provides a path for the induction current i2 to charge the filter capacitor C2, and the voltage at the storage inductor L, if forward voltage drop of the diode Db is not considered, is equal to VO when the body diode Db is turned on, and the value of the induced current i2 is subject to the followina equation (8):

........................ (8) L1 in which, i2(t2) is the initial discharging value of the current i,, - V,,1L, is its discharging slope. In this embodiment, when the body diode Db is turned on by the current i, the voltage VGS2 between the drain and source of the power switch Q2 is approximately at the zero potential status, and this zero potential status is maintained unchanged until zero current at the body diode D,, Therefore, the period where the body diode Db is maintained turned on is the time for the power switch Q2 to perform a 13 zero-voltage switching operation, and 13 can be any time spot in lhis period.

When t=t the control circuit SKI outputs a forward pul 3 se wave VGs, to the gate of the power switch Q2, causing the power switch Q2 to be turned on, and at this time, the passage impedance at the power switch 0 2 is lower than the body diode b,,, therefore current is mainly shunted fr:)m the body diode Db, to the passage at the power switch Q2, and when:he energy is completely discharged from the storage inductor L,, i.e. when i,=O, the passage of the power switch Q2 is maintained turned on, causing the voltage to pass from the filter capacitor C, through the power swi eh Q2 to charge the storage inductor L,, causing the current i, to be changed to negative status, and the slope is still maintained at - VOILI.

When the storage inductor L, obtains certain energy due to charging operation of the capacitor C,, i.e., when t=t4, the control circiit SK, changes the driving voltage VGS2 to zero potential, causing the pom er switch Q2 to be turned off, and at this time, the current i2 is maintained in continuation, and the current i2 passes from the storage inductor L] to the diode Da and to charge the filter capacitor C,. The value of the current i, 5:

when forward voltage drop of the diode D, is not considered, is subject'to the following equation (9):

4,Z> i2 (t) = '2 (t4) + (t - t4) (9) L] in which, '204) is the initial discharging value of the inductance, - (VilV0)1LI is its discharging slope. In this embodiment, when the body diode a,b is turned on by the current i2, the voltage VDs, between the drain arld source of the power switch Q, is approximately at the zero potentJal status, and this zero potential status is maintained unchanged until zero current at the body diode D, Therefore, the period where the boly diode D. is maintained turned on is the time for the power switch Q, to perform a zero-voltage switching operation, and 13 can be any time spot in this period.

14 When t=t3, the control circuit SKI outputs a forward pulse wave VGs, to the gate of the power switch Q,, causing the power switch Q, to be turned on, and at this time, the passage impedance at the power switch 01 is lower than the body diode D,,, therefore current is mainly shunted from the body diode D, to the passage at the power switch 01, and when the energy is completely discharged from the storage inductor L], i.e. when i2=0, the passage of the power switch Q, is maintained turned on, causing the voltage to pass from the filter capacitor Cl through the power switch Qi to charge the storage inductor L,, and the capacitorC2, and the slope is still maintained at (Vin V0)1L 1.

Thus, by means of controlling the output time sequence of the output pulsewave VGs, and the output pulse waveVGS2, the control circuit SKI drives the switches Q, and Q, to be repeatedly turned on at zerovoltage again and again to effectively reduce the switches 01 and Q2 from power loss during a high frequency switching operation.

Further, the control circuit SKI can be designed to operate at a rated or frequency converting mode. When at the rated mode, the inductance of the transformer (or storage capacitor) must be sufficient to satisfy the requirement for zero-voltage control within the range of full load, so that the power switches Q, and Q, can be turned on at any time under zerovoltage. Therefore, the switching frequency will be lower when the load becomes greater, and vice versa.

In conclusion, the present invention uses a control circuit SKI havina a zero-voltage control function to drive power switch means of a flyback converter, boost converter or buck converter to achieve a switching operation under zero-voltage, so that power loss under a high frequency operation is eliminated. Because the design greatly reduces accumulated heat at the switch means, the size of the heat sink can be greatly reduced. Therefore, the present invention is practical for use in all electronic products of small design.

It is to be understood that the drawings are designed for purposes of illustration only, and are not intended for use as a definition of the limits and scope of the invention disclosed.

16

Claims

I.An exchanging converter comprising: an input voltage filter capacitor bridged two opposite ends of an input power source to provide a stable input voltage; a transformer for storing and releasing electric energy, said transformer comprising a primary winding and a secondary winding; a primary power switch forming with said primary winding a series loop bridged two opposite ends of said input voltage filter capacitor; an output voltage filter capacitor; a second power voltage forming with said secondary winding a series loop bridged two opposite ends of said output voltage filter capacitor for enabling said output voltage filter capacitor to smoothen high frequency switching waveform from said power switches, and to provide a stable DC output voltage to a load bridged two opposite terminals at an output end thereof; and a zero-voltage switching control circuit for driving said output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of said transformer, and providing respectively a complementary driving signal to said primary power switch and said secondary power switch to control turn-off time of said primary power switch and said secondary power switch when said primary power switch and said secondary power switch reaching a zero-voltage switching, 0 Z control condition, so as to drive said primary power switch and said secondary power switch to repeat the switching operation at zero-voltage again and again.
2.The exchanging converter of claim 1 wherein said zero-voltage switching, control circuit regulates the pulse width thereof by means of detecting the output voltage of the exchanging converter.
3.The exchanging converter of claim 1 or 2 wherein said primary power switch and said secondary power switch are power MOSFET, each 17 comprising a body diode.
4.The exchanging converter of claim 3 wherein said primir power switch has drain thereof connected to said primary winding, soutce thereof connected to negative end of said in ut voltage filter capacitor; p said secondary power switch has drain thereof connected to positive end of said output voltage filter capacitor, and source thereof connected to said secondary winding; said zero-voitaee switching control circuit provides said complementary driving signal to the drain of said prim;ry power switch and said secondary power switch.
5.An exchanging converter comprising:

an input voltage filter capacitor bridged two opposite ends of an input power source to provide a stable input voltage; a charging power switch; a storage inductor forming with said charging power switct a series loop bridged two opposite ends of said input voltage fiRer capacitor; 1 an output voltage filter capacitor; a discharging power switch forming with said charging power switch a series loop bridged two opposite ends of said output voltaae filter capacitor for enabling said output voltage filter ca acitor to provide p a stable DC output voltage to a load bridging two opposite terminals of an output end thereof; and a zero-voltage switching control circuit for driving said outpul voltage filter capacitor to partially feed back storage energy to an input side thereof by means of said storage inductor, and providing respectively a complementary driving signal to said charging power switch and said discharging power switch to control turn-off time of said charging poler switch and said discharging power switch when said charging pov-er switch and said discharging reaching a zero-voltage switching control condition, so as to drive said charging power switch and said discharging power switch to repeat the switching operation at zero-voltage again and again.
6.The exchanging converter of claim 5 wherein said zero-voltage switching control circuit regulates the pulse width thereof by means of detecting the output voltage of the exchanging converter.
7.The exchanging converter of claim 5 or 6 wherein said charging power switch and said discharging power switch are power MOSFET, each comprising a body diode.
8.The exchanging converter of claim 7 wherein said charging power switch has drain thereof connected to said storage inductor, source thereof connected to negative end of said input voltage filter capacitor; said discharging power switch has drain thereof connected to positive end of said output voltage filter capacitor, and source thereof connected to said storage inductor; said zero-voltage switching control circuit provides said complementary driving signal to the drain of said charging power switch and said discharging power switch.
9. An exchanging converter comprising:

an input voltage filter capacitor bridging two opposite ends of an input power source to provide a stable input voltage; a charging power switch; a discharging power switch forming with said charging power switch a series loop bridging two opposite ends of said input voltage filter capacitor; an output voltage filter capacitor; a storage inductor, said storage inductor forming with said discharging power switch a series loop bridging two opposite ends of said output voltage filter capacitor, and forming with said output voltage filter capacitor a low-pass filter for providing a stable DC output voltage to a load bridging two opposite terminals of an output end thereof; and a zero-voltage switching control circuit for driving said output voltage filter capacitor to partially feed back storage energy to an input side thereof by means of said storage inductor, and providing respectively 19 a complementary driving signal to said charging power switch and said discharging power switch to control turn-off time of said charging power switch and said discharging power switch when said charging power switch and said discharging reaching a zero-voltage switching con.lrol condition, so as to drive said charging power switch and said discharging power switch to repeat the switching operation at zero-voltage again and again.
1O.The exchanging converter of claim 9 wherein said zero-voltage switching control circuit regulates the pulse width thereof by means of detecting the output voltage of the exchanging converter.
II.The exchanging converter of claim 9 or 10 wherein said charging power switch and said discharging power switch are power MOSFET, each comprising a body dio.de.
12.The exchanging converter of claim 11 wherein said charging power switch has drain thereof connected to positive end of said input voltage filter capacitor, source thereof connected to said storage inducior; said discharging power switch has drain thereof connected to said storage inductor, and source thereof connected to negative end of said oufflut voltage filter capacitor; said; said zero-voltage switching control circuit provides said complementary driving signal to the drain of said charg ng power switch and said discharging power switch.
13. An exchanging converter substantially as herein described with reference to and as illustrated in Figs. 9 to 14 of the accompanying drawings.