GB2350953A

GB2350953A - Harmonic reduction in a receiver using a variable mark-to-space ratio in a demodulator oscillator

Info

Publication number: GB2350953A
Application number: GB0012939A
Authority: GB
Inventors: Peter Edward Chadwick
Original assignee: Mitel Semiconductor Ltd
Current assignee: Microsemi Semiconductor Ltd
Priority date: 1999-05-27
Filing date: 2000-05-26
Publication date: 2000-12-13
Anticipated expiration: 2020-05-26
Also published as: GB0012939D0; GB9912439D0; GB2350953B

Abstract

A receiver 20 includes two downconversion stages 23 and 24, 25 which are provided with local oscillator signals originating from a single local oscillator 27. A frequency divider 28 receives the signal provided by the local oscillator 27, and provides to the mixers 24, 25 a signal having a frequency equal to an integer divisor of the frequency of the local oscillator signal provided to the mixer 23. The mark-to-space ratio of the signal provided by the frequency divider 28 is arranged to adopt a value which minimises the values of either the (N+1) or the (N-1) harmonic, dependent on whether the receiver 29 is a low or high side injection receiver respectively, where N is the divisor ratio of the frequency divider.

Description

2350953 A RECEIVER This invention relates to a receiver which may, for

example, be a radio receiver or an optical receiver. Direct conversion receivers are now commonly used to receive data or analogue signals 10 transmitted by radio. Direct conversion receivers are advantageous in that they are of relatively simple architecture and are readily susceptible to implementation on integrated circuits. They can thus be relatively inexpensive to manufacture. The conventional direct conversion receiver architecture is shown schematically in Figure 1. 15 Referring to Figure 1, a receiver 10 comprises generally an antenna 11, in-phase and quadrature mixers 12 and 13, a local oscillator 14 and a quadrature network 15. The local oscillator is controlled to provide an output signal at a frequency close to the frequency of the carrier signal. The quadrature network 15 receives the local oscillator signal and provides quadrature versions of it to the mixers 12 and 13. The mixers 12 and 13 thus 20 provide in-phase and quadrature baseband signals on outputs 16 and 17 respectively, which baseband signals are subsequently processed by signal processing circuitry (not shown). Such a receiver has several drawbacks. Firstly, leakage of the local oscillator signal to the RF signal input of the mixers 12 and 13 can cause DC offset problems in the mixers, and 25 may cause radiation of the local oscillator signal from the antenna 11. Also, conversion of the phase noise of the local oscillator signal to baseband causes reduced receiver sensitivity. Further drawbacks exist in relatively high power consumption, which is especially undesirable where the receiver is battery powered, and in high noise figures which are due to noise in local oscillator drive circuits and which become worse as the 30 operating frequency is increased.

Double conversion receivers avoid many of these problems but do suffer from spunous signal problems not experienced by direct conversion receivers. A double conversion receiver tends to be more expensive than a direct conversion receiver because it requires 2 more circuit components. Local oscillator control and drive circuits in particular are relatively expensive and a double conversion receiver requires two such circuits whereas a direct conversion receiver requires only one. A double conversion receiver also often requires more off-chip filtering, which is relatively expensive.

In accordance with the present invention, there is provided a receiver comprising a first mixer arranged to mix a received signal with a first signal provided by a first signal source to provide an intermediate frequency signal on an output of the first mixer, second and third mixers arranged to mix the intermediate frequency signal with in- phase and quadrature versions respectively of a second signal provided by a second signal source, to provide in-phase and quadrature baseband signals, the frequency of the first signal being an integer multiple of the frequency of the second signal, in which the mark-to-space ratio of the second signal is arranged to adopt such a value that the amplitude of harmonic signals at the frequencies of signals of interest of the received signal is substantially minimised.

Since the frequencies of the signals of interest of the received signals are known, the mark-to- space ratio of the second signal is able to be set during the design stage, to reduce the need for post manufacture receiver optimisation.

The mark-to-space ratio of the second signal may be non-unity. The harmonic signals may be the (N+I) or the (M) harmonic signals of the second signal, dependent on whether the receiver is a low or a high side injection receiver respectively, where N is the ratio of the higher to the lower of the frequencies of the first and second signals.

The second signal source is preferably a frequency divider connected to receive the first signal from the first signal source. The receiver may further comprise a filter connected to the input of the first mixer, the filter having characteristics such as to attenuate image frequency components of the received signal. Alternatively, the first mixer may be an image reject mixer.

3 The receiver may further comprise a sum frequency filter connected between the output of the first mixer and signal inputs of the second and third mixers. The first signal source may be a frequency synthesiser.

Embodiments of the present invention will now be described with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram of a prior art double conversion receiver; and

Figures 2 to 4 are circuit diagrams of receivers in accordance with this invention. In Figure 2, a receiver 20 in accordance with the invention comprises generally an antenna 21, a band pass filter 22, an IF mixer 23, 1 and Q baseband mixers 24 and 25, a quadrature network 26, a local oscillator 27 and a frequency divider 28. The local oscillator 27 forms 15 a first signal source which provides a first signal on a line 29 to an input of the IF mixer 23, and to an input of the frequency divider 28. The frequency divider 28 serves as a second signal source and provides a second signal on a line 30 to an input of the quadrature network 26, which provides the mixers 24 and 25 with quadrature versions of the second signal. The filter 22 serves to remove signals at the image frequencies of the receiving 20 frequencies and to apply the resulting filtered RF signal to a signal input of the IF mixer 23. The IF mixer 23 provides an IF signal, produced by mixing the first signal with the filtered RF signal, to inputs of both the in-phase and quadrature mixers 24 and 25. Baseband in-phase and quadrature signals are provided on outputs 31 and 32 respectively. 25 The frequency divider 28 is a divide- by-N divider. The receiver 20 further comprises selectivity determining and signal processing sections (not shown) connected to the in-phase and quadrature outputs 31 and 32. Either the N - I or the N + I harmonic of the second signal falls at the frequency of the 30 signals of interest of the received signals, depending respectively on whether high or low side injection is used. This causes a spurious signal at the frequency of the signals of interest having an amplitude which is dependent on the value of N, the mark-to-space ratio 4 of the second signal and the degree of coupling between critical sub- circuits, for example the degree of coupling between the filter 22 and the frequency divider 28. Since this spurious signal is correlated with the first signal, the spurious signal causes a dc offset at the output of the IF mixer 23. If, however, the receiver is mis-tuned, the spurious signal causes a beat note to be produced at baseband. This beat note may be used in a tuning correction feedback loop (not shown), or it may be ignored. No spurious signals are generated within the receiver other than those resulting from harmonics of the second signal.

Since there is a priori knowledge of the form of the signal, steps may be taken in the design of the receiver 20 to minimise the amplitude of the spurious harmonic signals at the frequencies of the signals of interest of the received signal. The frequency divider 28 Is designed or selected such that the mark-to-space ratio of the second signal is such that the amplitude of harmonic signals at the frequencies of the signals of interest is minimised.

Modification of the mark-to-space ratio of the second signal provides modification of the coefficients of the Fourier series which defines the spurious signal levels. The harmonic of interest (the harmonic which it is advantageous to minimise) is either the (N+I) or the (N-1) harmonic of the second signal, depending on whether low or high side injection respectively is used in the receiver. Once the harmonic has been identified, the mark-to-space ratio which gives the minimum amplitude of that harmonic, or as near to the minimum amplitude as can be achieved without imposing unreasonable restraints on the receiver design, is easily identified using techniques already known in the art. It will be appreciated that certain harmonics of a Fourier series have a minimum or near minimum amplitude when the mark-to-space ratio is unity.

Referring to Figure 3, a receiver 40 is shown, with reference numerals having been retained for like elements, comprising a direct digital frequency synthesiser 41 in place of the local oscillator and frequency divider arrangement of Figure 2. Direct digital frequency synthesisers are well known in the art. They are programmable to provide stable and consistent signals at any one of a large range of programmable frequencies, and often any one of a number of waveform profiles. In the receiver 40, the frequency synthesiser 41 is arranged to provide a first signal on an output 42 which is a signal of a frequency being an integer multiple of the second signals, quadrature and in-phase versions of which are provided on outputs 43 and 44 respectively. The second signals provided on the outputs 43 and 44 are identical in amplitude and frequency but are separated by 90' so that quadrature baseband signals are provided on the outputs 31 and 32. The digital frequency synthesiser 41 may be preferred to other types of local oscillator, especially crystal oscillators, where flexibility of frequency, electronic programming and/or high levels of stability are required.

The frequency synthesiser 41 may be preferred also because it removes the need for a frequency divider. In particular, the frequency synthesiser 41 includes a read only memory (ROM) which stores a sequence of samples which together make up the period of a waveform. The in-phase and quadrature versions of the second signals are obtained by reading samples from the ROM the same number of times in the period of the waveform. and at the same frequency but in such a way that the signals are in a quadrature phase relationship. The first signal is obtained by reading samples from the ROM such that the period of the waveform is cycled through N times more quickly than it is for the second signals. With such a frequency synthesiser 41, it may be advantageous to use values of N which are one of sixteen, thirty-two, sixty-four and one hundred and twenty-eight. However, a frequency synthesiser 41 and a frequency divider 28 may be used together to provide the first and second signals, as is shown in Figure 4.

Referring to Figure 4, a receiver 50 is shown including an image reject mixer 5 1, in place of the IF mixers 23 of the previous Figures, and a sum frequency filter 52 connected between the output of the mixer 51 and the signal input of the mixers 24 and 25. The use of the image reject mixer 51 allows the receiver 50 to be constructed without the use of an image frequency filter 22, potentially reducing cost.

The direct digital frequency synthesiser 41 produces a first signal on an output 29, from which the frequency divider 28 provides a second signal on an output 30.

The sum frequency filter 52 is arranged to have characteristics such as to attenuate the components of the IF signal at the frequency which is the sum of the frequency synthesiser output frequency and the RF input frequency. Without the inclusion of the sum frequency 6 filter 52, these sum frequency signals cause the voltage swing at the output of the mixer 51 to be double that of the required components of the IF signal. This would result in a degradation of the signal handling capability of the receiver 50. Inclusion of the sum frequency filter 52, therefore, provides a significant improvement in the signal handling capabilities of the receiver 50. Such a filter 52 may be incorporated in any of the embodiments of Figures 2 to 4.

Since no signal sources, i.e. either local oscillator 27 or frequency synthesiser 41, are at or near to the frequency of the received RF signal, oscillator radiation and offsets introduced by re-modulation of the local oscillator or frequency synthesiser signals are substantially avoided. Furthermore, the circuit architecture causes phase noise conversion to baseband to be substantially reduced, which leads to improved circuit sensitivity. The phase noise at the local oscillator input of the mixers 24 and 25 is a factor of 20 log N dB less than the phase noise at the oscillator input of the first mixer.

The number of mixers required by the circuit architecture is less than that required by most receivers, except, notably, direct conversion receivers. Therefore, the power consumption and noise contribution effects associated with such mixers are reduced.

The mixing process causes a frequency error in the frequency of the first signals to be reduced by a factor of N/(N+I). The phase noise and the effects of residual frequency modulation of the first signals are similarly reduced, as long as correlation exists between the noise in the signal provided by the IF mixer 23,51 and the noise provided by the baseband mixers 24,25. De-correlation will occur when there is a significant phase difference between the first and second signals. Such a phase difference is likely to arise only when the frequency divider 28 causes substantial signal delay.

Each of the Figures 2 to 4 embodiments is susceptible to implementation on integrated circuits. Most of the filters required are implemented on the same integrated circuit as the rest of the receiver.

7

Claims

1. A receiver comprising a first mixer arranged to mix a received signal with a first signal provided by a first signal source to provide an intermediate frequency signal on an output of the first mixer, second and third mixers arranged to mix the intermediate &equency signal with in-phase and quadrature versions respectively of a second signal provided by a second signal source, to provide in-phase and quadrature baseband signals, the frequency of the first signal being an integer multiple of the frequency of the second signal, in which the mark- to-space ratio of the second signal is arranged to adopt such a value that the amplitude of harmonic signals at the frequencies of signals of interest of the received signal 10 is substantially minimised.

2. A receiver according to claim 1, in which the mark-to-space ratio of the second signal is non-unity.

3. A receiver according to either preceding claim, in which the harmonic signals are the (N+1) or the (M) harmonic signals of the second signal, dependent on whether the receiver is a low or a high side injection receiver respectively, where N is the ratio of the higher to the lower of the frequencies of the first and second signals.

4. A receiver according to any preceding claim, in which the second signal source is a frequency divider connected to receive the first signal &om the first signal source.

5. A receiver according to any preceding claim, further comprising a filter connected to the input of the first mixer, the filter having characteristics such as to attenuate image frequency components of the received signal.

6. A receiver according to any of claims 1 to 4, in which the first mixer is an image reject mixer.

7. A receiver according to any preceding claim further comprising a sum frequency filter connected between the output of the first mixer and signal inputs of the second and third mixers.

8

8. A radio receiver according to any preceding claim, in which the first signal source is a frequency synthesiser.