GB2350702A

GB2350702A - BIOS backup unit

Info

Publication number: GB2350702A
Application number: GB9910036A
Authority: GB
Inventors: Johnson Lin
Original assignee: Giga Byte Technology Co Ltd
Current assignee: Giga Byte Technology Co Ltd
Priority date: 1999-05-01
Filing date: 1999-05-01
Publication date: 2000-12-06
Anticipated expiration: 2019-05-01
Also published as: GB9910036D0; FR2794544B3; DE29908201U1; FR2794544A3; GB2350702B

Abstract

A BIOS backup unit is provided on the mainframe and comprises the hardware of at least two BIOSs. In the event of one of the units being out of order due to misoperation, at least one of the other BIOSs will start to function as a backup unit. A BIOS selecting circuit and identification circuit are provided to allow reliable operation of the system. Preferably, said identification circuit is a logic circuit. Preferably, transistors are used as control elements in said selecting circuit.

Description

2350702 Basic Input & Output System Backup Unit on the Mainframe

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to basic input and output system (BIOS) backup unit on the mainframe wherein hardware of two BIOSs are provided on the mainframe. In the case when one of the two BIOSs is out of order owing to misoperation, the other normal BIOS will start to operate as a backup BIOS unit by automatically utilizing an inner logic circuit for error detecting so as to select one of the two BIOSs and drive it with the aid of transistors contained therein.

2. Description of the Prior Art

At present, most of the computer mainframe utilize flash BIOS.

Should the data stored in a BIOS be ruined by misoperation is impossible to be used again. In addition, BIOS may often automatically change data which have been already stored in it while the user is renewing or resetting his system to meet a new requirement. At this moment, if a sudden power outage or switch off occurs, the data stored in BIOS may be ruined too, as a result, the computer does not work any more.

In this situation, although the operator of Read Only Memory (ROM) may write again the data originally stored m BIOS, it often accompanies a hard work such as opening the computer case so that most of the users will rather send their computers to a repair workshop. Consequently, it is not only consuming time, but also increasing the maintenance cost and c) reducing operation efficiency of the computer.

1 In order to eliminate the inconvenience inherent to the conventional technique as mentioned above, the inventor of the present invention has put a bold face on this costly and time consuming research work and finally has succeeded in developing an innovated BIOS system of the 5 present invention.

It is an object of the present invention to provide BIOS backup unit on the mainframe wherein the backup urut may be employed to take over the operation of the main BIOS unit in the emergency with only a very little increased equipment cost but with reward of a very large improved operational efficiency and saving of maintenance cost.

To achieve this object, a BIOS backup unit is installed. In the case when one of the two BIOSs is out of order owing to for example, mlsoperation, the other normal one will start to operate by automatically utilizing an inner logic circuit for error identification so as to select one of the two BIOSs and drive it with the aid of transistors contained therein. As a result, an increased equipment cost is very little but improvement of operational efficiency and saving of maintenance cost is very significantBRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a fuller understanding of the invention and incorporated in and constitute a part of this specification, illustrate embodiment of the invention and together with the description serve to explain the principles of the invention, wherein:

Fig. 1 is the block diagram for the circuit of the present invention Fig. 2 is a partial circuit diagram of the present invention; 2 Fig. 3 is another partial circuit diagram of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT

Referring to Fig. 1, there are provided two BIOSs, namely, ABIOS and BBIOS both connected to chip system 1 on the mainframe with pins.

An identification circuit 2 mainly consists of a D type flip-flop, further with transistors Q, Q2 and resistances R5, R6, R7, R8 is for receiving signal for identification, and determines one of the two BIOSs to be usuable by the selecting circuit 3. In the case that one of the two BIOSs cannot be started as the user himself has carelessly flashed the revised data, the other BIOS may be decided to be set up through the flinction of the identification circuit 2 and the BIOS selecting circuit 3 so as to prevent lowering the operational efficiency of the apparatus.

A preferable embodiment of the present invention are shown in Figs.

2 and 3. As shown in these two drawings, there are two BIOSs, e.g. ABIOS and BBIOS connected each other with WP pins. Reference symbols are that "ABIOSCS2' or "BBIOSCS2' represents that it is employed under a low potential. In other words, ABIOS or BBIOS is 20. predetermined to start at a low potential, MEMR-or MEMW- represents that the system reads or writes control signals which are delivered from the chip system on the maifflame, whereas SA[0,171 or SI)[0,7] represents that the system bus is connected to the chip system on the mainframe for performing addressing and data transfer. In addition, if a subscript "-" is suffixed to a signal, it means this signal is effective at a low potential. The above mentioned PW2 is a power source connector. It should be understood that those symbols and subscripts concerning BIOS 3 as described above and the power source connector have been conventionally employed in the related arts and should not be considered as essential essence of the present invention.

The essential characteristics of the present invention rely on its layout that two BIOSs are employed, e.g. ABIOS and BBIOS, one terminal of the power source connector is connected to a reset terminal and then to PWROK (power source) terminal. PWROK terminal is connected to a logic IC U3A(74HW4), which has two output pins 74QM, 74QP at one of its terminal. By means of potential variation appears on 74QM, operation of ABIOS (turning on or ceasing) is controlled through the transistor Q, whereas operation of BBIOS is controlled by 74QP through the transistor Q2. In addition, ABIOS or BBIOS is fiu-ther controlled by variation of voltage on the output pins on 74QM or 74QP through presetting the logic IC U3A. There are provided CL(CLEAR) preset pin, CLK(CLOCK) pin, and PR(PRESET) pin, through general purpose output pins GP023, GP024 (provided by the chip system on the mainframe), the object of control for ABIOS or BBIOS cane be achieved.

The operational principle of the present invention will now be described hereinbelow:

1. When the apparatus of the present invention is connected to the power source, by presetting 74HC 741C, in this case, 74QP is at high potential, wi-Lile 74QM at low potential.

2. When the apparatus is turned on, PWROK terminal turns from low potential state to high potential state, whereas 74QP becomes low potential, and 74QM becomes high potential.

4 At this moment, if BIOSCS- is at low potential state (it is necessary to be such if the system is to reserve BIOS), then BBIOSCS- is in low potential; as a result, BBIOS operates and starts the system.

3. If the data in BIOS are revised, after shadowing BIOS data, the system is able to read state of GPIL A. If GPII is at low potential, GP024 sends a pulse signal, 74HC 741C change 74QP to high potential, 74QM to low potential.

In this situation, at next operation or resetting, the system is started by BBIOS as it is in a normal state.

B. If GPII is at high potential, then GP023 sends a pulse signal, 74HC 741C change 74QP to low voltage, 74QM to high voltage. In this situation, at next operation or resetting, the system is started by ABIOS (Because after starting or resetting, when PWROK changes its state from low potential to high potential, it changes the state of 74QP to high potential, and 74QM to low potential).

The reason why the system is not able to start with BBIOS. The operational principle will be described as follows:

In the case that the system is unable to start normally, and the system is turned on or resetted again. At this time PWROK changes from a low potential state to a high potential state, 74QP is at high potential, while 74QM is at low potential. If BIOSCS- is at low potential, then ABIOSCS is at high potential, as a result, the system needs another ABIOS to start.

Accordingly, if the system is unable to start successfully with the BIOS which is originally in use, then another BIOS is required to start the another BIOS, and at the same time identifying which one of the BIOSs is employed to start successfully with thereby preventing misusing a wrona, BIOS to start with at the next starting or resetting.

By means of the construction described above, when the user flashes 5 the newly revised BISO during a wrong operation which leads to destroying the Data stored in a BIOS in the system and unabling to start the apparatus, it is absolutely not necessary to stop the work and send the apparatus to a repair workshop. But instead of it, by starting the apparatus once more, the system can start another backup BIOS to make a normal operation through a logic circuit and a selecting circuit. Accordingly, it is clear that the apparatus of the present invention can surely eliminate the shortcoming inherent to the system consists of conventional apparatus thereby providing the user with a very convenient and reliable BIOS backup unit.

In addition, one of a plurality of BIOSs employed in the present invention are not necessarily formed of two BIOSs hardwares, but may be of a plurality of sub-diVided programmed BIOS software in a single BIOS Incidentally, a selecting signal for BIOS changeover can be provided by PWROK signal from the power source or by the reset switch.

It will be obvious according to the above description that BIOS backup UrUt on the mainframe of the present invention is surely able to start another BIOS for the system to continue its normal work when the main BIOS is out of order through automatic identification of pre designed circuits. It is definite that the apparatus of the present invention can surely eliminate the shortcoming inherent to the system consists of conventional apparatus having a signal BIOS thereby providing the user with a very convenient and reliable BIOSs backup unit.

6 The invention may be embodied in other specific forms without departing from the spirit of essential characteristics thereof The present embodiment is therefore to be considered in all respects as illustrative and restrictive, the scope of the invention being indicated by the appending claims rather than by the foregoing description and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

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Claims

What is Claimed is:

1. BIOS back-up unit on the computer mainframe characterized in that at least hardware of two BIOSs are provided on the mainframe, in the case when one of the BIOS units is out of order owing to misoperation, at least one of other BIOSs will start to function as a back-up unit with the aid of an identification circuit and a selecting circuit included in the computer so as to keep normal, efficient and reliable operation of the system.

2. BIOS backup unit as claimed in claim 1, wherein said identification circuit is a logic circuit.

3. BIOS backup unit as claimed in claim 1, wherein transistors are used as control elements in said selecting circuit.

4. BIOS back-up unit as claimed in claim 1, wherein said identification circuit at least has two output pins and can control one of the BIOS units to start through said selecting circuit.

5. BIOS backup unit as claimed in claim 1, wherein a D type flip- flop is employed as an essential identification element in said identification circuit.

6. BIOS backup unit as claimed in claim 1, wherein PWROK signal from the power source or a RESET switch can be employed to selectively 20 change over BIOS.

7. BIOS backup unit as claimed in claim 1, wherein the inner part of the hardware of a BIOS can be sub-divided in advance with hardware or software into a plurality of BIOSs.

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