GB2347803B - Digital-to-analogue conversion circuits - Google Patents
Digital-to-analogue conversion circuitsInfo
- Publication number
- GB2347803B GB2347803B GB9905775A GB9905775A GB2347803B GB 2347803 B GB2347803 B GB 2347803B GB 9905775 A GB9905775 A GB 9905775A GB 9905775 A GB9905775 A GB 9905775A GB 2347803 B GB2347803 B GB 2347803B
- Authority
- GB
- United Kingdom
- Prior art keywords
- digital
- conversion circuits
- analogue conversion
- analogue
- circuits
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/322—Continuously compensating for, or preventing, undesired influence of physical parameters
- H03M3/324—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement
- H03M3/346—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases
- H03M3/348—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by means or methods for compensating or preventing more than one type of error at a time, e.g. by synchronisation or using a ratiometric arrangement by suppressing active signals at predetermined times, e.g. muting, using non-overlapping clock phases using return-to-zero signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M3/00—Conversion of analogue values to or from differential modulation
- H03M3/30—Delta-sigma modulation
- H03M3/50—Digital/analogue converters using delta-sigma modulation as an intermediate step
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9905775A GB2347803B (en) | 1999-03-12 | 1999-03-12 | Digital-to-analogue conversion circuits |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9905775A GB2347803B (en) | 1999-03-12 | 1999-03-12 | Digital-to-analogue conversion circuits |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9905775D0 GB9905775D0 (en) | 1999-05-05 |
GB2347803A GB2347803A (en) | 2000-09-13 |
GB2347803B true GB2347803B (en) | 2003-05-21 |
Family
ID=10849558
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9905775A Expired - Fee Related GB2347803B (en) | 1999-03-12 | 1999-03-12 | Digital-to-analogue conversion circuits |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2347803B (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5610606A (en) * | 1993-07-21 | 1997-03-11 | Kabushiki Kaisha Toshiba | 1-bit D/A conversion circuit |
-
1999
- 1999-03-12 GB GB9905775A patent/GB2347803B/en not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5610606A (en) * | 1993-07-21 | 1997-03-11 | Kabushiki Kaisha Toshiba | 1-bit D/A conversion circuit |
Also Published As
Publication number | Publication date |
---|---|
GB2347803A (en) | 2000-09-13 |
GB9905775D0 (en) | 1999-05-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20040312 |