GB2341771B - Address decoding and access control for bus modules - Google Patents

Address decoding and access control for bus modules

Info

Publication number
GB2341771B
GB2341771B GB9820428A GB9820428A GB2341771B GB 2341771 B GB2341771 B GB 2341771B GB 9820428 A GB9820428 A GB 9820428A GB 9820428 A GB9820428 A GB 9820428A GB 2341771 B GB2341771 B GB 2341771B
Authority
GB
United Kingdom
Prior art keywords
access control
address decoding
bus modules
modules
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9820428A
Other versions
GB9820428D0 (en
GB2341771A (en
Inventor
Richard Carl Phelps
Paul Anthony Winser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pixelfusion Ltd
ClearSpeed Technology Ltd
Original Assignee
Pixelfusion Ltd
ClearSpeed Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pixelfusion Ltd, ClearSpeed Technology Ltd filed Critical Pixelfusion Ltd
Priority to GB9820428A priority Critical patent/GB2341771B/en
Publication of GB9820428D0 publication Critical patent/GB9820428D0/en
Priority to US09/787,353 priority patent/US7054969B1/en
Priority to AU58777/99A priority patent/AU5877799A/en
Priority to EP99946365A priority patent/EP1112539A2/en
Priority to PCT/GB1999/003089 priority patent/WO2000017759A2/en
Publication of GB2341771A publication Critical patent/GB2341771A/en
Application granted granted Critical
Publication of GB2341771B publication Critical patent/GB2341771B/en
Priority to US10/827,359 priority patent/US20040199692A1/en
Priority to US10/827,361 priority patent/US20040199706A1/en
Priority to US10/827,356 priority patent/US20040199704A1/en
Priority to US10/827,360 priority patent/US7346722B2/en
Priority to US11/225,695 priority patent/US20060010279A1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4027—Coupling between buses using bus bridges
    • G06F13/404—Coupling between buses using bus bridges with address mapping
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G06F12/0653—Configuration or reconfiguration with centralised address assignment
    • G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
GB9820428A 1998-09-18 1998-09-18 Address decoding and access control for bus modules Expired - Fee Related GB2341771B (en)

Priority Applications (10)

Application Number Priority Date Filing Date Title
GB9820428A GB2341771B (en) 1998-09-18 1998-09-18 Address decoding and access control for bus modules
PCT/GB1999/003089 WO2000017759A2 (en) 1998-09-18 1999-09-16 Computer system comprising latency tolerant and intolerant modules
US09/787,353 US7054969B1 (en) 1998-09-18 1999-09-16 Apparatus for use in a computer system
AU58777/99A AU5877799A (en) 1998-09-18 1999-09-16 Apparatus for use in a computer system
EP99946365A EP1112539A2 (en) 1998-09-18 1999-09-16 Computer system comprising latency tolerant and intolerant modules
US10/827,359 US20040199692A1 (en) 1998-09-18 2004-04-20 Apparatus for use in a computer systems
US10/827,360 US7346722B2 (en) 1998-09-18 2004-04-20 Apparatus for use in a computer systems
US10/827,356 US20040199704A1 (en) 1998-09-18 2004-04-20 Apparatus for use in a computer system
US10/827,361 US20040199706A1 (en) 1998-09-18 2004-04-20 Apparatus for use in a computer systems
US11/225,695 US20060010279A1 (en) 1998-09-18 2005-09-13 Apparatus for use in a computer systems

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9820428A GB2341771B (en) 1998-09-18 1998-09-18 Address decoding and access control for bus modules

Publications (3)

Publication Number Publication Date
GB9820428D0 GB9820428D0 (en) 1998-11-11
GB2341771A GB2341771A (en) 2000-03-22
GB2341771B true GB2341771B (en) 2003-10-22

Family

ID=10839138

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9820428A Expired - Fee Related GB2341771B (en) 1998-09-18 1998-09-18 Address decoding and access control for bus modules

Country Status (1)

Country Link
GB (1) GB2341771B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2367913A (en) * 2000-09-16 2002-04-17 Motorola Inc Processor resource scheduler
TWI330529B (en) * 2003-01-13 2010-09-21 Horphag Res Luxembourg Holding Sa A preparation for improving sperm quality or fertility,a kit comprising the same and uses thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4669079A (en) * 1984-10-31 1987-05-26 International Business Machines Corporation Method and apparatus for bus arbitration in a data processing system
WO1987004828A1 (en) * 1986-01-29 1987-08-13 Digital Equipment Corporation Apparatus and method responding to an aborted signal exchange between subsystems in a data processing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4669079A (en) * 1984-10-31 1987-05-26 International Business Machines Corporation Method and apparatus for bus arbitration in a data processing system
WO1987004828A1 (en) * 1986-01-29 1987-08-13 Digital Equipment Corporation Apparatus and method responding to an aborted signal exchange between subsystems in a data processing system

Also Published As

Publication number Publication date
GB9820428D0 (en) 1998-11-11
GB2341771A (en) 2000-03-22

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20101111 AND 20101117

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20170918