GB2341770B - Modular bus architecture - Google Patents

Modular bus architecture

Info

Publication number
GB2341770B
GB2341770B GB9820426A GB9820426A GB2341770B GB 2341770 B GB2341770 B GB 2341770B GB 9820426 A GB9820426 A GB 9820426A GB 9820426 A GB9820426 A GB 9820426A GB 2341770 B GB2341770 B GB 2341770B
Authority
GB
United Kingdom
Prior art keywords
bus architecture
modular bus
modular
architecture
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9820426A
Other versions
GB9820426D0 (en
GB2341770A (en
Inventor
Richard Carl Phelps
Paul Anthony Winser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Pixelfusion Ltd
ClearSpeed Technology Ltd
Original Assignee
Pixelfusion Ltd
ClearSpeed Technology Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Pixelfusion Ltd, ClearSpeed Technology Ltd filed Critical Pixelfusion Ltd
Priority to GB9820426A priority Critical patent/GB2341770B/en
Publication of GB9820426D0 publication Critical patent/GB9820426D0/en
Publication of GB2341770A publication Critical patent/GB2341770A/en
Application granted granted Critical
Publication of GB2341770B publication Critical patent/GB2341770B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/36Handling requests for interconnection or transfer for access to common bus or bus system
    • G06F13/362Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control
    • G06F13/364Handling requests for interconnection or transfer for access to common bus or bus system with centralised access control using independent requests or grants, e.g. using separated request and grant lines
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/403Bus networks with centralised control, e.g. polling

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Bus Control (AREA)
GB9820426A 1998-09-18 1998-09-18 Modular bus architecture Expired - Fee Related GB2341770B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9820426A GB2341770B (en) 1998-09-18 1998-09-18 Modular bus architecture

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9820426A GB2341770B (en) 1998-09-18 1998-09-18 Modular bus architecture

Publications (3)

Publication Number Publication Date
GB9820426D0 GB9820426D0 (en) 1998-11-11
GB2341770A GB2341770A (en) 2000-03-22
GB2341770B true GB2341770B (en) 2004-01-21

Family

ID=10839136

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9820426A Expired - Fee Related GB2341770B (en) 1998-09-18 1998-09-18 Modular bus architecture

Country Status (1)

Country Link
GB (1) GB2341770B (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0161798A2 (en) * 1984-03-05 1985-11-21 Tektronix, Inc. Modular input device system
US4635192A (en) * 1983-12-06 1987-01-06 Tri Sigma Corporation Self configuring bus structure for computer network
EP0446039A2 (en) * 1990-03-06 1991-09-11 Xerox Corporation A multi-segmented bus and method of operation
WO1992003881A1 (en) * 1990-08-20 1992-03-05 Kent Lennartsson Distributed computer system arrangement
EP0892352A1 (en) * 1997-07-18 1999-01-20 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Computer system with a bus having a segmented structure

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4635192A (en) * 1983-12-06 1987-01-06 Tri Sigma Corporation Self configuring bus structure for computer network
EP0161798A2 (en) * 1984-03-05 1985-11-21 Tektronix, Inc. Modular input device system
EP0446039A2 (en) * 1990-03-06 1991-09-11 Xerox Corporation A multi-segmented bus and method of operation
WO1992003881A1 (en) * 1990-08-20 1992-03-05 Kent Lennartsson Distributed computer system arrangement
EP0892352A1 (en) * 1997-07-18 1999-01-20 BULL HN INFORMATION SYSTEMS ITALIA S.p.A. Computer system with a bus having a segmented structure

Also Published As

Publication number Publication date
GB9820426D0 (en) 1998-11-11
GB2341770A (en) 2000-03-22

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20101111 AND 20101117

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20150918