GB2337823A - Temperature estimation method - Google Patents
Temperature estimation method Download PDFInfo
- Publication number
- GB2337823A GB2337823A GB9811304A GB9811304A GB2337823A GB 2337823 A GB2337823 A GB 2337823A GB 9811304 A GB9811304 A GB 9811304A GB 9811304 A GB9811304 A GB 9811304A GB 2337823 A GB2337823 A GB 2337823A
- Authority
- GB
- United Kingdom
- Prior art keywords
- temperature
- arrangement
- current
- electronic device
- output signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01K—MEASURING TEMPERATURE; MEASURING QUANTITY OF HEAT; THERMALLY-SENSITIVE ELEMENTS NOT OTHERWISE PROVIDED FOR
- G01K3/00—Thermometers giving results other than momentary value of temperature
- G01K3/005—Circuits arrangements for indicating a predetermined temperature
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H6/00—Emergency protective circuit arrangements responsive to undesired changes from normal non-electric working conditions using simulators of the apparatus being protected, e.g. using thermal images
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K17/082—Modifications for protecting switching circuit against overcurrent or overvoltage by feedback from the output to the control circuit
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R21/00—Arrangements for measuring electric power or power factor
- G01R21/06—Arrangements for measuring electric power or power factor by measuring current and voltage
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
- H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
- H03K2017/0806—Modifications for protecting switching circuit against overcurrent or overvoltage against excessive temperature
Landscapes
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Measurement Of Current Or Voltage (AREA)
Abstract
A temperature estimation arrangement for estimating the temperature of a electronic device 10, has a sense circuit for sensing the voltage across the device 11,12 and the current through the device 13,14. The sense circuit also provides 20,30 a current output representing power dissipated derived from the voltage and current measurements. The arrangement also has a temperature circuit 40 coupled to receive the current output, for providing an output signal 46. The temperature circuit 40 has circuitry which models the thermal behaviour of the electronic device 10 such that the output signal 46 is substantially indicative of the temperature of the electronic device. This may be compared 50 to a threshold temperature 60 to operate a protective cut-out.
Description
2337823 TEMPERATURE ESTEVIATION ARRANGEMENT AND A=OD
Field of the Invention
This invention relates to temperature estimation arrangements, and particularly but not exclusively to arrangements for estimating temperature in electronic devices.
Background of the Invention
Most electronic devices have max:imum operating temperature limits, and maintaining an operating temperature at or below this limit is critical to safe operation of the device.
In the case of semiconductor devices, this limit may be well defined (approximately 125C for most silicon based devices) but this is often very difficult to measure when the device is operating. A known approach is to use a temperature sensor integrated with the device. However, this adds considerable expense and complexity to device.
A further known approach is to provide a discrete temperature sensor positioned in close proximity to the device. However, a problem with this arrangement is that good thermal coupling must be provided between the device and the sensor, and if several other devices are also located in close proximity to the device being measured, the sensor may sense heat from the other devices and hence may not provide an accurate temperature estimation of the device being measured.
A third known approach is to use a current limit arrangement. However this assumes a fixed upper voltage limit, and the value of the current limit must be based on the highest theoretical ambient temperature. Therefore in most instances the device could safely supply a considerably higher current than the current limit.
This invention seeks to provide a temperature estimation arrangement and method which mitigate the above mentioned disadvantages.
Summary of the Invention
According to a first aspect of the present invention there is provided a temperature estimation arrangement for an electronic device, the arrangement comprising.. sensing means for sensing power consumed in the electronic device and for providing a current in dependence upon the sensed power; and, a temperature circuit coupled to receive the current from the sensing means, for providing an output signal in dependence thereon, wherein the temperature circuit has circuitry which models the thermal behaviour of the semiconductor device such that the output signal is indicative of the temperature of the electronic device.
Preferably the sensing means includes a current sensing resistor for coupling in series with the semiconductor device. The current circuit may be a Howland Pump. The temperature circuit preferably includes an ambient temperature sensor.
The arrangement preferably further comprises a comparator for comparing the output signal with a reference signal indicative of maximum allowed temperature, for providing a trip output in the event that the output signal exceeds the reference signal.
According to a second aspect of the present invention there is provided a method for estimating the temperature of an electronic device, the method comprising the steps of. sensing power consumed by the electronic device for providing a sensed output dependent thereon; providing a current indicative of the sensed electrical signals; and, driving a temperature circuit with the current for providing an output signal in dependence thereon, wherein the temperature circuit has circuitry which models the thermal behaviour of the semiconductor device such that the output signal is indicative of the temperature of the electronic device.
In this way an arrangement and method are provided, which allow an electronic device to operate safely at a maximum rated temperature, without the need for an expensive 'on-chip' temperature sensing device.
Brief Description of the Drawing
An exemplary embodiment of the invention will now be described with 5 reference to the drawings, in which:- FIG. 1 shows a preferred embodiment of a temperature estimation arrangement in accordance with the invention, and FIG. 2 shows an alternative embodiment of a temperature estimation 10 arrangement in accordance with the invention.
Detailed Description of a Prefer-red Embodiment
Referring to the single figure drawing, there is shown a temperature estimation arrangement 5, connected to a device 10, which may be a semiconductor power transistor package, or any electronic device.
A current sensing resistor 15 is coupled in series to the device 10. A multiplier circuit 20, such as a Burr-Brown 4213 circuit, is coupled via four wires, 11 to 14, such that wires 11 and 12 measure the voltage across the device 10 and the wires 13 and 14 measure the voltage across the current sensing resistor 15. In this way both the current through the device 10 and the voltage across the device 10 are sensed. The multiplying circuit 20 provides an output signal (P), indicative of the current (I) and voltage (V) sensed (since P=VI).
A Voltage-Current T-I) converter 30 is coupled to receive the power output signal from the multiplier circuit 20, for providing a current output in dependence upon the received power output signal. The V-I converter may be a Howland Current pump (as shown in the National general purpose linear devices data book 1989 pp 3-787).
A thermal simulation network 40 is coupled to receive the current output from the V-I converter 30, for providing a voltage output signal 46 in dependence thereon. The network 40 is a second order circuit.
The thermal simulation network 40 has the following circuitry: a first capacitor 41 coupled to a node which is connected to the current output from the V-I converter 30; a second capacitor 43 coupled via a first resistor 42 to the node; and an ambient temperature sensor 45 coupled via a second resistor 44 and the first resistor 42 to the node. The temperature circuit 40 is arranged to model the thermal behaviour of the device 10. In other words, the voltage output signal 46 has the same relationship to the current output as the temperature of the device 10 has to its power. Therefore the actual component values and the arrangement of the circuitry of the thermal simulation network 40 are chosen accordingly.
In this way the voltage output signal 46 (also taken from the node) is substantially indicative of the temperature of the device.
A comparator 50 is coupled to receive the voltage output signal &om the thermal simulation network 40, and is also coupled to receive a reference voltage from a reference voltage source 60. The value of the reference voltage is chosen such that it represents the maximum allowed temperature for safe operation of the device 10.
An output of the comparator is coupled to a trip output 70, such that when the voltage output signal 46 exceeds the reference voltage, the trip output 70 is enabled. The trip output 70 may be coupled to a cut-out circuit (not shown), such that when the trip output 70 is enabled, the cut-out circuit disables the device 10. Alternatively, the trip-output may be coupled to a limiting circuit (not shown) which reduces the input to the electronic device, thus reducing its temperature. In both of the above situations, the device is protected from overheating, whilst maintaining an optimum operating temperature range.
Referring now also to FIG. 2, there is shown a estimation arrangement 100, which is a simpler and substantially equivalent implementation to the arrangement 5 of FIG. 1, excluding the ambient temperature sensor 45, comparator 50, reference voltage source 60 and trip output 70 which are omitted for clarity.
In the arrangement 100, the electronic device to be measured is depicted by the resistor 110, and a current sensing resistor 115 is equivalent to the current sensing resistor 15 of FIG. 1. A thermal simulation network 140 performs substantially the same function as the thermal simulation network 40 of FIG. 1, and has first and second nodes 141 and 142 respectively.
A first transistor 120 has an emitter terminal coupled via a first resistor 116 to a voltage source 135, a collector terminal coupled to the first node 141 of the thermal simulation network 140 and a base terminal coupled to a first potential divider arrangement of resistors 125 and 127, which are in turn coupled to the voltage source 135, which represents the voltage between connections 11 and 14 of FIG. 1.
Similarly a second transistor 130, which is matched to the first transistor 120 (i.e. they are integrated on the same circuit), has an emitter terminal coupled via the first resistor 116 to the voltage source 135, a collector terminal coupled to the second node 142 of the thermal simulation network 140 and a base terminal coupled to a second potential divider arrangement 20 of resistors 135 and 137, which are in turn coupled to the voltage source 135.
The first and second nodes 141 and 142 are also coupled to ground via second and third resistors 128 and 138 respectively. The first resistor 116 is has a value which is chosen to be relatively large, such that it acts as a voltage controlled current source. Appropriate values for the other components of FIG. 2 are chosen such that the typical voltage range of the voltage source 135 is between approximately 10 and 100 volts.
In operation the arrangement 100 of FIG 2 acts effectively identically to the multiplier circuit 20 and the V-I converter 30 of FIG 1, in that it multiplies the voltage across the resistor 110 (equivalent to device 10 in FIG. 1) by the current in 110 as sensed by the current sensing resistor 15 and feeds the resultant signal (which represents the power dissipation in the device 10) into the thermal simulation network 140 (which corresponds to the network 40 of FIG. 1). The operation of the first and second transistors 120 and 130 respectively as a differential amplifier multiplier is described in "Integrated Electronics: analog and digital circuits and systemJ, J.Millman, CHalkias, MeGraw Hill, International student edition, 1972, pp578 and 510-511.
Therefore in this way the arrangement of FIG. 2 also substantially provides an indication of the temperature of the device 10, but with a much simplified arrangement.
It will be appreciated that further alternative embodiments to those described above are possible. For example, the precise arrangement of the thermal simulation networks 40 and 140 may differ from those described above.
Claims (11)
1. A temperature estimation arrangement for an electronic device, the arrangement comprising: sensing means for sensing power consumed in the electronic device and for providing a current in dependence upon the sensed power; and, a temperature circuit coupled to receive the current from sensing means, for providing an output signal in dependence thereon, wherein the temperature circuit has circuitry which models the thermal behaviour of the electronic device such that the output signal is substantially indicative of the temperature of the electronic device.
2. The arrangement of claim 1 wherein the sensing means includes a current circuit arranged to provide the current in dependence upon a sensed output.
3. The arrangement of claim 2 wherein the current circuit is a Howland Pump.
4. The arrangement of any preceding claim wherein the sensing means includes a current sensing resistor for coupling in series with the semiconductor device.
5. The arrangement of any preceding claim wherein the temperature circuit includes an ambient temperature sensor.
6. The arrangement of any preceding claim further comprising a comparator for comparing the output signal with a reference signal indicative of maximum allowed temperature, for providing a trip output in the event that the output signal exceeds the reference signal.
7. A method for estimating the temperature of an electronic device, the method comprising the steps of.
sensing power consumed by the electronic device for providing a sensed output dependent thereon; providing a current indicative of the sensed electrical signals; and, driving a temperature circuit with the current for providing an output signal in dependence thereon, wherein the temperature circuit has circuitry which models the thermal behaviour of the electronic device such that the output signal is substantially indicative of the temperature of the electronic device.
8. The method of claim 6 further comprising the step of comparing the output signal with a reference signal indicative of maximum allowed temperature, for providing a trip output in the event that the output signal 10 exceeds the reference signal.
9. An arrangement substantially as hereinbefore described and with reference to the drawing of FIG. 1.
10. An arrangement substantially as hereinbefore described and with reference to the drawing of FIG. 2.
11. A method substantially as hereinbefore described and with reference to the drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9811304A GB2337823A (en) | 1998-05-26 | 1998-05-26 | Temperature estimation method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9811304A GB2337823A (en) | 1998-05-26 | 1998-05-26 | Temperature estimation method |
Publications (2)
Publication Number | Publication Date |
---|---|
GB9811304D0 GB9811304D0 (en) | 1998-07-22 |
GB2337823A true GB2337823A (en) | 1999-12-01 |
Family
ID=10832728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9811304A Withdrawn GB2337823A (en) | 1998-05-26 | 1998-05-26 | Temperature estimation method |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2337823A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006069745A1 (en) * | 2004-12-24 | 2006-07-06 | Leopold Kostal Gmbh & Co. Kg | Method for correction of an electrical current measurement carried out indirectly by an electrical voltage measurement |
EP4106193A1 (en) * | 2021-06-16 | 2022-12-21 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4117527A (en) * | 1977-03-25 | 1978-09-26 | General Electric Company | Solid state valve thermal protection for hvdc power converters |
GB1534862A (en) * | 1974-12-02 | 1978-12-06 | Gen Electric Canada | Temperature monitoring of semiconductors |
GB1536293A (en) * | 1975-12-03 | 1978-12-20 | Gen Electric Canada | Temperature monitor for semiconductor junction |
US4330809A (en) * | 1979-12-31 | 1982-05-18 | Crown International, Inc. | Thermal protection circuit for the die of a transistor |
US4425624A (en) * | 1980-06-11 | 1984-01-10 | La Telemecanique Electrique | Device for simulating an instantaneous temperature-rise of a semiconductor component in order to protect same |
US5162669A (en) * | 1989-09-25 | 1992-11-10 | Asea Brown Boveri Ltd. | Semiconductor switch including a device for measuring a depletion layer temperature of the switch |
-
1998
- 1998-05-26 GB GB9811304A patent/GB2337823A/en not_active Withdrawn
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1534862A (en) * | 1974-12-02 | 1978-12-06 | Gen Electric Canada | Temperature monitoring of semiconductors |
GB1536293A (en) * | 1975-12-03 | 1978-12-20 | Gen Electric Canada | Temperature monitor for semiconductor junction |
US4117527A (en) * | 1977-03-25 | 1978-09-26 | General Electric Company | Solid state valve thermal protection for hvdc power converters |
US4330809A (en) * | 1979-12-31 | 1982-05-18 | Crown International, Inc. | Thermal protection circuit for the die of a transistor |
US4425624A (en) * | 1980-06-11 | 1984-01-10 | La Telemecanique Electrique | Device for simulating an instantaneous temperature-rise of a semiconductor component in order to protect same |
US5162669A (en) * | 1989-09-25 | 1992-11-10 | Asea Brown Boveri Ltd. | Semiconductor switch including a device for measuring a depletion layer temperature of the switch |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006069745A1 (en) * | 2004-12-24 | 2006-07-06 | Leopold Kostal Gmbh & Co. Kg | Method for correction of an electrical current measurement carried out indirectly by an electrical voltage measurement |
EP4106193A1 (en) * | 2021-06-16 | 2022-12-21 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
US11552629B1 (en) | 2021-06-16 | 2023-01-10 | Renesas Electronics Corporation | Semiconductor device and manufacturing method thereof |
Also Published As
Publication number | Publication date |
---|---|
GB9811304D0 (en) | 1998-07-22 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |