GB2332597A - SIM Clock Driver Circuit for a Mobile Phone - Google Patents

SIM Clock Driver Circuit for a Mobile Phone Download PDF

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Publication number
GB2332597A
GB2332597A GB9726761A GB9726761A GB2332597A GB 2332597 A GB2332597 A GB 2332597A GB 9726761 A GB9726761 A GB 9726761A GB 9726761 A GB9726761 A GB 9726761A GB 2332597 A GB2332597 A GB 2332597A
Authority
GB
United Kingdom
Prior art keywords
sim
channel
clock
drain
booster
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9726761A
Other versions
GB9726761D0 (en
GB2332597A9 (en
GB2332597B (en
Inventor
Mark Corbridge
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Technologies UK Ltd
Original Assignee
NEC Technologies UK Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Publication of GB2332597A9 publication Critical patent/GB2332597A9/en
Application filed by NEC Technologies UK Ltd filed Critical NEC Technologies UK Ltd
Priority to GB9726761A priority Critical patent/GB2332597B/en
Publication of GB9726761D0 publication Critical patent/GB9726761D0/en
Publication of GB2332597A publication Critical patent/GB2332597A/en
Application granted granted Critical
Publication of GB2332597B publication Critical patent/GB2332597B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0175Coupling arrangements; Interface arrangements
    • H03K19/0185Coupling arrangements; Interface arrangements using field effect transistors only
    • H03K19/018585Coupling arrangements; Interface arrangements using field effect transistors only programmable

Abstract

A SIM power supply circuit for a mobile phone includes, as shown in the sole figure of the drawings, a low voltage supply circuit (13), a clock/logic circuit (15) operating from the low voltage supply and a booster (14) for providing a higher SIM supply voltage when required. A high speed buffer amplifier (16 - 19) is provided for supplying clock pulses at the required voltage to the SIM.

Description

1 SIM clock driver circuit for a mobile telephone 2332597 This invention
relates to a SIM (subscriber identity module) driver circuit for a mobile telephone.
Early SIMs required a supply voltage of 5V, but more recent SIMs require a 3V supply. A user buying a new mobile telephone may wish to instal his old SIM in the new telephone, so that there is a requirement for new telephone designs to be able to operate SIMs at either the old or the new voltage. Whilst it is a simple matter to convert data and reset lines by using pull-up resistors, it is not easy to deal with the problem of providing a suitable arrangement for the clock input of the SIM which needs to be able to run at 3.5MHz and be held either high or low for prolonged periods.
In accordance with the invention there is provided a SIM power supply circuit comprising a low voltage supply circuit, a clock/logic circuit operating from the low voltage supply circuit, a booster for providing a higher voltage supply for the SIM when required and a high speed buffer amplifier connected to the output of the booster and receiving an input from the clock/logic circuit for providing clocking signals to the SIM.
The booster can be disabled when the SIM is capable of running at 3V, but enabled when a 5V supply is required. In either case, the high speed buffer amplifier provides the required clocking pulses to the SIM with the full voltage swing required to clock the SIM properly.
Preferably the high speed buffer amplifier comprises a first n-channel MOSFET with its gate connected to the low voltage supply, and its 2 source connected to the output of the clock/logic circuit, a second nchannel MOSFET with its gate connected to the output of the clock/logic circuit, its source connected to a ground terminal and its drain connected to the SIM clock terminal, a first p-channel MOSFET with its drain connected to the drain of the first n-channel MOSFET and its source connected to the output of the booster and a second p-channel MOSIFIET with its source connected to the output of the booster, its drain connected to the SIM clock terminal, the gate of the first p-channel MOSIFET being connected to the drain of the second p-channel MOSIFET and the gate of the second p-channel MOSIFIET being connected to the drain of the first p-channel MOSIFIET.
An example of the invention is shown in the single figure of the accompanying drawings which is a circuit diagram of the SIM supply arrangement.
The SIM 10 is connected between a ground bus 11 and a SIM supply bus 12. This latter bus is supplied with power from a 3V main supply 13 via a booster 14, which, when inhibited, provides a 3V output, but which, when enabled, provides a 5V supply for the SIM. A clock/logic block 15 is powered from the 3V supply and provides clocking pulses to the SIM clock terminal when required under the control of a main CPU (not shown).
In order to transmit these clocking pulses correctly to the SIM with a full voltage swing between the voltages on busses 11 and 12, there isprovided a high speed buffer amplifier between the clock/lbgic block and the SIM clock terminal. This buffer amplifier comprises two n-channel MOSFETs 16 and 17 and two p-channel MOSIFETS 18 and 19 connected 3 as shown in the drawing. Thus MOSFET 16 has its source connected to the output of the clock/logic circuit 15 and its gate connected to the 3V supply positive terminal. The MOSFET 17 has its source connected to the ground bus 11, its drain connected to the SIM clock terminal and its gate connected to the output of the clock/logic circuit 15. The MOSFET 18 has its source connected to the bus 12 and its drain connected to the drain of MOSIFIET 16. The MOSIFIET 19 has its source connected to the bus 12, its drain connected to the drain of the MOSFET 17 and its gate connected to the commoned drains of MOSFETs 16 and 18. The gate of MOSIFIET 18 is connected to the commoned drains of MOSFETs 17 and 19.
In the arrangement described above, the system is initially booted with the booster 14 enabled and data held on the SIM is accessed to ascertain whether the operating voltage should be 3V or 5V. In the latter case, the booster 14 is allowed to continue operating and the buffer amplifier ensure that the SIM is clocked properly as and when necessary. If the SIM is able to operate at 3V, the booster 14 is inhibited and a considerable energy saving is obtained by operating the system at 3V throughout without compromising the speed of operation of the SIM.

Claims (1)

  1. Claims
    4 (1) A SIM power supply circuit for a mobile telephone apparatus comprising a low voltage supply circuit, a clock/logic circuit operating from the low voltage supply circuit, a booster for providing a higher voltage supply for the SIM when required and a high speed buffer amplifier connected to the output of the booster and receiving an input from the clock/logic circuit for providing clocking signals to the SIM.
    (2) A SIM power supply circuit as claimed in claim 1 in which the high speed buffer amplifier comprises a first n-channel MOSFET with its gate connected to the low voltage supply and its source connected to the output of the ciock/logic circuit, a second n-channel MOSFET with its gate connected to the output of the clock/logic circuit, its source connected to a ground terminal and its drain connected to the SIM clock terminal, a first p-channel MOSIFIET with its drain connected to the drain of the first n-channel MOSIFIET and its source connected to the output of the booster and a second p-channel MOSIFIET with its source connected to the output of the booster, its drain connected to the SIM clock terminal, the gate of the first p-channel MOSIFIET being connected to the drain of the second p-channel MOSFET and the gate of the second pchannel MOSIFIET being connected to the drain of the first p-channel MOSIFET.
    (3) A SIM power supply circuit for a mobile telephone apparatus substantially as hereinbefore described with reference to and as shown in the accompanying drawings.
GB9726761A 1997-12-16 1997-12-16 SIM clock driver circuit for a mobile telephone Expired - Fee Related GB2332597B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB9726761A GB2332597B (en) 1997-12-16 1997-12-16 SIM clock driver circuit for a mobile telephone

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB9726761A GB2332597B (en) 1997-12-16 1997-12-16 SIM clock driver circuit for a mobile telephone

Publications (4)

Publication Number Publication Date
GB2332597A9 GB2332597A9 (en)
GB9726761D0 GB9726761D0 (en) 1998-02-18
GB2332597A true GB2332597A (en) 1999-06-23
GB2332597B GB2332597B (en) 2002-08-07

Family

ID=10823831

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9726761A Expired - Fee Related GB2332597B (en) 1997-12-16 1997-12-16 SIM clock driver circuit for a mobile telephone

Country Status (1)

Country Link
GB (1) GB2332597B (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675602A1 (en) * 1994-03-30 1995-10-04 Matsushita Electric Industrial Co., Ltd. Voltage-level shifter
GB2313968A (en) * 1996-05-28 1997-12-10 Altera Corp An IC with I/O configurable for coupling to different operating voltage environments

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0675602A1 (en) * 1994-03-30 1995-10-04 Matsushita Electric Industrial Co., Ltd. Voltage-level shifter
GB2313968A (en) * 1996-05-28 1997-12-10 Altera Corp An IC with I/O configurable for coupling to different operating voltage environments

Also Published As

Publication number Publication date
GB9726761D0 (en) 1998-02-18
GB2332597A9 (en)
GB2332597B (en) 2002-08-07

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20061216