GB2321829A - Time Delay Control of Frame Synchronous Signal - Google Patents

Time Delay Control of Frame Synchronous Signal Download PDF

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Publication number
GB2321829A
GB2321829A GB9726793A GB9726793A GB2321829A GB 2321829 A GB2321829 A GB 2321829A GB 9726793 A GB9726793 A GB 9726793A GB 9726793 A GB9726793 A GB 9726793A GB 2321829 A GB2321829 A GB 2321829A
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United Kingdom
Prior art keywords
frame synchronous
synchronous signal
base station
switching centre
delay
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Granted
Application number
GB9726793A
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GB2321829B (en
GB9726793D0 (en
Inventor
Jong-Woong Lee
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of GB9726793D0 publication Critical patent/GB9726793D0/en
Publication of GB2321829A publication Critical patent/GB2321829A/en
Application granted granted Critical
Publication of GB2321829B publication Critical patent/GB2321829B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/24Radio transmission systems, i.e. using radiation field for communication between two or more posts
    • H04B7/26Radio transmission systems, i.e. using radiation field for communication between two or more posts at least one of which is mobile
    • H04B7/2662Arrangements for Wireless System Synchronisation
    • H04B7/2671Arrangements for Wireless Time-Division Multiple Access [TDMA] System Synchronisation
    • H04B7/2678Time synchronisation
    • H04B7/2687Inter base stations synchronisation
    • H04B7/2693Centralised synchronisation, i.e. using external universal time reference, e.g. by using a global positioning system [GPS] or by distributing time reference over the wireline network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B7/00Radio transmission systems, i.e. using radiation field
    • H04B7/14Relay systems
    • H04B7/15Active relay systems
    • H04B7/155Ground-based stations
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0682Clock or time synchronisation in a network by delay compensation, e.g. by compensation of propagation delay or variations thereof, by ranging

Abstract

A digital radio communication system consists of a switching centre 100 and a plurality of base stations 141-14n. During frame synchronous signal transmission the switching centre transmits frame synchronous signals by transmission line to the plurality of base stations. Each of the base stations relays the received frame synchronous signal back to the switching centre. The switching centre then detects the delay between transmission of the frame synchronous signal to each base station and reception of the corresponding frame synchronous signal relayed back from it and transmits the detected delay to the base station in question. The base stations receive and compensate for the respective detected delays transmitted from the switching centre.

Description

1 2321829 TIME DELAY CONTROL OF FRAME SYNCHRONOUS SIGNAL
BACKGROUND TO THE INVENTION The present invention relates to a digital radio communication system and in particular to the control and compensation for distance-related time delays of frame synchronous signals transmitted from a switching centre to a base station.
In a digital radio communication system, every base station receives the same frame synchronous signal transmitted from a switching centre and switches channels in response to the received frame synchronous signal. In general, the base station should receive the frame synchronous signal within a delay error of 2psec to be able to switch channels without disconnecting the call service.
In such a digital radio communication system, the transfer rateof the frame synchronous signal is determined by the characteristics of the transmission lines. That is, the frame synchronous signal undergoes a time delay during transmission, according to the characteristics of the transmission line between the switching centre and the base station. If the distance between the switching centre and the base station is very long, the frame synchronous signal transmitted from the switching centre to the base station will undergo a considerable time delay. on the other hand, if the distance between the switching centre and the base station is very short, the frame synchronous signal transmitted from the switching centre to the base station will undergo a much less significant time delay.
In the light of the foregoing, it is noteworthy that the 35 time delay of the frame synchronous signal is dependent on the characteristics (i.e., distance) of the transmission line between the switching centre and the base station. However, since the base station should receive the frame synchronous signal within a predetermined delay error to be 2 able to switch channels without the disconnection of the call service, the distance between the switching centre and the base station cannot be extended beyond a certain limit. Further, if the frame synchronous signal is distorted due to the characteristics of the transmission line and the surrounding environment during transmission, there is no way to compensate for such distortion.
SUMMARY OF THE INVENTION
It is therefore an objective of the present invention to compensate for time delays of the frame synchronous signal.
Accordingly, the present invention provides a digital radio communication system comprising a switching centre and a base station, in which:
the switching centre is adapted to transmit frame synchronous signals to the base station; the base station is adapted to relay the received frame synchronous signal back to the switching centre; the switching centre is further adapted to detect the delay between the frame synchronous signal transmitted to the base station and the frame synchronous signal relayed back from the base station and to transmit the detected delay to the base station; and the base station is further adapted to receive and compensate for the detected delay transmitted from the switching centre.
Preferably, the switching centre comprises a delay detector for comparing the time of frame synchronous signal transmission to the base station with the time of receipt of the frame synchronous signal relayed back to determine the said delay.
Preferably, the delay detector comprises:
counter; buffer for storing the counter value at the time of frame synchronous signal transmission to the base station; and 3 a comparator for comparing the counter value at the time of receipt of the frame synchronous signal relayed back with that stored in the buffer, to determine the said delay.
The present invention also provides a digitalradio communication system comprising a switching centre and a plurality of base stations, in which:
the switching centre is adapted to transmit frame synchronous signals to the plurality of base stations; each of the base stations is adapted to relay the received frame synchronous signal back to the switching centre; the switching centre is further adapted to detect the delay between the frame synchronous signal transmitted to each base station and the corresponding frame synchronous signal relayed back from it and to transmit the detected delay to the base station in question; and each base station is further adapted to receive and compensate for the respective detected delay transmitted from the switching centre.
Preferably, the switching centre comprises a delay detector for comparing the times of receipt of the frame synchronous signal relayed back to it from the respective base stations to determine the respective delays.
Preferably, the delay detector comprises: a counter; 30 respective buffers for storing the counter values at the times of receipt of the respective frame synchronous signals relayed back from the base stations; and means for calculating the differences between the stored counter value for a first base station and the stored counter values for the remaining base stations to determine the respective delays.
The first base station may be a nearest base station.
4 Preferably, each base station includes a delay compensator for compensating for the respective delay. The delay compensator may be adapted to delay the frame synchronous signal or to shorten the f rame synchronous signal as the case may be.
The present invention also extends to a method of compensating for frame synchronous signal delays in a digital radio communication system comprising a switching centre and a base station, the method comprising:
transmitting f rame synchronous signals to the base station from the switching centre; relaying the received f rame synchronous signal back to the switching centre from the base station; detecting the delay between the frame synchronous signal transmitted to the base station and the frame synchronous signal relayed back from the base station and transmitting the detected delay to the base station f rom the switching centre; and receiving and compensating for the detected delay transmitted from the switching centre in the base station.
Preferably, the said delay is determined by comparing the time of frame synchronous signal transmission to the base station with the time of receipt of the frame synchronous signal relayed back.
The method may comprise: storing in a buf f er a counter value at the time of frame synchronous signal transmission to the base station; and comparing the counter value at the time of receipt of the frame synchronous signal relayed back with that stored in the buffer, to determine the said delay.
The present invention also provides a method of compensating for frame synchronous signal delays in a digital radio communication system comprising a switching centre and a plurality of base stations, the method comprising:
transmitting frame synchronous signals to the plurality of base stations from the switching centre; relaying the received frame synchronous signal back to the switching centre from each of the base stations; detecting the delay between the frame synchronous signal transmitted to each base station and the corresponding f rame synchronous signal relayed back f rom it and transmitting the detected delay to the base station in question from the switching centre; and receiving and compensating for the respective detected delay transmitted f rom the switching centre in each base station.
Preferably, the respective delays are determined by comparing the times of receipt of the f rame synchronous signal relayed back f rom the respective base stations to determine the respective delays.
The method may comprise: 20 storing the counter values at the times of receipt of the respective frame synchronous signals relayed back from the base stations in respective buffers; and calculating the differences between the stored counter value for a first base station and the stored counter values for the remaining base stations to determine the respective delays.
The first base station may be a nearest base station.
Preferably, the detected delays are compensated for in the base stations by delaying the frame synchronous signal or shortening the f rame synchronous signal as the case may be.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will now be described by way of example with reference to the accompanying drawings in which:
Fig. 1 is a schematic block diagram of a digital radio communication system to which the present invention may be 6 applied; Fig. 2 is a schematic block diagram of a base station interface (130) and a base station (141) of Fig. 1; Fig. 3 is a detailed block diagram of a delay detector (130) according to the present invention; Fig. 4 is a detailed block diagram of transmitters (210 and 240) according to the present invention; Fig. 5 is a timing diagram of signals generated by a switching centre (100) and a base station (141) according 10 to the present invention; and Fig. 6 is a block diagram of a delay detector (23) according to another embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
Referring to Fig. 1, a digital radio communication system to which the present invention may be applied includes a switching centre 100, a plurality of base stations 141-14n, and a mobile terminal 150, in which the distances between the switching centre 100 and the respective base stations 141-14n are different. The switching centre 100 includes a main controller 110, a signal processor 120, and a base station interface (BSI) 130. The main controller 110 controls the overall operation of the switching centre 100, the signal processor 120 processes signals transferred to and received from the base station interface 130 under the control of the main controller 110, and the base station interface 130 interfaces signals transmitted to and received from the base stations 141-14n. The mobile terminal 150 connects with a nearest base station, to transmit/receive data for a telephone conversation.
A detailed block diagram of the base station interface 130 and the base station 141 is illustrated in Fig.2.
Referring to Figs. 1 and 2, the base station interface 130 includes a transmitter 210 for transmitting/receiving data signals, a controller 220 for controlling the overall operation of the base station interface 130, and a delay detector 230 for detecting a time delay of the frame synchronous signal transmitted from the switching centre 7 100. The base station 141 includes a transmitter 240 for transmitting/receiving data signals, a controller 250 for controlling the overall operation of the base station 141, and a delay compensator for compensating for the time delay of the frame synchronous signal.
Referring to Fig. 3, the delay circuit 230 includes a counter 302, a buffer 304, and a comparator 306. Fig. 4 illustrates a detailed block diagram of the transmitters 210 and 240 according to the present invention. As illustrated in the drawing, the transmitter 210 includes a master 410 and a slave 420. The transmitter 240 includes a slave 430 and a master 440, connected to the master 410 and the slave 420 of the transmitter 210, respectively.
Fig. 5 is a timing diagram of signals generated by the switching centre 100 and the base station 141. In the drawing, signal 500 represents the frame synchronous signal transmitted from the switching centre 100 to the base station 141. A signal 510 represents a signal that the counter generates to detect the time delay between the frame synchronous signal transmitted to the base station 141 and a frame synchronous signal fed back from the base station 141. A signal 520 represents the frame synchronous signal fed back from the base station 141 to the switching centre 100.
Referring to Figs. 1 to 5, the switching centre 100 and each of the base stations 141-14n include the transmitters 210 and 240 shown in Fig. 4 respectively, to transmit and signals via two pairs of transmission lines. When the switching centre 100 transmits data to the base station 141, the controller 220 allows the transmitter 210 to transmit the data to the base station 141 via the master 410. Then, the controller 250 of the base station 141 allows the transmitter 240 to receive the data transmitted from the switching centre 100 via the slave 430. In the meantime, if the base station 141 transmits data to the switching centre 100, the controller 250 allows the 8 transmitter 240 to transmit the data to the switching centre 100 via the master 440. Then, the controller 220 of the switching centre 100 allows the transmitter 210 to receive the data transmitted from the base station 141 via 5 the slave 420.
The way in which the switching centre 100 transmits the frame synchronous signal 500 to the base station 141 via the transmitter 210 will now be described. The controller 220 allows the transmitter 210 to transmit the frame synchronous signal to the slave 430 of the base station 410 via the master 410. The slave 430 transfers the received frame synchronous signal to the master 440. The master 440 transfers the frame synchronous signal to the slave 420, to feed it back to the switching centre 100. The transmitter 210 transfers the frame synchronous signal fed back from the base station 141 to the delay detector 230. The delay detector 230 compares the time of receipt of the frame synchronous signal fed back from the base station 141 with the time of transmission of the frame synchronous signal from the switching centre 100 to the base station 141, to detect a time delay of the frame synchronous signal.
As illustrated in Fig. 3, the delay detector 230 according to the present invention includes a counter 302, a buffer 304 and a comparator 306. The counter 302 begins a counting operation in response to the frame synchronous signal being transmitted to the base station 141 and completes the counting operation in response to the frame synchronous signal fed back from the base stations. The buffer 304 temporarily stores the counter value at the time of receipt of the frame synchronous signal relayed back from the base station 141 and transfers it to the comparator 306 in response to a control signal received from the controller 220. For each of the remaining base stations, at the time of receipt of the frame synchronous signal relayed back, the comparator 306 compares the signal 510 generated from the counter 302 with the signal 520 stored in the buffer 304, to detect the time delay of the frame synchronous 9 signal and provide the controller 220 with the detected time delay information.
The controller 220 allows the transmitter 210 to transmit the time delay information to the base station 141. The master 410 transmits the time delay information of the frame synchronous signal to the slave 430. The slave 430 transfers the time delay information of the received frame synchronous signal to the delay compensator 260. The delay compensator 260 delays or shortens the received frame synchronous signal in response to the time delay information, to compensate for the time delay of the frame synchronous signal. The controller 250 controls the base station 141 based on the compensated frame synchronous signal. Such an operation is repeatedly performed between the switching centre 100 and the respective base stations 141-14n, to detect and compensate for the time delay of the frame synchronous signal according to the different distances between the switching centre 100 and the respective base stations 141-14n.
Fig. 6 is a block diagram of a delay detector 230 according to another embodiment of the present invention. In the drawing, the delay detector 230 includes a counter 600, buffers 610 and 620 and a subtracter 630. The counter 600 performs a counting operation upon transmission of the frame synchronous signals to the base stations 141-14n. The buffer 610 stores a count value that the counter 600 has generated by performing the counting operation upon receiving the frame synchronous signal fed back from a reference base station (e.g., a nearest base station from the switching centre 100). The buffer 620 stores a count value that the counter 600 has generated by performing the counting operation upon receiving the frame synchronous signal fed back from the remaining base stations other than the reference base station. The subtracter 630 subtracts a signal output of the buf fer 610 from a signal output of the buffer 620, to generate a difference signal.
With reference to Figs. 2 and 6, the way in which the delay detector 230 detects the time delay of the frame synchronous signal, according to the different distances between the switching centre 100 and the respective base stations 141-14n will now be described. The delay detector 230 detects the f rame synchronous signals fed back f rom the respective base stations, on the basis of the nearest base station (i.e., the reference base station) from the switching centre 100. For example, in case the base station 141 is the nearest base station, the buf f er 610 temporarily stores the time of receipt of the frame synchronous signal f ed back f rom. the base station 141. In the meantime, the buffer 620 temporarily stores the times of receipt of the frame synchronous signals fed back f rom the other base stations 142-14n.
The subtracter 630 detects the difference between the signals from the buffers 610 and 620. That is, the subtracter 630 detects a time delay difference between the signal generated from the buffer 620 and the signal generated from the buffer 610. The subtracter 630 calculates the time delay differences between the reference time delay value (output of 610) and time delay values (output of 620) of the respective frame synchronous signals and provides the controller 220 with the calculated time delay differences. The controller 220 allows the transmitter 210 to transmit the time delay values of the frame synchronous signals to the corresponding base stations. Upon receiving the delay values, the respective base stations 141-14n delay the frame synchronous signal if the delay value is negative and shorten the frame synchronous signal if the delay value is positive. In this embodiment of the present invention, an FS adjusting resistor in a CP23030 chip may be used to delay or shorten the frame synchronous signal.
As can be appreciated from the foregoing descriptions, the digital radio communication system of the present invention detects the time delay of the f rame synchronous signal
11 according to the differences in distance between the switching centre and the respective base stations, to compensate for the time delay of the frame synchronous signal, providing a stable call service even while channel switching.
12

Claims (19)

1. A digital radio communication system comprising a switching centre and a base station, in which: the switching centre is adapted to transmit frame synchronous signals to the base station; the base station is adapted to relay the received frame synchronous signal back to the switching centre; the switching centre is further adapted to detect the delay between the frame synchronous signal transmitted to the base station and the frame synchronous signal relayed back from the base station and to transmit the detected delay to the base station; and the base station is further adapted to receive and compensate for the detected delay transmitted from the switching centre.
2. A digital radio communication system according to claim 1 in which the switching centre comprises a delay detector for comparing the time of frame synchronous signal transmission to the base station with the time of receipt of the frame synchronous signal relayed back to determine the said delay.
3. A digital radio communication system according to claim 2 in which the delay detector comprises: a counter; a buffer for storing the counter value at the time of frame synchronous signal transmission to the base station; and a comparator for comparing the counter value at the time of receipt of the frame synchronous signal relayed back with that stored in the buffer, to determine the said delay.
4. A digital radio communication system comprising a switching centre and a plurality of base stations, in which: the switching centre is adapted to transmit frame 13 synchronous signals to the plurality of base stations; each of the base stations is adapted to relay the received frame synchronous signal back to the switching centre; the switching centre is further adapted to detect the delay between the frame synchronous signal transmitted to each base station and the corresponding frame synchronous signal relayed back from it and to transmit the detected delay to the base station in question; and each base station is further adapted to receive and compensate for the respective detected delay transmitted from the switching centre.
5. A digital radio communication system according to claim 4 in which the switching centre comprises a delay detector for comparing the times of receipt of the frame synchronous signal relayed back to it from the respective base stations to determine the respective delays.
6. A digital radio communication system according to claim 5 in which the delay detector comprises: a counter; respective buffers for storing the counter values at the times of receipt of the respective frame synchronous signals relayed back from the base stations; and means for calculating the differences between the stored counter value for a first base station and the stored counter values for the remaining base stations to determine the respective delays.
7. A digital radio communication system according to claim 6 in which the first base station is a nearest base station.
8. A digital radio communication system according to any preceding claim in which each base station includes a delay compensator for compensating for the respective delay.
9. A digital radio communication system according to 14 claim 8 in which the delay compensator is adapted to delay the frame synchronous signal or to shorten the frame synchronous signal as the case may be.
10. A digital radio communication system substantially as described herein with reference to and/or as illustrated in FIGs. 2 et seq. of the accompanying drawings.
11. A method of compensating for frame synchronous signal delays in a digital radio communication system comprising a switching centre and a base station, the method comprising:
transmitting frame synchronous signals to the base station from the switching centre; relaying the received frame synchronous signal back to the switching centre from the base station; detecting the delay between the frame synchronous signal transmitted to the base station and the frame synchronous signal relayed back from the base station and transmitting the detected delay to the base station f rom the switching centre; and receiving and compensating for the detected delay transmitted from the switching centre in the base station.
12. A method of compensating for frame synchronous signal delays according to claim 11 in which the said delay is determined by comparing the time of frame synchronous signal transmission to the base station with the time of receipt of the frame synchronous signal relayed back.
13. A method of compensating for frame synchronous signal delays according to claim 12 comprising: storing in a buf fer a counter value at the time of frame synchronous signal transmission to the base station; and comparing the counter value at the time of receipt of the frame synchronous signal relayed back with that stored in the buffer, to determine the said delay.
14. A method of compensating for frame synchronous signal delays in a digital radio communication system comprising a switching centre and a plurality of base stations, the method comprising: transmitting frame synchronous signals to the plurality of base stations from the switching centre; relaying the received frame synchronous signal back to the switching centre from each of the base stations; detecting the delay between the frame synchronous signal transmitted to each base station and the corresponding frame synchronous signal relayed back from it and transmitting the detected delay to the base station in question from the switching centre; and receiving and compensating for the respective detected delay transmitted from the switching centre in each base station.
15. A method of compensating for frame synchronous signal delays according to claim 14 in which the respective delays are determined by comparing the times of receipt of the frame synchronous signal relayed back from the respective base stations to determine the respective delays.
16. A method of compensating for frame synchronous signal delays according to claim 15 comprising: storing the counter values at the times of receipt of the respective frame synchronous signals relayed back from the base stations in respective buffers; and calculating the differences between the stored counter value for a first base station and the stored counter values for the remaining base stations to determine the respective delays.
17. A method of compensating for frame synchronous signal delays according to claim 16 in which the first base station is a nearest base station.
18. A method of compensating for frame synchronous signal delays according to any one of claims 11-17 in which the 16 detected delays are compensated for in the base stations by delaying the frame synchronous signal or shortening the frame synchronous signal as the case may be.
19. A method of compensating for frame synchronous signal delays substantially as described herein with reference to and/or as illustrated in FIGs. 2 et seq. of the accompanying drawings.
GB9726793A 1996-12-19 1997-12-19 Time delay control of frame synchronous signal Expired - Fee Related GB2321829B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960068172A KR19980049458A (en) 1996-12-19 1996-12-19 Synchronization signal delay detection circuit and method by distance difference between base stations in digital wireless communication system

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GB9726793D0 GB9726793D0 (en) 1998-02-18
GB2321829A true GB2321829A (en) 1998-08-05
GB2321829B GB2321829B (en) 1999-08-04

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DE (1) DE19752945B4 (en)
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US10728867B2 (en) 2016-06-23 2020-07-28 Telefonaktiebolaget Lm Ericsson (Publ) Interval time control for 5G multi-connectivity
WO2018041419A1 (en) 2016-08-29 2018-03-08 Telefonaktiebolaget Lm Ericsson (Publ) Flow control in wireless communication systems
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DE19752945A1 (en) 1998-06-25
GB2321829B (en) 1999-08-04
ITMI972745A1 (en) 1998-06-19
GB9726793D0 (en) 1998-02-18
IT1296859B1 (en) 1999-08-02

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