GB2317975B - System and method for reducing power consumption in an electronic circuit - Google Patents

System and method for reducing power consumption in an electronic circuit

Info

Publication number
GB2317975B
GB2317975B GB9716260A GB9716260A GB2317975B GB 2317975 B GB2317975 B GB 2317975B GB 9716260 A GB9716260 A GB 9716260A GB 9716260 A GB9716260 A GB 9716260A GB 2317975 B GB2317975 B GB 2317975B
Authority
GB
United Kingdom
Prior art keywords
system
power consumption
method
electronic circuit
reducing power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9716260A
Other versions
GB2317975A (en
GB9716260D0 (en
Inventor
Albert J Loper
Soummya Mallick
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to US72639696A priority Critical
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of GB9716260D0 publication Critical patent/GB9716260D0/en
Publication of GB2317975A publication Critical patent/GB2317975A/en
Application granted granted Critical
Publication of GB2317975B publication Critical patent/GB2317975B/en
Anticipated expiration legal-status Critical
Application status is Expired - Fee Related legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0864Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches using pseudo-associative means, e.g. set-associative or hashing
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 – G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 – G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/325Power saving in peripheral device
    • G06F1/3275Power saving in memory, e.g. RAM, cache
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/3004Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043LOAD or STORE instructions; Clear instruction
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802Instruction prefetching
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10Providing a specific technical effect
    • G06F2212/1028Power efficiency
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing
    • Y02D10/10Reducing energy consumption at the single machine level, e.g. processors, personal computers, peripherals or power supply
    • Y02D10/13Access, addressing or allocation within memory systems or architectures, e.g. to reduce power consumption or heat production or to increase battery life
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing
    • Y02D10/10Reducing energy consumption at the single machine level, e.g. processors, personal computers, peripherals or power supply
    • Y02D10/14Interconnection, or transfer of information or other signals between, memories, peripherals or central processing units
GB9716260A 1996-10-04 1997-07-31 System and method for reducing power consumption in an electronic circuit Expired - Fee Related GB2317975B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US72639696A true 1996-10-04 1996-10-04

Publications (3)

Publication Number Publication Date
GB9716260D0 GB9716260D0 (en) 1997-10-08
GB2317975A GB2317975A (en) 1998-04-08
GB2317975B true GB2317975B (en) 2001-09-12

Family

ID=24918440

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9716260A Expired - Fee Related GB2317975B (en) 1996-10-04 1997-07-31 System and method for reducing power consumption in an electronic circuit

Country Status (5)

Country Link
JP (1) JP3048978B2 (en)
KR (1) KR100260865B1 (en)
CN (1) CN1091274C (en)
GB (1) GB2317975B (en)
SG (1) SG64433A1 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69934394D1 (en) * 1999-05-03 2007-01-25 St Microelectronics Sa An apparatus for providing of machine instructions
US20030088799A1 (en) 2001-11-05 2003-05-08 Bodas Devadatta V. Method and apparatus for regulation of electrical component temperature and power consumption rate through bus width reconfiguration

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2297398A (en) * 1995-01-17 1996-07-31 Advanced Risc Mach Ltd Accessing cache memories

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5241680A (en) * 1989-06-12 1993-08-31 Grid Systems Corporation Low-power, standby mode computer
US5452401A (en) * 1992-03-31 1995-09-19 Seiko Epson Corporation Selective power-down for high performance CPU/system
US5420808A (en) * 1993-05-13 1995-05-30 International Business Machines Corporation Circuitry and method for reducing power consumption within an electronic circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2297398A (en) * 1995-01-17 1996-07-31 Advanced Risc Mach Ltd Accessing cache memories

Also Published As

Publication number Publication date
CN1091274C (en) 2002-09-18
SG64433A1 (en) 1999-04-27
CN1180194A (en) 1998-04-29
JP3048978B2 (en) 2000-06-05
GB9716260D0 (en) 1997-10-08
GB2317975A (en) 1998-04-08
KR100260865B1 (en) 2000-07-01
JPH10124203A (en) 1998-05-15
KR19980032289A (en) 1998-07-25

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20050731