GB2314493A - Monitor communicates with computer via serial peripheral interface - Google Patents

Monitor communicates with computer via serial peripheral interface Download PDF

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Publication number
GB2314493A
GB2314493A GB9712847A GB9712847A GB2314493A GB 2314493 A GB2314493 A GB 2314493A GB 9712847 A GB9712847 A GB 9712847A GB 9712847 A GB9712847 A GB 9712847A GB 2314493 A GB2314493 A GB 2314493A
Authority
GB
United Kingdom
Prior art keywords
data
monitor
memory
line
interface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB9712847A
Other versions
GB2314493B (en
GB9712847D0 (en
Inventor
Mun Seob Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
LG Electronics Inc
Original Assignee
LG Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by LG Electronics Inc filed Critical LG Electronics Inc
Publication of GB9712847D0 publication Critical patent/GB9712847D0/en
Publication of GB2314493A publication Critical patent/GB2314493A/en
Application granted granted Critical
Publication of GB2314493B publication Critical patent/GB2314493B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G1/00Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
    • G09G1/06Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
    • G09G1/14Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
    • G09G1/16Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
    • G09G1/165Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/08Arrangements within a display terminal for setting, manually or automatically, display parameters of the display terminal
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00Aspects of data communication
    • G09G2370/04Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Maintenance And Management Of Digital Transmission (AREA)
  • Testing, Inspecting, Measuring Of Stereoscopic Televisions And Televisions (AREA)

Abstract

Picture adjustment data for the monitor is written to or read from the memory 1 built into the monitor by the computer. The written or read data may be displayed. An interface 2, that may be coupled to a serial peripheral port of the computer, e.g the printer port, has a clock line and a data line coupled between the computer and the memory of the monitor. The computer controls the data to and from the memory by serial peripheral interface communication (SPI).

Description

MONITOR COMMUNICABLE WITH PERSONAL COMPUTER The present invention relates to a monitor which is communicable with a personal computer (PC). In particular, the present invention relates to a monitor communicable with a PC, whereby data for controlling a picture display state of the monitor can be written in or read out from a memory provided in the monitor utilizing the PC by implementing an interface between the PC and the memory in the monitor.
Generally, variable resistors have been used in adjusting or controlling the contrast, brightness, horizontal and vertical pulses of the monitor. Recently, a monitor which has a built-in microcomputer for controlling the picture display state of the monitor has been in commercial use. In such a monitor, the picture display state is controlled utilizing control buttons provided on the exterior of the monitor. Also, a panel of light emitting diodes (LEDs) or a liquid crystal display (LCD) is attached to the exterior of the monitor, and thus the input state of control signals for controlling the contrast, brightness, horizontal and vertical pulses and the picture display state being controlled by the control signals are displayed on the panel for convenience in use.
A monitor having an interface between a microcomputer inside the monitor and a PC has been disclosed. On this monitor the picture display state of the monitor, which is controlled by the microcomputer, can be directly displayed on the screen of the monitor utilizing a keyboard of the PC. Accordingly, it is not required to attach an LCD or LED panel, as well as control buttons, to the exterior of the monitor.
However, the conventional monitor communicable with a PC has the drawback that the adjustment or control of the display is not possible, but the information on the display state is displayed on the screen only, enabling the user to recognize the adjusted display state.
It is an object of the present invention to solve the problems involved in the related art, and to provide a monitor communicable with a PC, whereby data stored in a memory provided in the monitor is read out or data is written in the memory utilizing the PC by implementing an interface between the memory and the PC.
In order to achieve the above object, there is provided a monitor communicable with a PC, having preferably a serial peripheral interface (SPI) communication type memory, the monitor comprising an interface provided between the PC and the monitor and having a clock line and a data line, wherein the PC writes data in the memory or reads out the data from the memory through the interface.
The above object, other features and advantages of the present invention will become more apparent by describing the preferred embodiment thereof with reference to the accompanying drawings, in which: FIG. 1 is a block diagram of the monitor communicable with a PC according to the present invention FIGs. 2A and 2B are waveform diagrams illustrating a clock signal and data on a clock line and a data line for SPI communication according to the present invention; and FIG. 3 is a flow chart illustrating the data read/write operation according to the present invention.
Referring to FIG. 1, a memory 1 utilizing SPI communication is installed inside the monitor An interface section 2 having a clock line and a data line is coupled between an I/O port such as a printer port of a controller 3 in the PC and the memory 1 in the monitor. The controller 3 in the PC reads out data stored in the memory in the monitor or writes the data to the memory 1 through the clock and data lines in accordance with the input of a communication mode determining key and a data read/write key inputted through a key input section 4.
Specifically, the interface section 2 includes a first inverter NT1, connected to a printer port pin P2 of the controller 3, for inverting a clock signal outputted from the printer port pin P2 for the control of its clock line. A second inverter NT2 feeds back the clock signal which is transferred to the memory 1 through the inverter NT1 to a printer port pin P15 so that the controller 3 can check the state of the clock line A A third inverter NT3, connected to a printer port pin P3 of the controller 3, inverts data outputted from the printer port P3 for the control of its data line A fourth inverter NT4 feeds back the data which is transferred to the memory 1 through the inverter NT3 to a printer port pin P10 so that the controller 3 can check the state of the data line.
In Fig.l, the numerals Ri to R4 denote pull-up resistors.
The operation of the monitor communicable with the PC according to the present invention as constructed above will now be explained with reference to FIGs. 1, 2A, 2B and 3.
The data for the picture adjustment of the monitor is written to or read out from the memory 1 in the monitor utilizing the SPI communication by the PC. The written or read out data is displayed on the screen of the monitor.
Referring to FIG. 1, in order to read out or write data through the clock line and the data line of the interface section 2, the memory 1 in the monitor is coupled to the controller 3 in the PC. Specifically, the printer port pins P2 and P3 are coupled to the memory 1 in the monitor via the interface section 2.
First, in order to perform communication between the PC and the monitor, the controller 3 in the PC initializes the data line and the clock line of the interface section 2 by switching them to a logic 'high' level (step S1 of FIG. 3) in accordance with the communication mode key signal inputted through the key input section 4, and waits for the key input for the data read/write (step S2 of FIG. 3).
Thereafter, if the key signal for writing the data to the memory 1 or for reading out the data stored in the memory 1 is inputted (step S3 of FIG. 3), the controller 3 determines whether the inputted key signal corresponds to the data read command or the data write command (step S4 of FIG. 3), and produces a start condition for data communication to execute the corresponding routines, respectively.
The start condition is given in a manner that the controller 3 first switches the clock line to a logic 'low' state, and after a predetermined time (for example more than 10us) elapses the controller 3 switches the data line to a logic 'low' level as shown within the period "A" in FIGs. 2A and 2B.
If the key signal for writing the data in the memory 1 is inputted, the controller 3 transfers to and writes in the memory 1 the clock signal and the data through the inverters NT1 and NT3 in the interface section 2 (steps S8 and S9 of FIG. 3). At this time, the clock signal and the data outputted through the inverters NT1 and NT3 are also fed back to the controller 3 through the inverters NT2 and NT4, respectively, and thus the controller 3 checks if the clock signal and the data are normally outputted through the clock line and the data line. Then, the controller 3 writes the data in the memory 1, and displays the contents of the data written in the memory 1 on the screen of the monitor as well (step S10 of FIG. 3).
If the key signal is to read out the data stored in the memory 1, the controller 3 outputs the clock signal to the memory 1 through the inverter NT1, and then receives the data, which is read out from the memory 1 in response to the clock signal, through the inverter NT4 (step S5 of FIG. 3). At this time, the controller 3 also displays the contents of the data read out from the memory 1 on the screen of the monitor (step S6 of FIG.
3).
If the 9th clock is inputted or outputted through the clock line as the data communication is performed between the controller 3 in the PC and the memory 1 in the monitor as described above, i.e. if the clock signal goes to a 'high' level nine times after the start condition is produced, the controller 3 recognizes that transmission/reception of one byte of data is completed as shown within the period "B" in FIGs. 2A and 2B. By repeating the above-described operation, data transmission/reception byte by byte is performed between the controller 3 and the memory 1. At this time, the data which is read out from or written to the memory 1 is displayed on the screen of the monitor by the controller 3. As can be appreciated the present invention allows a user to conveniently control the display state of the monitor through the personal computer without having to play with the external control switches and buttons of the monitor.
If the data read/write operation as above is completed, the controller 3 produces a stop condition for terminating the data read/write operation as shown in the period "C" in FIGs. 2A and 2B.
For example, in the event that the controller 3 in the PC writes data in the memory 1 to the monitor, the controller 3, in order to transmit the data by SPI communication, controls the state of the printer port pins P2 and P3 so that the signals as shown in FIGs. 2A and 2B are provided through the clock line and the data line.
Specifically, if the clock line is to be in a logic 'low' state, the output of the printer port pin P2 goes to a logic 'high', while if the clock line is to be in a logic 'high' state, the output of the printer port pin P2 goes to a logic 'low'. The state of the data line is controlled in the same manner as that of the clock line.
As a result, the user can write data in the memory 1 of the monitor or read-out the data stored in the memory 1 utilizing a PC.
The read out or written data is also displayed on the screen of the monitor for convenience in use.
As described above, according to the present invention, SPI communication is achieved between a PC and a monitor using an SPI communication type memory by constructing an interface between the PC and the monitor. Accordingly, data can be read out from or written to the memory without separating the memory from a printed circuit board of the monitor.
While the present invention has been described and illustrated herein with reference to the preferred embodiment thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the scope of the invention.

Claims (9)

CLAIMS:
1. A monitor having a memory communicable with a personal computer (PC), comprising an interface coupled to the memory and arranged to be communicably coupled to the PC, the interface having a clock line and a data line, wherein the writing of data to the memory or reading of data from the memory is controllable by the PC by a serial peripheral interface communication through the interface.
2. A monitor as claimed in claim 1, wherein the data includes data for adjusting at least one picture display state of the monitor, such as contrast, brightness, horizontal and vertical pulses.
3. A monitor as claimed in claim 1 or 2, further comprising key input means operably connected with the PC, the input means including a communication mode key for establishing a communication mode, a data read/write determining key, and numeral keys for inputting data values for writing the data.
4. A monitor as claimed in claim 1, 2 or 3, wherein the monitor is responsive to the PC to control a display of the data on a screen of the monitor during reading/writing of the data.
5. A monitor as claimed in any of claims 1 to 4, wherein the interface comprises a plurality of inverters for inverting the clock signal, and the data being communicated between the PC and the monitor through the clock line and data line, and for feeding back to the PC the clock signal and the data being transferred to the memory so that the PC checks the state of the clock line and the data line.
6. A system comprising: a personal computer (PC); a monitor having a memory communicable with the PC; key input means connected to the PC and including a communication mode key for establishing a communication mode, a data read/write determining key, and numeral keys for inputting data values; a controller in the PC, for performing serial peripheral interface communication with the memory in accordance with key signals inputted thereto through the key input means; and an interface, coupled between the controller and the memory and having a clock line and a data line, for interfacing between the controller and the memory so that the controller writes the data to the memory or reads out the data stored in the memory.
7. A system as claimed in claim 6, wherein the data includes data for adjusting a picture display state of the monitor such as contrast, brightness, horizontal and vertical pulses.
8. A system as claimed in claim 6, wherein the PC controls to display of the data on a screen of the monitor during reading/writing of the data.
9. A system as claimed in claim 6, wherein the interface comprises a plurality of inverters for inverting the clock signal and the data being communicated between the PC and the monitor through the clock line and the data line, and for feeding back to the PC the clock signal and the data being transferred to the memory, the PC being arranged to check the state of the clock line and the data line from the feedback signals.
GB9712847A 1996-06-18 1997-06-18 Monitor communicable with personal computer Expired - Fee Related GB2314493B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR19960022043A KR100196691B1 (en) 1996-06-18 1996-06-18 Monitor communicated with PC

Publications (3)

Publication Number Publication Date
GB9712847D0 GB9712847D0 (en) 1997-08-20
GB2314493A true GB2314493A (en) 1997-12-24
GB2314493B GB2314493B (en) 1998-12-16

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GB9712847A Expired - Fee Related GB2314493B (en) 1996-06-18 1997-06-18 Monitor communicable with personal computer

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KR (1) KR100196691B1 (en)
CN (1) CN1118017C (en)
BR (1) BR9702416A (en)
GB (1) GB2314493B (en)
ID (1) ID17146A (en)
MX (1) MX9704523A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2321548A (en) * 1996-11-29 1998-07-29 Lg Electronics Inc Monitor to PC communications interface
US6836268B1 (en) 1999-07-31 2004-12-28 Lg Electronics Inc. Apparatus and method of interfacing video information in a computer system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100325759B1 (en) * 1998-04-27 2002-06-26 윤종용 Method for storing screen data of display device having memory
KR20040070559A (en) * 2003-02-04 2004-08-11 엘지전자 주식회사 An display device having recovery function and method thereof

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0456923A1 (en) * 1990-05-14 1991-11-21 International Business Machines Corporation Display system
WO1993006587A1 (en) * 1991-09-20 1993-04-01 Icl Personal Systems Oy A method for controlling a display device in a display system, and a display system and a display device
EP0612053A1 (en) * 1993-02-16 1994-08-24 International Business Machines Corporation Video subsystem for a computer system
WO1995019620A1 (en) * 1994-01-14 1995-07-20 Oakleigh Systems, Inc. Remote control of display functions
GB2291770A (en) * 1994-07-23 1996-01-31 Ibm Display apparatus with data communication channel to control monitor settings
EP0708399A2 (en) * 1994-10-14 1996-04-24 International Business Machines Corporation Apparatus for adding a display data channel to existing display
GB2302489A (en) * 1995-06-15 1997-01-15 Ibm Computer monitor with user-selectable communication protocol

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0456923A1 (en) * 1990-05-14 1991-11-21 International Business Machines Corporation Display system
WO1993006587A1 (en) * 1991-09-20 1993-04-01 Icl Personal Systems Oy A method for controlling a display device in a display system, and a display system and a display device
EP0612053A1 (en) * 1993-02-16 1994-08-24 International Business Machines Corporation Video subsystem for a computer system
WO1995019620A1 (en) * 1994-01-14 1995-07-20 Oakleigh Systems, Inc. Remote control of display functions
GB2291770A (en) * 1994-07-23 1996-01-31 Ibm Display apparatus with data communication channel to control monitor settings
EP0708399A2 (en) * 1994-10-14 1996-04-24 International Business Machines Corporation Apparatus for adding a display data channel to existing display
GB2302489A (en) * 1995-06-15 1997-01-15 Ibm Computer monitor with user-selectable communication protocol

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2321548A (en) * 1996-11-29 1998-07-29 Lg Electronics Inc Monitor to PC communications interface
GB2321548B (en) * 1996-11-29 1999-06-09 Lg Electronics Inc Interface for a monitor communicating with a personal computer
US6243780B1 (en) 1996-11-29 2001-06-05 Lg Electronics Inc. Interface of a monitor communicating with personal computer
US6836268B1 (en) 1999-07-31 2004-12-28 Lg Electronics Inc. Apparatus and method of interfacing video information in a computer system
DE10037370B4 (en) * 1999-07-31 2006-07-27 Lg Electronics Inc. Apparatus and method for adjusting video information in a computer system
US7525540B2 (en) 1999-07-31 2009-04-28 Lg Electronics Inc. Apparatus and method of interfacing video information in a computer system

Also Published As

Publication number Publication date
BR9702416A (en) 1998-09-15
GB2314493B (en) 1998-12-16
KR980004063A (en) 1998-03-30
CN1118017C (en) 2003-08-13
KR100196691B1 (en) 1999-06-15
GB9712847D0 (en) 1997-08-20
MX9704523A (en) 1997-12-31
ID17146A (en) 1997-12-04
CN1172984A (en) 1998-02-11

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Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20090618