GB2313186A - Charge-transfer device for imaging - Google Patents

Charge-transfer device for imaging Download PDF

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Publication number
GB2313186A
GB2313186A GB9609660A GB9609660A GB2313186A GB 2313186 A GB2313186 A GB 2313186A GB 9609660 A GB9609660 A GB 9609660A GB 9609660 A GB9609660 A GB 9609660A GB 2313186 A GB2313186 A GB 2313186A
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Prior art keywords
charge
pixels
active
ctd
sub
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GB9609660A
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GB9609660D0 (en
Inventor
Mark John Riches
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Nac Inc
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Nac Inc
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Priority to GB9609660A priority Critical patent/GB2313186A/en
Publication of GB9609660D0 publication Critical patent/GB9609660D0/en
Priority to PCT/GB1997/001269 priority patent/WO1997043788A1/en
Priority to AU27091/97A priority patent/AU2709197A/en
Publication of GB2313186A publication Critical patent/GB2313186A/en
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/71Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors

Abstract

A charge-transfer device (CTD) 10 for use in particular in high speed imaging apparatus comprises a matrix 12 of pixels, the matrix 12 being divided into a number of 'super pixels' 15. Each super pixel 15 is in the form of a sub-array and is further divided into a plurality of pixels 16. One of the pixels 16 in each sub-array 15 is active, i.e.photo-sensitve, and the remaining pixels (storage pixels) are masked off or non-photo sensitive. In operation, light from the image to be recorded falls on the device 10 and produces in the active pixel 18 of each sub-array 15 a charge packet which is characteristic of the incident light. The charge packets formed in all of the active pixels 18 at a particular instant form a pattern which represents a single frame of the image to be recorded. Clock signals are provided, in response to which the charge packet stored in each of the active pixels 18 is shifted into an adjacent storage pixel, leaving the active pixels free to record another frame. This process is repeated in response to each clock signal, each charge packet being shifted through the sub-array in, for example, a spiral configuration until it reaches the final storage pixel. At this point, the occurrence of another clock signal causes the charge packet to either be read-out or dumped. Thus, a plurality of frames can be stored within the CTD of the present invention, and the readout analogue electronic circuitry required for the present invention is relatively simple, i.e slow scan technology optimised for dynamic range and noise performance. The CTD may be a charge-coupled device (CCD).

Description

CHARGE-TRANSFER DEVICE This invention relates to a charge-transfer device (CTD) and, in particular, a high speed charge-transfer device having a high sensitivity. The invention may be used, for example, in a framing camera for permitting photography of high or ultra high speed events which typically occur over time scales of the order of nanoseconds to milliseconds.
The invention will herein be described with particular reference to chargecoupled devices, since these are widely understood and particularly appropriate for the invention. However, it is to be understood that the invention is not limited to chargecoupled devices. It is considered that a wide variety of charge-transfer devices - herein taken to refer to any device in which charges can be transferred over an array of sites are equally applicable.
Various types of framing cameras are known in the art with speeds of 2,000 to 100,000,000 frames per second. Framing cameras of this type are used for taking pictures of high or ultra high speed events such as lightening and sparks resulting from electrical discharge, or events to be analysed to a high resolution such as in shock waves, fluid dynamics and fuel injection.
An image tube of the type described in European Patent specification no.
O 315 435 can be used in such a framing camera for recording these high speed events.
Generally speaking, the duration of the event which can be recorded by the image tube is inversely proportional to the number of frames per second. Consequently, if the event being recorded is required to be analysed at a high temporal resolution, then the running time of the image tube will be relatively short. In these circumstances, it is necessary to predict the precise timing of the event so the image tube can be triggered to record the event as it occurs.
In practice, the precise timing of events and physical phenomena to be recorded and analysed is often unpredictable. For example, it may be desired to record and subsequently study the characteristics of the early stages of electrical breakdown which occur in lightening. As the precise timing of lightening cannot be predicted, by the time the lightening strike is detected and the image tube triggered, the discharge events immediately preceding the main strike have been missed. A similar situation occurs in the study of plasma streamers prior to breakdown. It is only usually at breakdown itself that the image tube is triggered and so the pre-breakdown stage is missed. Another example is the flow and fracture of aluminium as a ring pull on a drink can is operated.
This type of event is almost impossible to predict, and the pre-fracture stages are usually of most interest.
A previously proposed method of overcoming this problem is to use a film or video camera, having a much slower frame rate and hence poor temporal resolution.
The camera is triggered to start before the event is expected to occur and is run continuously across the event of interest. It is simple to stop the camera once the event has occurred, and wind the film or video tape back to the frames of interest.
However, to record the event of interest, it is usually necessary to run the camera for several seconds and so this method has the disadvantage that a large amount of film or video is used for analysis in order to be sure of capturing the event. This is particularly inefficient and burdensome when it is considered that, in many cases, the critical part of the event to be recorded only lasts for a few frames.
In order to attempt to overcome at least some of the problems associated with the prior art high speed imaging devices, a camera comprising a charge-coupled device (CCD) has been proposed. A CCD is a type of CTD which takes the form of a multiple-gate semiconductor fabricated on a silicon chip as an MOS integrated circuit.
Information is stored by minority carriers as a charge packet in a potential well under a gate electrode at a particular site. The charge can be moved to another gate at a particular site by means of clocked pulses. When such a device is to be used for optical imaging, some of the sites are photo-sensitive. Light falling on these sites produces electron-hole pairs proportional in number to the light intensity. The charge that collects under the gate electrodes is a charge pattern of the incident light which can be transferred to other gate electrodes and then extracted as an analogue signal by clocking of the gate voltages whilst the photo-sensitive sites record a new image. One type of CCD for use in imaging systems generally comprises a matrix of 2048 x 2048 sites, each defining a pixel. In use, a charge packet is produced in each pixel simultaneously so as to produce a single frame of the event in question.
it will be appreciated that many frames can be imaged, read out and recorded per second by the CCD. However, video and film systems can generally only operate at about 100,000 frames per second or less which severely compromises the temporal resolution of the recorded event. The frame rate in the case of a continuous access film camera is limited by the film transport speed. In the case of the CCD camera, the frame rate is usually limited by the readout rate attainable. In addition, the high speed electronic readout circuitry required is complicated and therefore often expensive to manufacture. Furthermore, such circuitry generates excessive electrical noise, which can interfere with the recorded image.
We have now devised a charge-transfer device which seeks to overcome the problems associated with the prior art devices. Thus, in accordance with the present invention, there is provided a charge-transfer device comprising a plurality of active pixels adapted to produce a charge pattern in response to incident light, and a plurality of non-active pixels, a respective group of the said non-active pixels being associated with each active pixel, the device being arranged such that a charge packet formed in an active pixel can be shifted sequentially from the active pixel to each non-active pixel within its associated group. The CTD may be a CCD.
Preferred features of the invention are set out in the appended claims.
Thus, the non-active pixels act as storage pixels for receiving a charge pattern from the associated active pixel, leaving the active pixels free to record another charge pattern. Each shift of the charge packets stores a complete new frame.
The charge patterns are preferably shifted at intervals, for example in response to a clock signal, to each of the non-active pixels before being read out or dumped.
The charge pattern formed by the charge packets produced in all of the active pixels together in response to a single clock signal form one frame of the event of interest.
Thus, several frames can be stored in the charge-transfer device at any one time, thereby enabling the frames to be read out relatively slowly at the end of the image capture period. The readout may be sequential, in parallel, or a combination of both.
The plurality of active pixels are preferably substantially evenly dispersed across a surface of the CTD. The charge-transfer device may comprise a two-dimensional array of pixels, the array being split into a plurality of groups of pixels. Each group of pixels preferably includes at least one active pixel and several non-active pixels. One type of standard CTD comprises a two-dimensional array of 2048 x 2048 pixels. In the case of the present invention, such an array could be split up into 256 x 256 'super pixels', each of which could be defined by a sub-array of 8 x 8 pixels each. Each subarray preferably comprises a single active pixel, the remaining 63 pixels being masked off or non light-sensitive. However, two or more active pixels could be included in each sub-array.
In use, a clock signal is generated to advance the charges stored in the pixels by one pixel. This frees the active pixels to capture the next frame. More specifically, the charge packet formed in each active pixel is shifted, in response to a clock signal, to an adjacent storage pixel, and a new charge packet is formed in the active pixel. In response to another clock signal, the charge packet stored in the adjacent storage pixel is shifted to a second non-active pixel, the charge packet currently stored in the active pixel is shifted to the adjacent non-active pixel, leaving the active pixel free to form another charge packet. This process is repeated in response to each clock signal such that each charge packet is shifted through the sub-array until it reaches the final storage pixel. At this point, another clock signal will cause the charge packet stored in the final storage pixel to be dumped or deposited into the read-out structure.
It will be evident from the above description that it is possible to store several frames of an event within the CTD of the present invention, such that the stored frames can be read out using a slow scan technique. In the case of the specific example given above, up to 64 frames of an event can be stored at any one time in a single CTD.
Thus, a relatively high frame rate can be achieved, because several frames can be recorded and then stored in quick succession, but the information can be read out using slow scan techniques. For instance, if the device is arranged to receive a clock signal every 1 ps, the frame rate will be 1,000,000 frames per second. Even if the clock signals are 2 s apart, the resultant frame rate will be 500,000 frames per second.
In the specific example described above, the active pixel of each sub-array may be situated at a generally central position in the sub-array. The charge packets may be shifted around the sub-array in.a generally spiral configuration towards a final storage pixel situated at the periphery of the sub-array. Alternatively, the charge packets may be shifted from one side of the sub-array to the other in a zig-zag configuration. In fact, there are few constraints as to the configuration in which the charge packets are shifted sequentially from the active pixel to the final pixel. This will depend primarily on individual requirements and applications, as well as the shape and size of the sub-array, and the practicalities of CCD fabrication.
The charge packets output from each of the sub-arrays may be fed into a conventional horizontal or vertical line of pixels, which in turn deposits its charge into a conventional readout register at the top, bottom or side of the CTD. Thus, the CTD of the present invention need only have one actual output, as all of the stored data can be shifted sequentially at slow scan speed out of this port. During this or any other time, the device can run continuously, with the stored frames providing a post-triggering retrieval capability.
Embodiments of the present invention will now be described by way of example only and with reference to the accompanying drawings, in which: Figure 1 is a schematic view of a CTD according to a first embodiment of the present invention; and Figure 2 is a schematic view of a CTD according to a second embodiment of the present invention.
Referring to Figure 1, A CTD 10 according to a first embodiment of the present invention comprises a matrix 12 of 2048 x 2048 pixels. The CTD is a CCD, but other types of CTD could be used. The matrix 12 is divided into 256 x 256 'super pixels', each 'super pixel' consisting of a sub-array 15 comprising 8 x 8 (64) normal pixels or sub-pixels 16. Each sub-array 15 includes only one active photo-sensitive pixel 18.
The remaining 63 pixels (storage pixels 19) are masked off from incident light or are not photo-sensitive. The pixel size of this CCD is envisaged as being around 9 to 22 calm. However, this is not essential and is merely convenient in view of currently available technology.
In use, incident light from the image to be recorded falls on the device 10 and produces in the active pixel 18 of each sub-array 15 a charge packet characteristic of the incident light. The charge packets formed in all of the active pixels at a particular instant form a single frame of the image of interest.
Clock signals are provided, each signal being arranged to cause each charge packet to shift to an adjacent pixel in response thereto. In a preferred embodiment, the pulses are provided at the desired frame rate, i.e. in this embodiment at a frequency of 1,000,000Hz (i.e. every 1 ps) or 500,000 Hz (i.e. every 2 ills).
For simplicity, the operation of this CCD device will now be described with reference to a single sub-array 15 consisting of 64 (i.e. 8 x 8) pixels. However, it will be appreciated that the operation within each sub-array of 64 pixels is substantially the same and takes place substantially simultaneously.
In response to a clock signal, the charge packet currently in the active pixel is shifted to the adjacent pixel 20 and stored, and a new charge packet is produced and stored in the active pixel. In response to another clock signal, the charge packet in each of the occupied pixels is shifted to a pixel adjacent thereto and stored. The above process is repeated every 1 s (or 2 lls) until all of the pixels are occupied.
In the example shown in Figure 1, the active pixel 18 is situated at a generally central position within the sub-array 15. The charge packets are shifted around the matrix 15 in a spiral-type direction as indicated by the arrow, until all of the pixels are occupied.
In response to the next clock signal, the charge packet stored in the 64'h pixel 22 must either be dumped or read out in order to create space for the rest of the charge packets to be shifted. At the read out the charge packets output from each of the subarrays can be fed into a conventional horizontal or vertical line, which in turn deposits its charge into a conventional readout register at the bottom, top or side of the CCD.
The CCD need only have one actual output as all of the stored data can be shifted sequentially at slow scan speed out of this port. For example the 64th pixels could be adapted to dump their charge packets or shift them into a readout line or pixel. The readout pixel could be made large enough to integrate or sum many of the high-speed frames into one 'slow' frame for the live access at, say, 50 Hz Whilst the image is being shifted in this way, further images are dumped at the 64'h pixels.
A stop trigger pulse is used to start or stop the capture process. For example, it may be programmed to start the capture of 64 frames, mark the point at which, say, the preceding 64 frames should be captured, or mark a point at which the preceding 32 frames and the next 32 frames should be captured. This can be determined by the user.
The output of the CCD could be sub-sampled in real time to give a live mode at 50/60 Hz (or faster). In other words, the camera could output information onto a tape or into a RAM at 500 frames per second but, upon a clock signal, the camera could read out the 64 backed up frames which were taken at 50,000 frames per second or even 500,000 frames per second before the trigger.
Since a charge packet can be created every 1 ills or even faster, a frame rate of up to 1,000,000 frames per second is attainable. Even if the clock signals are 2 s apart, the frame rate will be 500,000 frames per second.
The active pixel may be made larger than the other 63 pixels in a sub-array and have a relatively shallow electron well. In this case, the remaining pixels would taper to a geometrically smaller size, but have deeper electron wells so as to maintain full well capacity. Alternatively, the well depths of all of the pixels could be substantially the same, in which case the full well capacity of the imaging pixel should be adjusted, so as not to over-fill the smaller storage pixels - which would lead to blooming of the image. This can be achieved by the provision of anti-blooming gates. This option offers independent gating mode for the CCD. The normal exposure provided by the device is (1/ frame rate). The anti-blooming gate should allow the exposure to be reduced beyond this down to a fundamental limit. In other words, the provision of gated anti-blooming gates on the active pixel gives electronic exposure control, down to the order of 1 s or less even at slow frame rates.
By utilising the techniques described above, it is possible to maximise the ratio of imaging to storage pixel area and hence significantly improve the fill factor. The increase in fill factor resulting from a reduction in storage pixel area enables the CCD die size to be reduced, thereby significantly reducing the cost and increasing the apparent CCD sensitivity.
Furthermore, it is possible to store 64 frames of an image before it is necessary to start reading out the information. Consequently the recorded information can be read out slowly afterwards. This enables slow scan, low noise electronic readout circuitry to be used, and the CCD may even be cooled. Therefore, a high dynamic range may be achieved (14 to 16 bits or more) giving a very high apparent sensitivity to the user.
The readout analogue electronic circuitry required for the present invention is relatively simple: slow scan technology optimised for dynamic range and noise performance.
The resultant device exhibits not only a high spatial resolution, but also a high temporal resolution (on demand).
The sensitivity of the device may be further improved by the provision of a lens over each of the sub-arrays to concentrate the available light into the active pixel. In fact, colour may be added with a combined micro-lens array and colour filters, possibly even user-switchable between monochrome and colour.
Referring now to Figure 2 of the drawings, an alternative embodiment of the present invention is shown, in which each active pixel 18 is situated in a corner of a respective sub-array 15. Each charge packet is shifted through the sub-array in a zigzag configuration (as indicated by the arrow) to the final pixel 22, where the charge packet is either dumped or read out.
Of course, it will be appreciated that the charge packets may be shifted through the device using a number of configurations. For instance, a number of active pixels may situated adjacent each other, and the non-active pixels may radiate from the respective active pixel, in a horizontal, vertical or diagonal direction. Alternatively, an interlaced linear arrangement may be used. Another alternative is a nested arrangement, for example wherein each sub-array includes two active pixels which are adjacent each other and are situated in a generally central position on a surface of the CTD. The charge packets may be transmitted to two associated non-active pixels which are adjacent each other and situated at a point at or adjacent the periphery of the CTD, by shifting the charge packet through a series of non-active pixels in a nested spiral configuration, for example. The CTD may even be three-dimensional: the active pixels may cover one or more of the surfaces of a three-dimensional CTD, and the associated non-active pixels could be buried within the three-dimensional CCD.
A CTD according to the present invention could be coated with a fluorescent material, or backthinned with appropriate masking at the storage pixels for uV, x-ray or other spectral sensitivity. It could also be applied to cadmium-telluride (infra-red cameras).
While the present invention has been described in terms of a device which provides an output of 64 frames at a 256 x 256 resolution, it will be appreciated that the CTD of the present invention may be split into any convenient groups of pixels. For instance, the device may be arranged to provide 32 frames at a 512 x 256 resolution.
Furthermore, it will be appreciated that the CTD need not be split into generally square or rectangular sub-arrays. Each sub-group of pixels may be arranged in any convenient manner.
Other sizes of CTD may, naturally be used, e.g. 4K x 4K pixels or very small devices.

Claims (22)

CLAIMS:
1 A charge-transfer device (CTD) comprising a plurality of active pixels adapted to produce a charge pattern in response to incident light and a plurality of non-active pixels, a responsive group of the said non-active pixels being associated with each active pixel, the device being arranged such that a charge packet formed in an active pixel can be shifted sequentially from the active pixel to each non-active pixel within its associated group.
2. A charge transfer device according to claim 1 which is a charge-coupled device (CCD).
3. A CTD according to claim 1 or 2, wherein the said active pixels are arranged in a two-dimensional array.
4. A CTD according to claim 1 or 2 or 3, wherein the said plurality of active pixels are substantially evenly dispersed across a surface of the CTD.
5. A CTD according to claim 3 or 4, wherein the said two dimensional array is divided into a plurality of sub-arrays, each sub-array including at least one of the said active pixels and its associated group of non-active pixels.
6. A CTD according to claim 5, wherein at least one active pixel is situated generally centrally in each sub-array, and the charge packet is shifted sequentially to each non-active pixel in a generally spiral configuration from said generally central position to the periphery of the sub-array.
7. A CTD according to claim 5, wherein at least one active pixel is situated at or adjacent one edge of each sub-array, and the charge packet is shifted sequentially to each non-active pixel in a generally zig-zag configuration from said one edge to the opposite edge of said sub-array.
8. A CTD according to any of claims 1 to 6, comprising means for producing a clock signal, in response to which the charge packets are shifted.
9. A CTD according the any preceding claim, wherein each non-active pixel is in the form of a masked photo-sensitive pixel.
10. A CTD according to any preceding claim comprising a readout register into which each charge packet is deposited after it has been shifted to each non-active pixel associated with the active pixel in which it was produced.
ii. A CTD according to claim 10, when dependent on claim 5, wherein the charge packets output from each of the sub-arrays are fed into a horizontal or vertical line and subsequently deposited into said readout register.
12. A CTD according to claim 5 or any claim dependent thereon, comprising a lens positioned over each sub-array.
13. A CTD according to 11, further comprising slow scan electronic analogue readout circuitry.
14. A CTD according to any preceding claim comprising cooling means.
15. A CTD according to any preceding claim comprising a colour filter situated over a light receiving surface of one or more of the active pixels.
16. A CTD according to claim 15, wherein different active pixels are provided with filters of respective different colours.
17. A CTD according to any preceding claim, configured to run continuously, until a trigger signal is received, when a plurality of charge packets that have been sequentially produced in the active pixels can be retrieved from the non-active pixels.
18. A high speed imaging device including a CTD according to any preceding claim.
19. A method of high speed imaging comprising the steps of: a) providing a charge-transfer device according to any of claims 1 to 17; b) forming a charge packet in each active pixel to produce a charge pattern characteristic of the image to be recorded; c) shifting said charge packet to one of the said non-active pixels in the group associated with the active pixel; and d) subsequently forming another charge packet in each active pixel to produce a further charge pattern characteristic of a further image to be recorded.
20. A method according to claim 19, further comprising the step of providing a clock signal, in response to which a stored charge pattern is shifted, and a new charge pattern is formed.
21. A charge-transfer device substantially as hereinbefore described with reference to the accompanying drawings.
22. A method of high speed imaging substantially as hereinbefore described with reference to the accompanying drawings.
GB9609660A 1996-05-09 1996-05-09 Charge-transfer device for imaging Withdrawn GB2313186A (en)

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Application Number Priority Date Filing Date Title
GB9609660A GB2313186A (en) 1996-05-09 1996-05-09 Charge-transfer device for imaging
PCT/GB1997/001269 WO1997043788A1 (en) 1996-05-09 1997-05-09 Charge-transfer device
AU27091/97A AU2709197A (en) 1996-05-09 1997-05-09 Charge-transfer device

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GB9609660A GB2313186A (en) 1996-05-09 1996-05-09 Charge-transfer device for imaging

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US9462202B2 (en) 2013-06-06 2016-10-04 Samsung Electronics Co., Ltd. Pixel arrays and imaging devices with reduced blooming, controllers and methods
US9979905B2 (en) 2015-11-17 2018-05-22 Microsoft Technology Licensing, Llc. Multimode photosensor

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2140651A (en) * 1983-05-24 1984-11-28 Christopher John Morcom Ccd image sensor with variable intergration time
GB2262383A (en) * 1991-12-09 1993-06-16 Sony Broadcast & Communication Charge-coupled image sensor

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR930005746B1 (en) * 1990-10-13 1993-06-24 금성일렉트론 주식회사 Zigzag interline type solid state imager
DE4120623A1 (en) * 1991-06-22 1993-01-07 Fraunhofer Ges Forschung Streak camera with semiconductor image memory - has CCD memory with semiconductor stores dischargeable during clock period and has read=out memory
DE4243116A1 (en) * 1992-12-21 1994-07-07 Fraunhofer Ges Forschung Image prodn. using recorder with discrete pixel semiconductor memory
EP0704131B1 (en) * 1993-06-16 2001-07-18 Cambridge Imaging Limited Imaging system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2140651A (en) * 1983-05-24 1984-11-28 Christopher John Morcom Ccd image sensor with variable intergration time
GB2262383A (en) * 1991-12-09 1993-06-16 Sony Broadcast & Communication Charge-coupled image sensor

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WO1997043788A1 (en) 1997-11-20
GB9609660D0 (en) 1996-07-10

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