GB2306247A

GB2306247A - semiconductor device

Info

Publication number: GB2306247A
Application number: GB9617989A
Authority: GB
Inventors: Donald Dominic Arnone; Charles Smith; Jeremy Henley Burroughes; Marcus Quierin
Original assignee: Toshiba Cambridge Research Centre Ltd
Current assignee: Toshiba Europe Ltd
Priority date: 1995-10-16
Filing date: 1996-08-29
Publication date: 1997-04-30
Anticipated expiration: 2016-08-29
Also published as: GB9617989D0; GB9800297D0; GB2319892B; GB2306247B; GB2319892A

Abstract

An electro-optical semiconductor resonant tunneling device structure which can be configured to detect electro-magnetic radiation comprises a highly doped first terminal 3 formed on the upper surface of a semiconductor substrate 1. A gate 7, is formed overlying the first terminal 3. A pit is etched into the gate 7, and a plurality of layers are formed overlying the relief of the patterned base layers 13. The gate 7 surrounds the layers though which transport occurs. A second terminal 31 is formed overlying the structure. To enhance a detected electro-magnetic radiation signal coupling means such as an antenna or a diffraction grating 33 are provided. The device can be configured as an electro-optical memory when used in conjunction with a LED on a laser with a coupling waveguide (117) to excite carriers into trapped states in the quantum well (figure 9).

Description

Radiation Detector The present invention relates to an optical semiconductor device structure. The present invention specifically relates to a radiation detector and an optical interconnect which can be configured to operate as a detector of electromagnetic radiation or as an optical read/storage device.

Over the last two decades there has been much interest in semiconductor devices which operate by restricting the motion of the carriers in one or more directions, so called low dimensional devices. In such a low dimensional device the carriers can only occupy a discrete set of energy levels or subbands in one or more dimensions. The motion of the carriers is said to be quantised in the direction of confinement. A common method for achieving this confinement in one direction is realised by joining together two semiconductor compounds of differing band-gaps, a so called heterojunction. Here, the carriers are confined to a potential or quantum well. A two dimensional electron gas (2DEG) is formed if the carriers are electrons and a two dimensional hole gas (2DHG) if the carriers are holes.The term two dimensional for the purpose of this document will be used to describe a system where there is some degree of quantisation in one direction, it will not only relate to the case where the carriers are confined to a single energy subband. Similarly the terms one dimensional and zero dimensional will be used to relate to a carrier system where there is some degree of quantisation in two dimensions and three dimensions respectively. To further clarify the terminology that will be used in this document, a heterojunction is the junction formed between a barrier layer (which may comprise a plurality of layers) and an active layer. The active layer is taken to be where the quantum well is formed.

In the present invention, carriers are injected across barriers and a low dimensional system interspersed between the barriers As a detector for electro-magnetic radiation.

the basic device structure is that of a resonant tunnelling diode. The resonant tunnelling diode was first realised by L. L. Chang et al. Appl. Phys. Lett., 24 595 (1974). The conventional resonant tunnelling device is in the form of a diode, although the terminals are often called the 'collector' and the 'emitter' Typically, the device comprises a quantum well layer (e.g. GaAs) on either side of which is located a respective barrier layer (e.g. AlGaAs). There is an enhancement of the tunnelling current through the device if a carrier on the opposite side of the barrier (the emitter) to the confined state has the same energy as an energy level in the confined state. This mechanism is known as resonant tunnelling.This can be used to effectively detect electro-magnetic radiation as carriers in the emitter are excited by the incident radiation to a level where they can resonantly tunnel or by a secondary mechanism where they are excited over the barrier.

Rectification of high frequency waves to produce a DC voltage is also a possible detection mechanism.

Since tunnelling is a very fast mechanism of charge transport, resonant tunnelling devices offer the potential of extremely high speed operation. They have been described as oscillators (e.g. T.C.L.G Solineretal. Appl. Phys Lett., 45 1319 (1984)) and switches (e.g. S. K. Diamond et al. Appl. Phys Lett., 54 153 (1989)). Oscillation frequencies up to 712 GHz have been reported. These devices can be used to detect a wide range of optical frequencies, even up to the infrared bands.

For production of a good RTD, optimisation of the tunnelling peak characteristics are required. A large difference between the magnitude of the tunnelling current on resonance and off resonance, termed the peak to valley ratio, is required. A fast operating speed also requires a narrow tunnelling peak, i e. a small voltage range over which resonant tunnelling occurs. In two terminal devices it is only possible to tune these characteristics by the fabrication of the structure i.e. variation in the growth materials, conditions etc. A three terminal device allows these properties to be tuned after the device is fabricated.

In a device according to the present invention, the number of carriers in the confined state can be varied by the emitter/collector bias. A gate is provided to independently vary the spacing of the energy levels in the confined state. This fine and independent control over the device is obtained by the novel design of the embedded side gate. This allows the operation frequency of the device to be finely tuned.

A three terminal resonant tunnelling diode, with many similar characteristics to the present invention has been presented in Quierin et al. (1995) Material Science and Engineering B35 p198 (1995) Vol. and Quierin et al. (1996) Appl. Phys. Lett. 68, (18 March 1996). This device does not contain coupling means and is not configured for optical detection or described as suitable for that application.

The coupling means are provided for coupling the incident radiation to the confined area of the device. The coupling means may comprise an antenna. The structure presented in the above papers also suffers from the problem that there is no provision made to rotate the plane of the polarisation vector of the incident radiation which in some cases may be critical to the operation of the device. This can be achieved if the coupling means comprises a diffraction grating either instead of or combined with the antenna means. The coupling means may also extend to an optical interconnect or waveguide which could couple electro-magnetic radiation directly from another component in the circuit. The component for example could be an LED or Laser. The interconnect may also be adapted to carry an electro-magnetic signal from a thermal source.

Thus in a first aspect, the present invention relates to a semiconductor device comprising a semiconductor substrate, mutually separated first and second barrier layers, a quantum well layer, first and second terminals, an embedded gate for defining a confinement region and coupling means for coupling electro-magnetic radiation to the said confinement region.

For the avoidance of doubt as used herein the term 'embedded gate' will be taken to mean a gate which is not provided on the surface of the device as a separate layer. The terms, first terminal and second terminal relate to the emitter and the collector of the device, the terms emitter and collector can be used interchangeably as reversing the bias applied to the emitter will result in the transfer of carriers from the collector to the emitter. The term barrier layer will relate to a layer which has a higher band-gap than the band-gap of the active layer. For example, if the active layer is GaAs then the barrier layer may be conveniently formed from AlGaAs or AlAs.

The coupling means may comprise antenna means and/or grating means. The grating means provided to rotate the plane of polarisation of the incident radiation. The grating means may be provided on either the top surface of the structure or the lower surface of the substrate. It is preferable if the grating is provided close to the confinement region on the upper surface of the structure.

To fabricate the structure with the embedded gates it is preferable if the gate can be fabricated so that it surrounds the confinement area of the active layer. A convenient method of fabricating this structure is realised if the confinement region of the device is located in a recessed region of the device.

With this recessed form of construction, the antenna means can extend into the recessed region. Such antenna means may comprise a pair of substantially triangular members for impedance matching (in the manner of a microwave microstrip). The apex of the triangular members can extend into the recessed region. These triangular features can be, for example, in the form of an equilateral or isosceles triangles. Other forms of matched antenna are possible, for example a log periodic structure (i.e. in the manner of a low frequency Yagi antenna) The first terminal is embedded into the device, therefore it is most convenient from a fabrication point of view if the first terminal comprises a highly doped semiconductor layer. A highly doped layer will also have the advantage that it is fairly simple to make a good ohmic contact to it.It is also advantageous from a fabrication point of view if the second terminal also comprises a highly doped semiconductor layer. Highly doped layers are essential for high speed operation and detection at high frequencies.

It is also preferable from a fabrication point of view if the embedded gate comprises a highly doped semiconductor layer. It is more preferable for ease of making independent contacting and to minimise leakage currents if the embedded gate is of an opposing conductivity type to the first and second terminals.

It is preferable in many cases for the quantum wells not to be strained. This is possible in a device according to the present invention wherein the quantum well is formed in a semiconductor layer which possesses a similar lattice constant to the lattice constant of the adjacent semiconductor layers. For the avoidance of doubt as used herein this document, two layers which possess 'similar lattice constants' are defined to be two layers which possess lattice constants which are very close to each other or one lattice constant is close to an exact multiple of the other lattice constant.

In many cases the device performance may be enhanced if the device comprises multiple quantum wells and multiple barriers. The advantage of such a multiple well structure is that dc non-linearities increase, these result in larger changes in the current when the carriers are excited by radiation. This is possible in a device according to the present invention wherein the device further comprises a plurality of quantum well layers interspersed between the first and second terminals in the confinement region and said plurality of quantum well layers are separated by further barrier layers.

In many cases it may also be preferable to minimise the confinement region so that there is some degree of quantisation in the directions perpendicular to growth. The device could become a zero dimensional tunnelling structure. This extra quantisation is necessary when the structure is configured as an optical storage device.For such quantisation it is preferable that the confined area perpendicular to the growth direction is of the order of 1 um2 for example less than 4um2 This is possible in a device according to the present invention wherein said confinement region has an area perpendicular to the direction of growth of less than 4pm2 In order to increase the signal detected by a device according to the present invention it is advantageous if there is an array of such detectors, this can be easily achieved in a device according to the present invention wherein the embedded gate is a plurality of embedded gates defining a plurality of confinement regions. This is a particularly convenient method of producing an array of detectors as all devices share a common first and second terminal.It is possible in such an array to configure the plurality of embedded gates to act independently of one another or as a single gate for the plurality of confinement regions.

An optical interconnect may also comprise the coupling means. The use of an optical interconnect will allow information to be transmitted from one electrical transistor to another optically, with the resonant tunnelling diode acting as a converter to turn the photon signal back into an electrical signal.

Optical interconnects may be formed by epitaxial growth and standard processing techniques.

A read/write optical device may be formed by coupling the detector described previously to the output of a structure which emits electro-magnetic radiation, e.g. a LASER or LED, the coupling means being provided by an optical interconnect.

It is also possible to realise an optical storage device by such a structure. If the confinement region is small enough to allow zero dimensional states to be formed in the confinement region. Due to the zero dimensional nature of the dot charge will be stored in the quantum dot therefore the device will act as an optical storage/memory device.

The possibility of engineering the properties of the dot after fabrication means that optical read and optical storage device may be combined in the same device. The confinement region may be squeezed by applying a bias to the gates. Therefore a device may be fabricated which can alternate between optical read and optical storage functions by applying a bias to the side gates. Thus forming an optical read/storage memory device.

It is preferred that the optical read/storage device is used in an array of such devices, where each detector may have its own optical input. Such an array of devices may be formed by the embedded gate being a plurality of embedded gates defining an array of confinement regions. The plurality of embedded gates may act independently of one another or as a single gate for the plurality of confinement regions. Thus complex information may be transmitted optically from one array of transistors to another. The optical signal may then be stored or converted into an electrical signal.

In may cases it is preferable if the present invention further comprises an Electromagnetic source. A source which may be conveniently coupled to the present invention comprises mutually separated first and second barrier layers, a quantum well layer, first and second terminals and an embedded gate for defining a confinement region. This source may be operated by applying a bias between the first and the second terminals such that photons are emitted from the source. The similarities in the structure between the source and the present invention allow the source and the present invention to be fabricated as a single device.

Of course the electro-magnetic signal which is coupled to the device may not only be produced by a Laser or LED. Electro-magnetic radiation from thermal sources may also provide the optical input for such a structure. The radiation which is to be coupled to the detector may also be controlled by electro-optic modulators.

To minimise losses it is preferable if the optical interconnect is formed from a single crystal. Thus, in a second aspect the present invention relates to an optical interconnect comprising a single continuous crystal, wherein said crystal comprises a transmission section. a cladding section and input and output surfaces, wherein the transmission section is surrounded by the cladding section on all sides except for the input and output surfaces.

The transmission section must have low optical loss at the given frequency.

To minimise losses, the said cladding section should preferably have a higher conductivity at a predetermined operation frequency than the said transmission section.

For the cladding section and the transmission section to be formed as a single continuous crystal, it is preferable if the lattice constant of the material which forms the transmission section is similar to the lattice constant of the material which forms the cladding section. The optical interconnect may be conveniently formed using an epitaxial growth technique such as Molecular Beam Epitaxy.

The transmission section of the waveguide may be conveniently provided by undoped GaAs and the cladding section may be formed by n-doped GaAs, for example, n-GaAs with a Silicon doping density of at least lxl0'8cm~3 This optical interconnect is of particular use in the Infra red and microwave regime.

Therefore an Infra red source, detector and optical interconnect can be fabricated as a single device.

The present invention will now be explained in more detail by reference to the following non-limiting preferred embodiments and with reference to the accompanying drawings, in which Figure 1 Cross section of a device according to a first aspect of the present invention after a first etch step; Figure 2 Plan view of a device according to a first aspect of the present invention as shown in Figure l; Figure 3 Cross section of a device according to a first aspect of the present invention as shown in Figure 1, after a second growth step; Figure 4 Plan view of a device according to a first aspect of the present invention as shown in Figure 3; Figure 5 Schematic band structure of a device according to a first aspect of the present invention; and Figure 6 Cross section of an array of semiconductor devices according to a first aspect of the present invention.

Figure 7 Cross section of a device according to a first aspect of the present invention configured as an optical read/storage device.

Figure 8 Schematic band structure of a source which may be conveniently used with the present invention; and Figure 9 Cross section of a device according to a first aspect of the present invention configured as in Figure 7 with a specific source structure.

Initially describing the device structure with reference to Figure 1. An n-GaAs layer, the collector layer 3, is formed on an upper surface of an undoped or semi-insulating GaAs substrate 1, so that the collector layer 3, is in contact with and adjacent to the semiconductor substrate. An undoped GaAs first buffer layer 5, is then formed adjacent to and in contact with the upper surface of the collector layer 3. On an upper surface of the undoped first buffer layer 5, a p-type doped layer of GaAs is provided as a gate 7.

The gate 7 is adjacent to and in contact with the first buffer layer 5. The first growth is finished with an undoped layer of GaAs, the second buffer layer 9, this is formed on the upper surface of the gate 7, so that it is on contact with and adjacent to the gate 7.

The structure as described above is then etched with an angle selective etch such as a buffered hydrofluoric and hydrogen peroxide based etch. Such an etch produces oblique facets at the sidewalls of the layers 11. Such an angled sidewall is necessary to achieve uniform growth in the subsequently grown layers. The structure is patterned by this etch into a circular structure as shown in Figure 2 so that the side gate 7 totally surrounds the etched pit. The etch extends down to the collector 3, so that the collector 3 forms the base of the etched pit. The substrate and the layer previously grown form the patterned base layers 13.

Figures 3 and 4 show the structure after a second growth. Initially referring to Figure 3, a plurality of semiconductor layers, the active region 15, is formed on top of the patterned base layers 13. An undoped GaAs third buffer layer 21, is formed on the upper surface of the patterned base layers 13, so that it is in contact with the upper surface and an etched sidewall of the second buffer layer 9, an etched sidewall of the gate 7, and an etched sidewall of the first buffer layer 5. This third buffer layer 21, follows the relief of the etched patterned base layers 13. A thin undoped AlGaAs first barrier layer 23 is then formed on the upper surface of the third buffer layer 21, so that the first barrier layer is adjacent to and in contact with the third buffer layer 21. This is then followed by an undoped thin GaAs active layer 25, this is where the quantum well is formed.The active layer 25, is formed on an upper surface of the first barrier layer 23, so that the active layer 25, is in contact with and adjacent to the first barrier layer 23. A second AlGaAs barrier layer 27 is then formed on the upper surface of the active layer 25, so that it is in contact with and adjacent to the active layer 25. A fourth undoped GaAs buffer layer 29 is then formed adjacent to and in contact with the upper surface of the second barrier layer 27. The fourth buffer layer completes the active region 15. To finish the structure an emitter layer 31 is formed adjacent to and in contact with the upper surface of the fourth buffer layer 29. The emitter layer 3 1 is in this case an n doped GaAs layer. This finishes the layers of the second growth.

Figure 4 shows a plan view of the structure, the diagram is not to scale. The emitter 3 1 extends over the whole structure. On predefined regions of the emitter 3 1, a metal layer is provided to form an antenna 33. The antenna 33 is shaped so that it extends into the recessed region of the etch pit. Alternatively a grating may be used instead of an antenna.

The operation of the device is essentially that of a resonant tunnelling diode, Figure 5 shows a very schematic band structure of the device. It is required that electrons are injected from the emitter 41 to the collector 43 across the first 45 and second 47 barriers. An electron in the emitter 'can cross the second barrier 47 in one of two ways, incident radiation may allow the electron have the same energy as one of the confined states 51 in the quantum well 49. When this happens the electron can resonantly tunnel through the barriers 45 and 47. Alternatively the electron may gain enough energy from the incident radiation to completely overcome the barriers 45 and 47, this secondary mechanism is a much weaker effect. The electron is then swept to the collector by the emitter/collector bias. Either of these effects form a detection mechanism.Another mechanism is DC rectification of the optical signal.

Changing the emitter collector bias will result in a change of the 'back-ground slope 53, of the diagram this directly effects the number of electrons in the dot and hence the intensity of the detected signal. The gate (7 in Figures 1 to 3) surrounds the confined active layer and effects the energy spacing of the levels in the quantum well 51, thus tuning the frequency of the radiation which can be detected. In addition, the emitter charge may accumulate in front of the second barrier 47, and the gate may lower the dimensionality of charge in this region and affect the tunnelling current. Therefore in such a structure the tunnelling current and the frequency of radiation which can be detected can be varied independently.

To amplify the detected signal it may be advantageous to fabricate an array of such structures. A possible arrangement of this is shown on Figure 6. This structure is fabricated by forming the structure described with reference to figures 1 to 3. The patterned base layers 13 are patterned into a series of circular etch pits. The active region 15 is then formed on the upper surface of the patterned base layers 13 An emitter 31 is formed on the surface of the active region 1 5. It can be seen that such an array shares a common emitter and collector, there is no complicated fabrication required to join the signals of the individual dots together.

Figure 7 shows a cross section of a device according to the present invention configured as a read/storage optical device. The device is essentially the present invention with coupling means provided by an optical interconnect to an electro-magnetic radiation emitting structure, for example, an LED or laser structure. An n-GaAs first terminal, in this case a collector layer 101, is formed on top of a semiconductor substrate (not shown). A GaAs first buffer layer 103 is formed overlying and in contact with the Collector layer 101. A p-GaAs doped layer is then formed as the first gate layer 105 on an upper surface of the first buffer layer 103. To finish the first growth an undoped second buffer layer 107 is formed on an upper surface of the first gate layer 105.

An etch pit is then formed in the structure, the etch proceeds to the first buffer layer 103. The etch is similar to that shown in Figure 1. The patterned layers together form the first patterned base layers 151. A third GaAs buffer layer 109, is then formed on an upper surface of the first patterned base layers 151. The layers follows the relief of the patterned base layers 151. An undoped AlGaAs first barrier layer 110 is then formed on an upper surface of the third buffer layer. A GaAs quantum well layer 111, will then be formed an upper surface of the first barrier layer 110. A second AlGaAs barrier layer 112 is then formed on an upper surface of the quantum well layer 111. A fourth GaAs buffer layer 113, is the formed on an upper surface of the second barrier layer 112.The layers of the second growth 153 are finished with an n-GaAs Emitter layer formed on an upper surface of the fourth buffer layer. This completes the layers of the second growth 153. An optical transmission region 117 is formed in the upper surface of the Emitter layer 115. This region is formed so that the upper surface of the emitter 115 and the optical transmission 117 are planar. The cladding section for the optical transmission region 117is provided by then GaAs Emitter 115. Thus the transmission region 11 7 and the emitter 115 together form the optical interconnect.

Electro-magnetic radiation may be emitted from the top part of the structure 161.

Emitted light is coupled to the lower part of the structure via the optical interconnect 117. A bias may be applied to the first and second terminals 101, 115, to allow a tunnelling current to be detected when the top half of the structure is emitting. The lower half of the structure may be turned off and on by the applied bias to the first and second terminals 101 and 115. The area of the confinement region may be controlled by the first gates layer 105. If the confinement area is large then carrier may freely tunnel through the quantum well layer 111. The device thus converts an optical signal into an electrical signal. However, if the confinement area is small enough so that zero dimensional states are formed in the quantum well layers 111 and/or single electron charging becomes important, the carriers may become trapped in the quantum well layer 111.Thus the device operates as a optical storage or memory device. The signal stored in the device may be read by increasing the area of the confinement region by modulating the bias on the first gate layer 105.

Figure 9 shows a cross section of a device according to the present invention configured as a read/write optical device as in Figure 7. However, here a specific LaserlLED structure is shown, which may be conveniently formed using the same fabrication techniques as for the detector. The patterned base layers 151, the layers of the second growth 153 and the transmission section of the interconnect 117 are formed as described with reference to Figure 7.

An undoped GaAs buffer layer 118, is formed on the upper surface of the optical interconnect region 117. Ann GaAs second collector region 119 is formed on an upper surface of the undoped buffer layer 118. The second collector region 119, may comprise a plurality of mirror layers if it is desired to form an optical cavity. A fifth GaAs buffer layer 121 is then formed on an upper surface of the second collector region 119. A p-GaAs second gate layer 123 is then formed on an upper surface of the fifth buffer later 121. These layers are then finished with a sixth GaAs buffer layer 125, formed on a upper surface of the second gate layer 123.

A second etch pit is then formed in the structure, the etch proceeds down to the fifth buffer layer 121. A seventh buffer layer 127 is then formed on an upper surface of the sixth buffer layer 125. The seventh buffer layer 127 follows the relief of the etched layers, as described previously. The active region 129 is formed on an upper surface of the seventh buffer layer. An eighth undoped buffer layer 131 is then formed on the upper surface of the active region 129. A second n-GaAs emitter region 133 is then formed on the upper surface of the eighth buffer layer 131. The second emitter region may also comprise mirror layers.

A bias may be applied between the second collector and emitter regions 133 and 119.

The mechanism by which a photon is emitted from the structure is described with reference to Figure 8. A bias is applied across the emitter 171 and the collector 179 Electrons are emitted from the emitter 171, through the first barrier 173 and into a first energy subband 181 in the quantum well 175. The electrons then drop to a lower energy level 183 in the quantum well 175 releasing energy by means of a photon. The electrons then tunnel through the second barrier 177 into the collector 179.

Emitted light is coupled to the lower part of the structure 163 via the optical interconnect. A bias may be applied to the first and second terminals 101, 115, to allow a tunnelling current to be detected when the top half of the structure is emitting. The lower half of the structure may be turned off and on by the applied bias to the first and second terminals 101 and 115.

In light of this disclosure, modifications of the described embodiment, as well as other embodiments, all within the scope of the present invention as defined by the appended claims, will now become apparent to a person skilled in the art.

Claims

CLAIMS:

1. A semiconductor device comprising a semiconductor substrate, mutually separated first and second barrier layers, a quantum well layer, first and second terminals, an embedded gate for defining a confinement region and coupling means for coupling electro-magnetic radiation to the said confinement region.

2. A semiconductor device according to any preceding claim, wherein the confinement region of the device is located within a recessed region of the device.

3. A semiconductor device according to any preceding claim, wherein said confinement region has an area perpendicular to the direction of growth of less than 4um

4. A semiconductor device according to any preceding claim, wherein the device further comprises a plurality of quantum well layers interspersed between the first and second terminals in the confinement region and said plurality of quantum well layers are separated by further barrier layers.

5. A semiconductor device according to any preceding claim, wherein the said first terminal comprises a highly doped semiconductor layer.

6. A semiconductor device according to any preceding claim, wherein the said second terminal comprises a highly doped semiconductor layer.

7. A semiconductor device according to any preceding claim, wherein said embedded gate is a plurality of embedded gates defining an array of confinement regions with the first terminal common to all confinement regions and the second terminal common to all confinement regions.

8. A semiconductor device according to any preceding claim, wherein the said embedded gate comprises a highly doped semiconductor layer.

9. A semiconductor device according to claim 8, wherein the said embedded gate is highly doped so that it is of an opposing conductivity type to the first and second terminals.

10. A semiconductor device according to any preceding claim, wherein the quantum well is formed in a semiconductor layer which possesses a similar lattice constant to the lattice constant of the adjacent semiconductor layers.

11. A semiconductor device according to any preceding claim, wherein coupling means comprises a grating provided to rotate the plane of the polarisation vector of the incident radiation.

12. A semiconductor device according to any preceding claim, wherein the said means for coupling the electro-magnetic radiation to the said confinement region comprises antenna means.

13. A semiconductor device according to claim 12 when dependent on claim 2 wherein the said antenna means extends into the recessed region.

14. A semiconductor device according to claims 12 and 13, wherein the said antenna means comprises a pair of substantially triangular members.

15. A semiconductor device according to claim 14, wherein an apex of each substantially triangular member extends into the recessed region.

16. A semiconductor device according to any of claims 1 to 10, wherein the said coupling means comprises a semiconductor optical interconnect.

17. A semiconductor device according to any of claims 1 to 10, wherein the said coupling means comprises an optical interconnect to an electro-magnetic radiation emitting structure.

18. An optical interconnect comprising a single continuous crystal wherein said crystal comprises a transmission section, a cladding section and input and output surfaces, wherein the transmission section is surrounded by the cladding section on all sides except for the input and output surfaces.

19. An optical interconnect according to claim 18, wherein the said cladding section has a higher conductivity at a predefined operational frequency than the said transmission section

20. An optical interconnect according to either of claims 18 or 19, wherein the lattice constant of the material which comprises the transmission section is similar to the lattice constant of the cladding section.

21. An optical interconnect according to any of claims 18 to 20, wherein the said transmission section comprises undoped GaAs and the cladding section comprises ndoped GaAs.

22. A semiconductor device comprising a detector and a source connected by an optical interconnect according to any of claims 18 to 21.

23. A semiconductor device according to claims 1 to 10, 16 and 17, wherein said coupling means is provided by an optical interconnect according to any of claims 18 to 1 21.

24. A semiconductor device according to claim 17, wherein the device further comprises an electro-magnetic radiation emitting structure.

25. A semiconductor device according to either of claims 22 and 24, wherein the said electro-magnetic source comprises mutually separated first and second barrier layers, a quantum well layer, first and second terminals and an embedded gate for defining a confinement region.

26. A method of operating a semiconductor device according to claim 25, the method comprising the steps of applying a bias between the first and second terminals of the electro-magnetic source such that photons are emitted from the source.

27. A semiconductor device according to any of claims 1 to 10, 16, 17 and 23 to 26 wherein said embedded gate is a plurality of embedded gates defining an array of confinement regions and said coupling means provides an array of optical interconnects for coupling electro-magnetic radiation to each confinement region.

28. A semiconductor device according to claim 27 wherein said array of optical interconnects comprises optical interconnects according to any of claims 18 to 21.

29. A semiconductor device according to any of claims 23 to 28, wherein the device is configured to work as an optical write device.

30. A semiconductor device according to any of claims 23 to 28, wherein the device is configured to work as an optical storage memory device.

3 1. A semiconductor device according to any of claims 23 to 28, wherein the size of the confinement region is chosen so that the device may operate as both an optical read device and an optical storage device.

32. A semiconductor device according to any preceding claim, wherein said device is configured to work at infra-red and microwave wavelengths.

33. A semiconductor device substantially as hereinbefore described with reference to any of the accompanying drawings.

34. An optical interconnect substantially as hereinbefore described with reference to any of the accompanying drawings.