GB2300952B - Variable depth and width memory device - Google Patents

Variable depth and width memory device

Info

Publication number
GB2300952B
GB2300952B GB9610055A GB9610055A GB2300952B GB 2300952 B GB2300952 B GB 2300952B GB 9610055 A GB9610055 A GB 9610055A GB 9610055 A GB9610055 A GB 9610055A GB 2300952 B GB2300952 B GB 2300952B
Authority
GB
United Kingdom
Prior art keywords
memory device
variable depth
width memory
width
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
GB9610055A
Other versions
GB2300952A (en
GB9610055D0 (en
Inventor
Chiakang Sung
Wanli Chang
Joseph Huang
Richard G Cliff
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Altera Corp
Original Assignee
Altera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/442,795 external-priority patent/US5689195A/en
Application filed by Altera Corp filed Critical Altera Corp
Publication of GB9610055D0 publication Critical patent/GB9610055D0/en
Publication of GB2300952A publication Critical patent/GB2300952A/en
Application granted granted Critical
Publication of GB2300952B publication Critical patent/GB2300952B/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1045—Read-write mode select circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
GB9610055A 1995-05-17 1996-05-14 Variable depth and width memory device Expired - Lifetime GB2300952B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/442,795 US5689195A (en) 1995-05-17 1995-05-17 Programmable logic array integrated circuit devices
US08/555,109 US5717901A (en) 1995-05-17 1995-11-08 Variable depth and width memory device

Publications (3)

Publication Number Publication Date
GB9610055D0 GB9610055D0 (en) 1996-07-17
GB2300952A GB2300952A (en) 1996-11-20
GB2300952B true GB2300952B (en) 1999-09-29

Family

ID=27033287

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9610055A Expired - Lifetime GB2300952B (en) 1995-05-17 1996-05-14 Variable depth and width memory device

Country Status (1)

Country Link
GB (1) GB2300952B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IL116792A (en) * 1996-01-16 2000-01-31 Chip Express Israel Ltd Customizable integrated circuit device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0156316A2 (en) * 1984-03-24 1985-10-02 Kabushiki Kaisha Toshiba Memory device with data access control
US4593373A (en) * 1982-08-09 1986-06-03 Sharp Kabushiki Kaisha Method and apparatus for producing n-bit outputs from an m-bit microcomputer
US5146428A (en) * 1989-02-07 1992-09-08 Hitachi, Ltd. Single chip gate array
US5396608A (en) * 1993-06-28 1995-03-07 Analog Devices, Inc. Method and apparatus for accessing variable length words in a memory array

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4593373A (en) * 1982-08-09 1986-06-03 Sharp Kabushiki Kaisha Method and apparatus for producing n-bit outputs from an m-bit microcomputer
EP0156316A2 (en) * 1984-03-24 1985-10-02 Kabushiki Kaisha Toshiba Memory device with data access control
US5146428A (en) * 1989-02-07 1992-09-08 Hitachi, Ltd. Single chip gate array
US5396608A (en) * 1993-06-28 1995-03-07 Analog Devices, Inc. Method and apparatus for accessing variable length words in a memory array

Also Published As

Publication number Publication date
GB2300952A (en) 1996-11-20
GB9610055D0 (en) 1996-07-17

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Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)
PE20 Patent expired after termination of 20 years

Expiry date: 20160513