GB2293297A - Dithered data coding - Google Patents

Dithered data coding Download PDF

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GB2293297A
GB2293297A GB9418419A GB9418419A GB2293297A GB 2293297 A GB2293297 A GB 2293297A GB 9418419 A GB9418419 A GB 9418419A GB 9418419 A GB9418419 A GB 9418419A GB 2293297 A GB2293297 A GB 2293297A
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digital signal
output
logical
indicator
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Peter Charles Eastty
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Sony Europe Ltd
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Sony United Kingdom Ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing
    • G11B20/10527Audio or video recording; Data buffering arrangements

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Abstract

Apparatus for processing an input digital signal to generate an output digital signal of a lower resolution, comprises means responsive to an indicator signal for adding a digital noise signal to the input digital signal to generate a dithered digital signal and for quantising the dithered digital signal to generate the output digital signal. The apparatus operates to vary the probability of at least one predetermined bit of the output digital signal being logical one or logical zero in dependence on a current state of the indicator signal. This allows the indicator signal to be encoded into the existing data stream of the output signal, and to be detected later by detecting a slight predominance of logical one or logical zero in the data. The indicator signal could be used, for example, to indicate that the digital dither noise was generated from the output digital signal, so that an identical noise signal can be later subtracted from the signal, or could indicate the title of an audio track or copyright origin information. Application is to digital recording and/or replay apparatus, such as a tape device or compact disc player. <IMAGE>

Description

DITHERED DATA CODING This invention relates to dithered data coding.
Dither noise is artificially generated digital noise which is added to a digital signal before that digital signal is quantised to a lower resolution (number of bits). The dither noise is added to reduce the non-linear distortion introduced by the harsh "staircase" transfer characteristic of the quantising device.
One example of the use of dither noise in this way occurs when digital audio data are initially processed at a high resolution such as 32 bits, and are then quantised to a 16-bit resolution for recording on, say, a compact disc or digital audio tape.
When dither noise is not used in a quantising operation, a very slight change in the value of the higher resolution (32-bit) signal can change the output 16-bit signal between adjacent levels, if the slight change causes the 32-bit signal to cross the boundary between two adjacent 16-bit quantising levels. In an extreme case, a change of 1 LSB (least significant bit) of the 32-bit signal could cause a change of 1 LSB of the quantised 16-bit signal (i.e. 216 times greater than the change in the 32-bit signal), by moving the 32-bit signal from one quantising level to another. This highly non-linear response of the quantiser causes subjectively disturbing distortion in the output 16bit signal.
In order to reduce this non-linear distortion, dither noise is added to the 32-bit signal before that signal is quantised to 16-bit resolution. The dither noise is random or pseudo random noise, generally having a mean value of zero and a peak amplitude of the order of about +1 LSB of the 16-bit signal. The addition of the dither noise randomises the way in which the LSB of the 16-bit signal is quantised, and therefore "smoothes out" the otherwise harsh steps between adjacent quantising levels. This has the effect of reducing the non-linear distortions described above.
Although the use of dither noise when a signal is quantised can help to reduce the non-linear effects of the quantising process, the fact that noise has been deliberately added to the signal means that the signal to noise ratio of the resulting quantised signal is degraded. In order to overcome this problem, it has been proposed that the dither noise should be subtracted again from the quantised signal, before that signal is further processed or converted to an analogue signal. However, a major concern then is that an identical dither noise signal has to be subtracted; if a different (i.e. incorrect) dither noise signal is subtracted, this will tend to double, rather than eliminate, the degradation caused by the dither noise.This need for synchronisation between the dither noise used during quantisation and the dither noise which is later subtracted can be a problem when the quantised data are stored or transmitted between the quantisation and noise subtraction stages.
One way of ensuring that the dither noise to be subtracted from the quantised signal is the same as that added during quantisation is to use a pseudo-random noise generator to generate the initial dither noise and then to use an identical and synchronised pseudo-random noise generator to generate the noise signal which is later subtracted from the quantised signal. However, this requires a synchronisation signal to be transmitted or stored with the quantised signal, to be used to synchronise the two pseudo-random noise generators.
Another approach is described in w094/03988, in which the dither noise is generated deterministically from the quantised data themselves. This avoids the need for a synchronisation signal, since the data used to generate the two dither noise signals are identical (being the output of the quantiser and the input to the noise subtracter).
However, the problem still remains that if dither noise is incorrectly subtracted from a quantised signal, the effect will be to worsen rather than improve the resultant signal. This problem is not eliminated by the system described in W094/03988; in fact, as acknowledged in that document, if the deterministically generated dither noise is subtracted from a signal in which no dither (or a different type of dither) was used during quantisation, then the signal to noise ratio of the resultant signal can be degraded by about 3 dB (decibels). Although W094/03988 proposes that a low bit rate "flag" be associated with the quantised data to indicate whether dither noise subtraction should be used, such a flag would require additional data storage or transmission capacity.In addition, the composite data stream (of the quantised data and the flag) would require special handling during storage and transmission to ensure that the flag remains correctly associated with the quantised data stream.
This invention provides apparatus for processing an input digital signal of a first resolution to generate an output digital signal of a second resolution, the second resolution being lower than the first resolution, the apparatus comprising: generating means, responsive to an indicator signal, for adding a digital noise signal to the input digital signal to generate a dithered digital signal and for quantising the dithered digital signal to generate the output digital signal; the generating means being operable to vary the probability of at least one predetermined bit of the output digital signal being logical one or logical zero in dependence on a current state of the indicator signal.
The invention provides a technique for encoding an indicator signal onto a quantised data stream by changing the statistical distribution of logical one and logical zero states in at least one predetermined bit of the quantised data stream (e.g. the LSB). This distribution would otherwise be substantially equal in data generated by a dithered quantising technique. The change in the probability of ones and zeros can be made so slight that it has negligible effect on the actual quantised data (e.g. audio data) while still being detectable during later processing of the quantised data stream.
The indicator signal encoded in this way could be used to signify that noise subtraction of the type described above should be used.
Alternatively, the indicator signal could indicate, for example, a programme title of an audio track or copyright origin information to allow copyright-infringing copying of the data to be traced. In other words, either a simple "yes/no" indicator signal, or more complex data, or both could be encoded using this technique.
One useful property of the encoded indicator signal is that its presence indicates that an exact digital copy has been made of the encoded quantised signal. In other words, the indicator signal disappears if any digital processing or digital to analogue conversion is performed on the encoded data. This means that the presence or data of the indicator signal can be used to check the integrity of a received data signal. Also, where the indicator signal is used to flag whether noise subtraction should be used, if further digital processing is applied (which would render later noise subtraction inappropriate), the indicator signal disappears.
In order that the encoding has little effect on a signal represented by the quantised data, it is preferred that the at least one predetermined bit of the output digital signal is the least significant bit of the output digital signal. However, one or more other bits could be used.
In an advantageously convenient embodiment, the generating means comprises means for quantising the dithered digital signal to generate an intermediate digital signal; and means for inverting the at least one predetermined bit of selected data words of the intermediate digital signal to generate the output digital signal.
Preferably the inverting means comprises: means for setting the at least one predetermined bit of a current data word of the intermediate signal to a value dependent on a control signal derived from the indicator signal, thereby generating a test data word; means for detecting the absolute difference between the test data word and a corresponding data word of the input digital signal; and means for supplying the test data word or the data word of the intermediate digital signal as a current word of the output digital signal, in dependence on whether the difference is less than a predetermined threshold.
Various thresholds could be used, but a preferred threshold value (with which the encoding process causes only about 0.003 dB additional noise in a digital audio signal) is 1/256 of a least significant bit of the output digital signal.
Preferably the indicator signal has a data rate less than or equal to the sample rate of the input digital signal multiplied by the square of the predetermined threshold.
Although the indicator signal could be used to control the inverting means directly, it is preferred that the control signal is dependent upon a logical combination of the indicator signal with a periodically oscillating signal. This can move any unwanted encoding artifacts out of the human auditory response band. Preferably the oscillating signal has a frequency substantially equal to one half of the sample rate of the input digital signal.
In order to avoid any stray periodic effects still being audible in the encoded data, it is preferred that the control signal is dependent upon a logical combination of the indicator signal with a pseudo-random digital signal generated from the output digital signal.
This spreads the energy of the indicator signal over a wide band. The fact that the pseudo-random signal is derived from the output digital signal means that it can be reproduced easily later (without synchronisation problems) to decode the indicator signal.
Preferably the apparatus comprises a pseudo-random digital signal generator for generating the digital noise signal from the output digital signal. In this embodiment, the use of this type of dither noise can be flagged by the indicator signal.
Viewed from a second aspect this invention provides apparatus for decoding an indicator signal from an input digital signal in which the indicator signal was encoded by varying the probability of at least one bit of the input signal being logical one or logical zero, the apparatus comprising: means for detecting the distribution of logical one and logical zero states in at least one predetermined bit of the input digital signal; and means for generating the indicator signal in dependence on whether the at least one predetermined bit of the input digital signal has a predominance of logical one or logical zero states.
In this complementary decoding apparatus, the distribution of logical one and logical zero states is detected, and an indicator signal generated in dependence in that detection.
In order that the encoding has little effect on a signal represented by the quantised data, it is preferred that the at least one predetermined bit of the output digital signal is the least significant bit of the output digital signal. However, one or more other bits could be used.
Preferably the apparatus comprises means for generating an intermediate signal having either a positive or a negative state, the current state of the intermediate signal being dependent on a control signal derived from the at least one predetermined bit of the input digital signal.
In order to counteract the effect of a modulation process used during data encoding, it is preferred that the control signal is dependent upon a logical combination of the at least one predetermined bit of the input digital signal with a periodically oscillating signal, which preferably has a frequency substantially equal to one half of the sample rate of the input digital signal.
Again, it is preferred that the control signal is dependent upon a logical combination of the at least one predetermined bit of the input digital signal with a pseudo-random digital signal generated from the input digital signal.
Preferably the apparatus comprises a low pass filter for low-pass filtering the intermediate signal. In this case, it is preferred that an absolute value detecting means is used to detect the absolute value of the output of the low pass filter, the indicator signal being dependent on the output of the absolute value detecting means.
Preferably the apparatus comprises a retriggerable monostable, operable to be triggered by the absolute value detecting means, the indicator signal being dependent on the output of the retriggerable monostable. This avoids any problems associated with zero crossings of the output of the low pass filter.
In order to use this technique in noise subtraction, it is preferred that the apparatus comprises a pseudo-random digital signal generator for generating the digital noise signal from the input digital signal; and means, responsive to a predetermined state of the indicator signal, for subtracting the digital noise signal from the input digital signal to generate an output digital signal.
The technique is particularly appropriate for use when the input digital signal is a digital audio signal.
The invention is particularly suitable for use in data recording and/or replay apparatus such as a digital tape recorder or an optical recorder/player such as a compact disc player.
Viewed from a third aspect this invention provides a method of processing an input digital signal of a first resolution to generate an output digital signal of a second resolution, the second resolution being lower than the first resolution, the method comprising the steps of: adding a digital noise signal to the input digital signal to generate a dithered digital signal and quantising the dithered digital signal to generate the output digital signal; and varying the probability of at least one predetermined bit of the output digital signal being logical one or logical zero in dependence on a current state of an indicator signal.
Viewed from a fourth aspect this invention provides a method of decoding an indicator signal from an input digital signal in which the indicator signal was encoded by varying the probability of at least one bit of the input signal being logical one or logical zero, the method comprising the steps of: detecting the distribution of logical one and logical zero states in at least one predetermined bit of the input digital signal; and generating the indicator signal in dependence on whether the at least one predetermined bit of the input digital signal has a predominance of logical one or logical zero states.
An embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Figure 1 is a schematic block diagram of a digital audio quantising and recording apparatus; Figure 2 is a schematic block diagram of a digital audio replay and noise subtraction apparatus; Figure 3 is a schematic diagram of a first embodiment of a dithered quantiser and low bit rate data encoder; Figure 4 is a schematic diagram of a first embodiment of a low bit rate decoder and noise subtraction apparatus; Figure 5 is a schematic diagram of a pseudo-random bit sequence generator; Figure 6 is a schematic diagram of a second embodiment of a dithered quantiser and low bit rate data encoder; and Figure 7 is a schematic diagram of a second embodiment of a low bit rate decoder and noise subtraction apparatus.
Figure 1 is a schematic block diagram of a digital audio quantising and recording apparatus. An audio signal from an audio signal source 10 is processed by a 32-bit digital audio processing apparatus 20 such as a 32-bit digital mixing console. The processed 32-bit digital audio signal is then passed to a 32-bit to 16-bit converter 30 which quantises the 32-bit signal down to a 16-bit digital audio signal 45.
The converter 30 adds dither noise to the 32-bit digital audio signal before the signal is quantised. This is done in order to smooth out the otherwise harsh transfer function of a 32-bit to 16-bit quantiser. The dither noise is supplied from a pseudo random bit sequence (PRBS) generator 40 which generates a pseudo random noise signal from the 16-bit signal 45 output by the 32-bit to 16-bit converter 30.
The 16-bit digital audio signal 45 is then passed to a low bit rate (LBR) data encoder 50. (In fact, the quantising and LBR encoding operations take place together in the embodiments described in detail below; they are shown as sequential operations in Figure 1 for ease of explanation). The LBR data encoder 50 impresses a low bit rate control signal on the 16-bit digital audio signal 45 which indicates that the signal was quantised using dither noise generated from the quantised 16-bit signal 45. These low bit rate control data can be used to control a later noise subtraction stage.
The LBR data encoder 50 will be described in more detail below.
Briefly, however, the LBR data encoder 50 impresses the control data signal onto the digital audio signal 45 by slightly modifying the data of the digital audio signal 45 themselves. This modification is so slight that (as described below) it contributes an additional noise overhead of only about 0.003 dB to the digital audio signal 45. This additional noise component is so tiny that it is practically inaudible in the resulting audio signal.
Because the LBR data encoder 50 modifies the actual audio data rather than associating a separate indicator flag with the audio data (as proposed in w094/03988), the encoded digital audio signal can then be handled using conventional 16-bit processing and recording apparatus. There is no need for special handling of the signal in order to maintain a correct association between a separate flag and the digital audio signal.
The 16-bit digital audio signal which is output by the LBR data encoder 50 is recorded on a conventional 16-bit digital recording/replay apparatus 60.
Figure 2 is a schematic block diagram of a digital audio replay and noise subtraction apparatus which compliments the quantising and recording apparatus of Figure 1.
A 16-bit digital audio signal replayed from the recording/replay apparatus 60 is supplied to an LBR data decoder 70 which deriVes an LBR control signal 75 which corresponds to the LBR signal impressed on the digital audio data 45 by the LBR data encoder 50.
The replayed 16-bit digital audio signal is also passed (unchanged by the LBR data decoder 70) to a noise subtracter 80 which receives a dither noise signal generated from the replayed 16-bit digital audio signal by a PRBS generator 40' identical to the PRBS generator 40 of Figure 1. The noise subtracter 80 subtracts the dither noise signal generated by the PRBS generator 40' from the 16-bit replayed digital audio signal.
The LBR control signal 75 output by the LBR data decoder controls a multiplexer 90 which selects either the noise subtracted digital audio signal output by the noise subtracter 80 or the 16-bit digital audio signal as replayed by the recording/replay apparatus 60. The signal selected by the multiplexer 90 is then supplied as an output audio signal for further processing.
When the replayed digital audio signal is one for which the PRBS generator 40 was used to add dither before the signal was quantised, the noise subtracter 80 can improve the signal-to-noise ratio of the replayed signal by about 4.5 dB by removing the added dither noise.
However, if the dither noise from the PRBS generator 40' is subtracted from a digital audio signal in which that type of noise was not used at the quantising stage, the noise subtracter 80 actually causes a deterioration of about 2.5 dB in the signal-to-noise ratio of the replayed digital audio signal. Accordingly, for an additional noise overhead of about 0.003 dB, the LBR data encoder 50 and the LBR data decoder 70 provide a means of encoding a control signal onto the digital audio data stream to control whether the noise subtracter 80 should be used. The potential benefits of using such a control signal (ie. the potential 4.5 dB improvement or the avoidance of a 2.5 dB deterioration) greatly outweigh the very small noise overhead caused by the LBR data encoding process.
The operation of the LBR data encoder 50 and decoder 70 will now be described in greater detail with reference to Figures 3 to 7.
Figure 3 is a schematic diagram of a first embodiment of a dither quantiser and low bit rate data encoder. The circuit of Figure 3 corresponds to the schematic illustrations of the converter 30, the PRBS generator 40 and the LBR data encoder 50 of Figure 1.
The circuit of Figure 3 receives an input 32-bit digital audio signal 100 and generates a quantised 16-bit output digital audio signal 110.
The output signal 110 is supplied as an input to a PRBS generator 120. The PRBS generator (described in more detail with reference to Figure 5 below) generates an output pseudo random bit sequence deterministically from the digital audio signal 110. The output of the PRBS generator 120 is supplied to a probability density function (PDF) shaper 130 and, from there, to an adder 140 where the shaped PRBS signal is added to the input signal 100.
The PRBS generator 120 produces a bit sequence having a rectangular probability density function. In other words, all possible output values between i+LSB (of the 16-bit signal) are equally probable. The PDF shaper 130 generates a shaped noise signal having a triangular probability density function by subtracting the PRBS generator output from a delayed version of itself. This produces a noise signal in which a value of O is most probable, with the probability of any particular value x between -1 LSB and +1 LSB being equal to (y-lxl), i.e. (y - modulus(x)). A PDF in this form is more suitable than a rectangular PDF for use in a dither quantiser.
The signal at the output of the adder 140 represents the input digital audio signal 100 with the addition of the dither noise output by the PDF shaper 130. This signal is supplied in parallel to a signal truncator 150 and to a comparator 160. The signal truncator 150 truncates the output of the adder 140 to 16-bit resolution and supplies the truncated 16-bit signal to an output multiplexer 170.
The truncated 16-bit signal is also supplied in parallel to an AND gate 180 and an OR gate 190. The second input to the AND gate 180 is hexadecimal FFFE, so that the output of the AND gate 180 is equal to the truncated 16-bit signal generated by the truncator 150 but with its LSB permanently set to 0. Similarly, the second input to the OR gate 190 is hexadecimal 0001, so that the signal at the output of the OR gate 190 always has its LSB set to 1.
Low bit rate (LBR) data, which in this embodiment is used to indicate that the dither noise generated by the PRBS generator 120 and the PDF shaper 130 has been added, is supplied as a control input to a multiplexer 200. The multiplexer 200 supplies either the output of the AND gate 180 or the output of the OR gate 190 to a second input of the comparator 160 and also to a second input of the output multiplexer 170. This arrangement means that the multiplexer 200 supplies an output signal which is equal to the truncated 16-bit signal with its least significant bit permanently set to equal the current state of the LBR data.
The comparator 160 detects the difference between the output of the multiplexer 200 and the output of the adder 140 to generate an error signal. The absolute value of the error signal is detected by an absolute value detector 210 and this absolute error value is then compared with a threshold value by a comparator 220. If the absolute error value is less than the threshold value, the output multiplexer 170 selects the output of the multiplexer 200 to form the output digital audio signal 110. If the absolute error value is greater than or equal to the threshold value, the output multiplexer 170 selects the direct output of the signal truncator 150 to form the output digital audio signal 110.
The effect of the circuit in Figure 3 is to vary the distribution of logical 1 and logical 0 in the LSB of the output digital audio signal 110 by a small amount, in dependence on the state of the LBR data. If the LBR data is logical 1, there will be a slight predominance of logical 1 's in the LSB of the output digital audio signal 110, and vice versa for logical 0. However, the use of the threshold value and the comparator 220 means that the LSB of the output digital audio signal 110 is changed from 0 to 1 (or vice versa) only if this results in an error which is less than the threshold value. If the error which would be incurred by changing the state of the LSB is greater than or equal to the threshold value, the change is not performed.
In the present embodiment, the threshold value is set to 1/256 of an LSB. This has two effects: firstly, the LSB will be altered from 0 to 1 or vice versa for about one audio sample in every 256 samples, and secondly the alteration will take place only when the error introduced by the alteration is less than 1/256 of an LSB. This low error occurs when a 32-bit sample to be quantised (i.e. after noise addition) lies very close to the boundary between two adjacent 16-bit quantised levels. The result of using a low threshold such as 1/256 LSB is that the additional noise component in the output digital audio signal 110 caused by the LBR coding is only about 0.003 dB.
The use of a threshold of 1/256 LSB means that an appropriate data rate for the LBR data is (1/256)2 times the sample rate of the input digital signal. In general, an appropriate data rate is less than or equal to the input sample rate multiplied by the square of the threshold value.
If the LBR data encoding circuit was not used, the distribution of logical 1 and logical 0 in the output digital audio signal 110 would be substantially equal because of the dithered quantisation process.
Using the LBR data encoding circuit with the threshold value described above, the distribution of logical 1's and logical 0 in the output digital audio signal 110 is changed to about 257/512 and 255/512 respectively (for LBR data equal to 1) and vice versa for LBR data equal to 0. This slight predominance of either logical 1 or logical 0 in the output digital audio signal 110 can be detected and used to indicate whether noise subtraction should take place at a later stage.
Figure 4 is a schematic diagram of a first embodiment of a low bit rate decoder and noise subtraction apparatus, which complements the apparatus of Figure 3.
The circuit of Figure 4 receives an input digital audio signal 250 and supplies an output digital audio signal 260. The input digital audio signal 250 is equivalent to the quantised output digital audio signal 110 of the circuit of Figure 3, having then been recorded or transmitted.
The input digital audio signal 250 is supplied in parallel to a PRBS generator 120' and an output multiplexer 270. The PRBS generator 120' is identical to the PRBS generator 120 of Figure 3, and its output is supplied to a PDF shaper 130' identical to the PDF shaper 130 of Figure 3. In this way, the output of the PDF shaper 130' is dependent on the input digital audio signal 250 in exactly the same way as the output of the PDF shaper 130 of Figure 3 is dependent on the output digital audio signal 110.
The dither noise generated by the PDF shaper 130' is subtracted from the input signal 250 by a subtracter 280. In cases where the data was quantised by the apparatus of Figure 3, this subtraction process removes the additional dither noise added by the adder 140 before the signal was originally quantised. The noise subtracted signal is supplied from the subtracter 280 to the output multiplexer 270 which selects either the noise subtracted signal or the input digital signal 250 as the output digital signal 260, under the control of a control signal 290 (described below).
The LSB of the input digital signal 250 controls the operation of a multiplexer 300 which has two inputs connected to constant values of +1 and -1 respectively. When the LSB of the input signal 250 is logical 1, the multiplexer 300 supplies the +1 constant value as its output. Similarly, when the LSB of the input signal 250 is logical 0, the multiplexer 300 passes the -1 constant value as its output.
The output of the multiplexer 300 is passed to a low pass filter 310, which in this embodiment is a three-tap digital low pass filter of conventional design.
If there is an equal distribution of logical 1 and logical 0 in the LSB of the input signal 250, there will be an equal distribution of +1 and -1 in the output of the multiplexer 300. This means that the output of the multiplexer will average to zero, and so the output of the low pass filter 310 will be substantially zero.
However, if there is a slight predominance of logical 1 or logical 0 in the LSB of the signal 250, the low pass filter 310 will output of a non-zero value, which is either positive or negative depending on whether the predominance is of logical 1 or logical 0.
The output of the low pass filter 310 is supplied in parallel to a Schmidt trigger circuit 320 and to an absolute value detector 330.
The Schmidt trigger 320 is of conventional design and detects the positive or negative output of the low pass filter indicating a predominance of logical 1 or logical 0, providing a "clean" digital data output 340 dependent on the polarity of the low pass filter 310 output.
The absolute value detector 330 rectifies the output of the low pass filter 310, to generate either a zero output (if the distribution of logical 1 and logical 0 in the LSB of the signal 250 are equal) or a positive output (if there is a predominance of logical 1 or logical 0 in the LSB of the signal 250). The output of the absolute value detector 330 is supplied to a retriggerable monostable circuit 350 of conventional design. The purpose of the retriggerable monostable circuit 350 is to provide a detection signal 360 indicative of whether the LBR data encoding was used on the input signal 250, but independent of the actual LBR data which was encoded. Once the retriggerable monostable 350 has been triggered by the output of the absolute value detector 330 going positive, it remains triggered for a predetermined period of about one second.This is done in order to maintain the detection output 360 at a high level during temporary zero crossings of the output of the low pass filter 310. These zero crossings occur when adjacent data bits encoded onto the LSB of the signal 250 change from 1 to 0 or vice versa (the corresponding output of the low pass filter 310 changing from +1 to -1 with a zero crossing inbetween).
In the present embodiment, the detection output 360 is used to indicate that dither noise has been added during the quantising stage.
Accordingly, the detection output 360 is used as the control signal 290 to control the output multiplexer 270.
Figure 5 is a schematic diagram of a pseudo random bit sequence generator. The circuit of Figure 5 receives an input signal 400 and generates two output signals 410, 420. The need for two output signals will be explained below with reference to Figures 6 and 7. However, the circuit of Figure 5 could be used as the PRBS generator 120 (120') of Figures 3 and 4 by employing only the output signal 420.
The input signal 400 is supplied to a loop circuit comprising an exclusive-OR gate 430, a delay element 440 and a feedback adder 450.
The output of the delay element forms a first pseudo random bit sequence which is used as the output 410. This signal is also supplied to an exclusive-OR gate 460 connected as part of the feedback loop of a series of delay elements 470. The output of the exclusive-OR gate 460 forms the other output 420 of the PRBS generator of Figure 5.
The principles of pseudo random bit sequence generation are well established and are described in, for example, "The Art of Electronics" (Horowitz & Hill, Cambridge University Press, 1988). The bit sequence progresses along a string of delay elements 470 and values tapped from different points along the sequence of delay elements are combined by exclusive-OR gates 480, before being fed back to the string of delay elements 470.
Figure 6 is a schematic diagram of a second embodiment of a dithered quantiser and low bit rate data encoder. In the circuit of Figure 6, many elements are identical to those employed in the circuit of Figure 3. These elements are denoted by identical reference numerals to those used in Figure 3 and will not be described again below.
The circuit of Figure 6 overcomes a potential problem which may occur with the circuit of Figure 3. This potential problem arises because the low bit rate data used to vary the distribution of logical 1 and logical 0 in the least significant bit of the quantised data stream may have a component which lies within the human auditory response band. In other words, under certain circumstances a listener may be able to hear the effect of the low bit rate data in the reconstructed audio signal.
In order to overcome this, in Figure 6 the low bit rate data is first combined with the output of an oscillator 500 running at one-half of the audio sampling frequency (fs/2). This combination takes place in an exclusive-OR gate 510, and effectively modulates the LBR data onto a carrier at one-half of the audio sampling frequency (i.e. well outside the human auditory response) In order to avoid any remaining repetitive aspects of the modulated LBR data, which may be slightly audible in the reconstructed audio signal, the output of the exclusive OR gate 510 is combined with the output 410 of the PRBS generator 520 of Figure 5 in a further exclusive-OR gate 530. By combining the modulated LBR data with a pseudo random sequence in this way, the energy of the LBR data is spread over a wide spectrum and so is much less likely to be audible.
The output of the exclusive-OR gate 530 controls the multiplexer 200 in a similar manner to that described above.
Figure 7 is a schematic diagram of a second embodiment of a low bit rate decoder and noise subtraction apparatus complementary to the apparatus of Figure 6. The apparatus of Figure 7 employs a PRBS generator 520' which, again, is identical to the PRBS generator 520 of Figure 5. Further, many features of the circuit of Figure 7 are identical to correspondingly-numbered features in the circuit of Figure 4.
In Figure 7, the LSB of the input signal 250 is combined in an exclusive-OR gate 550 with the output of an oscillator 500' identical to the oscillator 500 of Figure 6. The output of the exclusive-OR gate 550 is then passed to a further exclusive-OR gate 560 where it is combined with the output 410 of the PRBS generator 520'. By combining the LSB of the signal 250 with the oscillator output and the PRBS generator output 410, the low bit rate data is effectively demodulated to reverse the modulation operations carried out in the circuit of Figure 6.
Since the output data 340 now depends on the phase of the oscillator 500' with respect to the oscillator 500, a conventional polarity-independent coding scheme can be used to avoid ambiguity.
The output of the exclusive-OR gate 560 is then used to control the multiplexer 300 which operates in an identical manner to the correspondingly-numbered multiplexer of Figure 4.
The encoding or decoding apparatus described above could be incorporated into a digital recording and/or replay apparatus such as a tape device or optical recorder/player (e.g. a compact disc player) - The LBR data could then be used to switch on or off a noise subtraction circuit within the device.

Claims (29)

1. Apparatus for processing an input digital signal of a first resolution to generate an output digital signal of a second resolution, the second resolution being lower than the first resolution, the apparatus comprising: generating means, responsive to an indicator signal, for adding a digital noise signal to the input digital signal to generate a dithered digital signal and for quantising the dithered digital signal to generate the output digital signal; the generating means being operable to vary the probability of at least one predetermined bit of the output digital signal being logical one or logical zero in dependence on a current state of the indicator signal.
2. Apparatus according to claim 1, in which the at least one predetermined bit of the output digital signal is the least significant bit of the output digital signal.
3. Apparatus according to claim 1 or claim 2, in which the generating means comprises means for quantising the dithered digital signal to generate an intermediate digital signal; and means for inverting the at least one predetermined bit of selected data words of the intermediate digital signal to generate the output digital signal.
4. Apparatus according to claim 3, in which the inverting means comprises: means for setting the at least one predetermined bit of a current data word of the intermediate signal to a value dependent on a control signal derived from the indicator signal, thereby generating a test data word; means for detecting the absolute difference between the test data word and a corresponding data word of the input digital signal; and means for supplying the test data word or the data word of the intermediate digital signal as a current word of the output digital signal, in dependence on whether the difference is less than a predetermined threshold.
5. Apparatus according to claim 4, in which the threshold is 1/256 of a least significant bit of the output digital signal.
6. Apparatus according to claim 4 or claim 5, in which the indicator signal has a data rate less than or equal to the sample rate of the input digital signal multiplied by the square of the predetermined threshold.
7. Apparatus according to any one of claims 4 to 6, in which the control signal is dependent upon a logical combination of the indicator signal with a periodically oscillating signal.
8. Apparatus according to claim 7, in which the oscillating signal has a frequency substantially equal to one half of the sample rate of the input digital signal.
9. Apparatus according to any one of claims 4 to 8, in which the control signal is dependent upon a logical combination of the indicator signal with a pseudo-random digital signal generated from the output digital signal.
10. Apparatus according to any one of the preceding claims, comprising a pseudo-random digital signal generator for generating the digital noise signal from the output digital signal.
11. Apparatus according to claim 10, in which the indicator signal indicates at least whether the digital noise signal was generated from the output digital signal.
12. Apparatus according to any one of the preceding claims, in which the input digital signal has a resolution of 32 bits and the output digital signal has a resolution of 16 bits.
13. Apparatus for decoding an indicator signal from an input digital signal in which the indicator signal was encoded by varying the probability of at least one bit of the input signal being logical one or logical zero, the apparatus comprising: means for detecting the distribution of logical one and logical zero states in the at least one predetermined bit of the input digital signal; and means for generating the indicator signal in dependence on whether the at least one predetermined bit of the input digital signal has a predominance of logical one or logical zero states.
14. Apparatus according to claim 13, in which the at least one predetermined bit is the least significant bit of the input digital signal.
15. Apparatus according to claim 13 or claim 14, comprising means for generating an intermediate signal having either a positive or a negative state, the current state of the intermediate signal being dependent on a control signal derived from the at least one predetermined bit of the input digital signal.
16. Apparatus according to claim 15, in which the control signal is dependent upon a logical combination of the at least one predetermined bit of the input digital signal with a periodically oscillating signal.
17. Apparatus according to claim 16, in which the oscillating signal has a frequency substantially equal to one half of the sample rate of the input digital signal.
18. Apparatus according to any one of claims 15 to 17, in which the control signal is dependent upon a logical combination of the at least one predetermined bit of the input digital signal with a pseudo-random digital signal generated from the input digital signal.
19. Apparatus according to any one of claims 15 to 18, comprising a low pass filter for low-pass filtering the intermediate signal.
20. Apparatus according to claim 19, comprising: absolute value detecting means for detecting the absolute value of the output of the low pass filter, the indicator signal being dependent on the output of the absolute value detecting means.
21. Apparatus according to claim 20, comprising a retriggerable monostable, operable to be triggered by the absolute value detecting means, the indicator signal being dependent on the output of the retriggerable monostable.
22. Apparatus according to any one of claim 13 to 21, comprising: a pseudo-random digital signal generator for generating the digital noise signal from the input digital signal; means, responsive to a predetermined state of the indicator signal, for subtracting the digital noise signal from the input digital signal to generate an output digital signal.
23. Apparatus according to any one of the preceding claims, in which the input digital signal is a digital audio signal.
24. Data recording and/or replay apparatus comprising apparatus according to any one of the preceding claims.
25. A method of processing an input digital signal of a first resolution to generate an output digital signal of a second resolution, the second resolution being lower than the first resolution, the method comprising the steps of: adding a digital noise signal to the input digital signal to generate a dithered digital signal and quantising the dithered digital signal to generate the output digital signal; and varying the probability of at least one predetermined bit of the output digital signal being logical one or logical zero in dependence on a current state of an indicator signal.
26. A method of decoding an indicator signal from an input digital signal in which the indicator signal was encoded by varying the probability of at least one bit of the input signal being logical one or logical zero, the method comprising the steps of: detecting the distribution of logical one and logical zero states in at least one predetermined bit of the input digital signal; and generating the indicator signal in dependence on whether the at least one predetermined bit of the input digital signal has a predominance of logical one or logical zero states.
27. Data processing apparatus substantially as hereinbefore described with reference to the accompanying drawings.
28. A method of data processing, the method being substantially as hereinbefore described with reference to the accompanying drawings.
29. Data recording and/or replay apparatus substantially as hereinbefore described with reference to the accompanying drawings.
GB9418419A 1994-09-13 1994-09-13 Dithered data coding Expired - Fee Related GB2293297B (en)

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Publication number Priority date Publication date Assignee Title
WO2002017318A1 (en) * 2000-08-25 2002-02-28 Koninklijke Philips Electronics N.V. Method and apparatus for reducing the word length of a digital input signal and method and apparatus for recovering the digital input signal
US7088779B2 (en) 2000-08-25 2006-08-08 Koninklijke Philips Electronics N.V. Method and apparatus for reducing the word length of a digital input signal and method and apparatus for recovering a digital input signal
KR100800373B1 (en) 2000-08-25 2008-02-04 코닌클리케 필립스 일렉트로닉스 엔.브이. Method and apparatus for reducing the word length of a digital input signal and method and apparatus for recovering the digital input signal

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GB2293297B (en) 1999-01-20
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