GB2284081A - Cache affinity scheduler - Google Patents

Cache affinity scheduler Download PDF

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GB2284081A
GB2284081A GB9425745A GB9425745A GB2284081A GB 2284081 A GB2284081 A GB 2284081A GB 9425745 A GB9425745 A GB 9425745A GB 9425745 A GB9425745 A GB 9425745A GB 2284081 A GB2284081 A GB 2284081A
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engine
processes
run
run queue
affinity
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GB9425745D0 (en
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Andrew J Valencia
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Sequent Computer Systems Inc
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0842Multiuser, multiprocessor or multiprocessing cache systems for multiprocessing or multitasking
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/5033Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering data affinity
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/50Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005Allocation of resources, e.g. of the central processing unit [CPU] to service a request
    • G06F9/5027Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals
    • G06F9/505Allocation of resources, e.g. of the central processing unit [CPU] to service a request the resource being a machine, e.g. CPUs, Servers, Terminals considering the load
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2209/00Indexing scheme relating to G06F9/00
    • G06F2209/48Indexing scheme relating to G06F9/48
    • G06F2209/483Multiproc

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

A computing system 50 includes N symmetrical computing engines having N cache memories joined by a system bus 12. The computing system includes a global run queue (54), an FPA global run queue, and N affinity run queues (58). Each engine is associated with one affinity run queue, which includes multiple slots. When a process first becomes runnable, it is typically attached to one of the global run queues. A scheduler allocates engines to processes and schedules the processes to run on the basis of priority and engine availability. The system keeps track of the number of processes queued to each processor and can transfer a process from one processor to another with a shorter queue. <IMAGE>

Description

CACHE AFFINITY SCHEDULER This invention relates to scheduling of processes that run on computing engines in a multiprocessor computing system and, in particular, to a scheduler that considers erosion of cache memory context when deciding in which run queue to enqueue a process.
Fig. 1 is a block diagram of major subsystems of a prior art symmetrical multi-processor computing system 10. Examples of system 10 are models S27 and S81 of the Symmetry Series manufactured by Sequent Computing Systems, Inc., of Beaverton, Oregon, the assignee of the present patent application. The Symmetry Series models employ a UNIX operating system with software written in the C programming language. The UNIX operating system, which is well known to those skilled in the art, is discussed in M.
Bach, The Desiqn of the UNIX Operating System, Prentice Hall, 1986. The C programing language, which is also well known to those skilled in the art, is described in B.
Kernighan and D. Ritchie, The C Programming Language, 2d Ed., Prentice Hall, 1988.
Referring to Fig. 1, system 10 includes N number of computing engines denominated engine lp, engine 2p, engine 3p, ..., engine Np (collectively "engines lp - Np").
Each one of engines lp - Np is a hardware computer which includes a microprocessor such as an Intel 386 and associated circuitry. System 10 is called a symmetrical multi-processor computing system because each one of engines lp - Np has equal control over system 10 as a whole.
Each one of engines ip - Np has a local cache memory denominated cache lp, cache 2per cache 3p, ..., cache Np, respectively (collectively "caches ip - Np"). The purpose of a cache memory is to provide high-speed access and storage of data associated with processes performed by an engine. A system bus 12p joins engines lp - Np to a main RAM memory 14p of system 10. Data stored in one of cache memories lp - Np can originate from the corresponding engine, the cache memory of another engine, a main memory 14p, a hard disk controlled by a disk controller 18, or an external source such as terminals through a communications controller 20.
Cache memories lp - Np are each organized as a pseudo least-recently-used (LRU) set associative memory.
As new data are stored in one of the cache memories, previously stored data are pushed down the cache memory until the data are pushed out of the cache memory and lost. Of course, the data can be copied to main memory 14 or another cache memory before the data are pushed out of the cache memory. The cache context of a process with respect to an engine "erodes as data associated with a process is pushed out of the cache memory of the engine.
A scheduler determines which engine will run a process, with a highest priority process running first.
On a multi-processor system, the concept of priority is extended to run the highest n number of priority processes on the m number of engines available, where m = n unless some of the engines are idle. In system 10, the scheduler is a software function carried on by the UNIX operating system that allocates engines to processes and schedules them to run on the bases of priority and engine availability. The scheduler uses three distinct data structures to schedule processes: (1) a global run queue 34 (Fig. 2), (2) a floating point accelerator (FPA) global run queue, and (3) an engine affinity run queue 38 (Fig. 3) for each engine. The FPA global run queue is the same as global run queue 34 except that the FPA global run queue may queue processes requiring FPA hardware.
Fig. 2 illustrates the prior art global run queue 34 used by system 10. Referring to Fig. 2, global run queue 34 includes an array qs and a bit mask whichqs.
Array qs is comprised of 32 pairs (slots) of 32-bit words, each of which points to one linked list. The organization of the processes is defined by data structures. Each slot includes a ph~link field and a ph~rlink field, which contain address pointers to the first address of the first process and the last address of the last process, respectively, in a double circularly linked list of queued processes. The 32 slots are arranged in priority from 0 to 31, as listed at the left side of Fig. 2, with priority 0 being the highest priority.
The bit mask whichqs indicates which slots in the array qs contain processes. When a slot in qs contains a process, whichqs for that slot contains a-"l".
Otherwise, the whichqs for that slot contains a "0". When an engine looks for a process to run, the engine finds the highest priority whichqs bit that contains a 1, and dequeues (i.e., detaches) a process from the corresponding slot in qs.
Fig. 3 illustrates the affinity run queue 38 used by system 10. Under default condition, after a process becomes runnable, it is enqueued (i.e., joined) to either global run queue 34 or the FPA global run queue, rather than to an affinity run queue 38. However, a process may be "hard affinitied" to run only on a particular engine. In that case, the process is enqueued only to the affinity queue 38 for that engine (rather than a global run queue) until the hard affinity condition is ended. Of course, there are times, for example, when it is asleep, when a hard affinitied process is not queued to any run queue.
Referring to Fig. 3, each one of engines lp - Np is associated with its own affinity run queue 38. Each affinity run queue 38 has an e~head field and an e tail data structure, which contain the address pointers to the first and last address, respectively, of the first and last processes in a doubly circularly linked list of affinitied processes. When a process is hard affinitied to an engine, it is enqueued in FIFO manner to the double circularly linked list of the affinity run queue 38 that corresponds to the engine. The FIFO arrangement of each linked list is illustrated in Fig. 3. Each of the linked lists of the slots of global run queue 34, shown in Fig.
2, has the same arrangement as the linked list shown in Fig. 3.
Affinity run queue 38 differs from global run queue 34 in the following respects. First, global run queue 34 has 32 slots and can, therefore, accommodate 32 linked lists. By contrast, each affinity run queue 38 has only one slot and one linked list. Second, as a consequence of each affinity run queue 38 having only one linked list, the particular engine corresponding to the affinity run queue 38 is limited to taking only the process at the head of the linked list, even though there may be processes having higher priority in the interior of linked list. Third, the linked list of processes must be emptied before the engine can look to a global run queue for additional processes to run. Accordingly, affinity run queue 38 does not have a priority structure and runs processes in round robin fashion. Fourth, as noted above, only hard affinitied processes are enqueued to affinity queue 38.
Because of the non-dynamic and explicitlyinvoked nature of hard affinity, it is used mostly for performance analysis and construction of dedicated system configurations. Hard affinity is not used in many customer configurations because the inflexibility of hard affinity does not map well to the complexity of many realworld applications.
The lifetime of a process can be divided into several states including: (1) the process is "runnable," (i.e., the process is not running, but is ready to run after the scheduler chooses the process), (2) the process is executing (i.e., running) on an engine, and (3) the process is sleeping. The second and third states are well known to those skilled in the art and will not be described herein in detail.
When a process is runnable, the scheduler first checks to see whether the process is hard affinitied to an engine. If the process is hard affinitied, it is enqueued onto the FIFO linked list of the affinity run queue 38 associated with the engine.
If the process is not hard affinitied to an engine and is not marked for FPA hardware, then the process is queued on one of the linked lists of qs in global run queue 34 according to the priority of the process. The appropriate bit in whichqs is updated, if necessary. If the process is not affinitied, but has marked itself as requiring FPA hardware, the process is queued to one of the linked lists of fpa qs in the FPA global run queue, and the appropriate bit in fpa whichqs is updated, if necessary, where fpa~qs and fpa~whichqs are analogous to qs and whichqs.
When an engine is looking for a process to run, the engine first examines its affinity run queue 38. If affinity run queue 38 contains a process, the first process of the linked list is dequeued and run. If affinity run queue 38 for a particular engine is empty, then the scheduler examines whichqs of global run queue 34 and fpa whichqs of the global FPA run queue to see whether processes are queued and at what priorities. The process having the higher priority runs first. If the highest priorities in whichqs of global run queue 34 and fpa whichqs in the FPA global run queue are equal, the process in the FPA format runs first.
A goal of system 10 is to achieve a linearly increasing level of "performance" (i.e., information processing capacity per unit of time), as engines and disk drives are added. An obstacle to meeting that goal occurs when there is insufficient bus bandwidth (bytes per unit time period) to allow data transfers to freely flow between subsystem elements. One solution would be to increase the bandwidth in system bus 12p. However, the bandwidth of system bus 12p is constrained by physical cabinet and connector specifications.
The problem of inadequate bandwidth is exacerbated because system 10 allows customers to add additional disk drives and engines to increase the value of- the number Np after the system is in the field. In addition, in system 10, engines lp - Np and the disk drives may be replaced with higher performance engines and disk drives. Increased engine performance increases the number of instructions processed per operating system time slice.
This in turn requires larger cache memories on the processor boards in an effort to reduce memory-to-processor traffic on the main system bus.
However, cache-to-cache bus traffic increases along with the cache memory size thereby frustrating that effort.
Likewise, adding multiple disk drives increases the requirement for disk I/O bandwidth and capacity on the bus.
When a process moves from a previous engine to a new engine, there is some cost associated with the transition. Streams of cache data move from one engine to another, and some data are copied from main memory 14.
Certain traffic loads, database traffic loads in particular, may result in a bus saturation that degrades overall system performance. Data are transferred over system bus 12p as data are switched from main memory 14p or the previous cache memory to the new engine and the new cache memory. However, each time a process runs from the global run queue, the odds that the process will run on the same engine as before approaches l/m, where m is the number of active on-line engines. On a large system, m is usually 20 or more, giving less than a 5% chance that the process will run on the same engine as before. However, it is difficult to accurately characterize the behavior of an operating system. The actual odds will, of course, depend on CPU and I/O load and the characteristics of the jobs running.
In many situations, it is desirable for an engine to stop running an unfinished process and perform another task. For example, while an engine is running one process, a higher priority process may become runnable.
The scheduler accommodates this situation through a technique called "nudging." A nudge is a processor-to-processor interrupt that causes a destination processor to re-examine its condition and react accordingly. In the case of a higher priority process, the "nudged' destination engine will receive the interrupt, re-enter the operating system, notice that there is higher priority work waiting, and switch to that work. Each nudge has a corresponding priority value indicating the priority of the event to which the engine responds. As an optimization, the priority of the nudge pending against an engine is recorded per engine. When nudge is called for priority less than or equal to the value already pending on the engine, the redundant nudge is suppressed.
When a process becomes runnable, the scheduler scans engines lp - Np for the engine(s) running the lowest priority process(es). If the newly runnable process has an equal or greater priority than the presently running processes, the engine (or one of the engines) with the highest priority (e.a., engine 1p) is "nudged" to reschedule in favor of the newly runnable process.
Consequently, a process (e.a., process X) ceases to run on engine lp, at least temporarily. During the time other processes are running on engine lp, the cache context for process X erodes.
Two problems with the prior art scheduler are illustrated by considering what happens when process X (in the example above) becomes runnable. First, if process X is not hard affinitied, it is enqueued to a global run queue. However, as noted above, there is only approximately a l/m chance that process X will next run on engine lp. Therefore, even though the cache context for process X may be very high in cache lp of engine lp, process X will probably be run on another engine. If process X is run on another engine, some of the capability of system 10 will be used in moving data over system bus 12p. As data is moved over system bus 12p to the other engine, system performance may be reduced.
Second, if process X is hard affinitied, it will be enqueued onto affinity run queue 38 of engine lp, regardless of how many other processes are enqueued onto affinity run queue 38 of engine lp and regardless of whether other engines are idle. Therefore, system performance may be reduced because of idle engines.
Thus, the prior art scheduler poorly reuses cache memory unless the flexibility of symmetrical multiprocessing is given up by using hard affinity.
Therefore there is a need for a scheduler that causes a runnable process to be enqueued onto the affinity run queue of an engine when the cache context (or warmth) of the process with respect to the engine is sufficiently high, and to be enqueued onto a global run queue when the cache context is sufficiently low. Additionally, periodic CPU load balancing calculations (sched cpu()) could be improved to maintain a longer-term view of engine load and to cause redistribution of processes if a significant excess of processes exists at any particular engine. Further, such redistribution of processes could consider the priority of the processes to be moved.
As will be appreciated from the following description of a preferred embodiment with reference to the drawings, the present invention provides a linear performance increase as engines having higher performance microprocessors and larger cache memories are added to a system. The preferred embodiment further provides a scheduler that enqueues processes to either an affinity run queue or a global run queue so as to, on average, maximize performance of a multi-processor computing system. It will be further appreciated that such preferred embodiment optimizes the assignment of processes to engines in an attempt to minimize engineto-engine movement of processes and their related cache memory context and in addition increases the effective bus bandwidth in a multi-processor computing system by reducing the amount of unnecessary bus traffic. These achievements are secured by implementing data structures and algorithms that improve the process allocating efficiency of the process scheduler by reducing cacheto-cache traffic on the bus and thereby improve the overall computing system performance. The scheduler uses the concept of cache context whereby a runnable process is enqueued onto the affinity run queue of an engine when the estimated cache context of the process with respect to the engine is sufficiently high, and is enqueued onto a global run queue when the estimated cache context is sufficiently low. A premise underlying the operation of the present invention is that it is often more efficient to wait for a busy engine where cache context already exists than to move to a waiting engine where cache context will need to be transferred or rebuilt.
A preferred embodiment of the invention will now be described, by way of example only, reference being made to the accompanying drawings in which: Fig. 1 is a block diagram of the major subsystems of a prior art symmetrical multi-processor computing system.
Fig. 2 is a schematic diagram of a prior art global run queue.
Fig. 3 is a schematic diagram of a prior art engine affinity run queue.
Fig.4 is a block diagram of the major subsystems of a symmetrical multi-processor computing system operating in accordance with the present invention.
Fig. 5A is a schematic diagram of a global run queue and according to the present invention.
Fig. 5B is a simplified version of the diagram of Fig. 5A.
Fig. 6 is a schematic diagram of an affinity run queue according to the present invention.
Fig. 7 illustrates relationships among data structures according to the present invention.
Fig. 8 illustrates relationships among data structures of the present invention from the perspective of the process data structure.
Fig. 9 illustrates relationships among data structures of the present invention from the perspective of the engine data structure.
Hardware A preferred embodiment of the present invention is implemented in a symmetrical multi-processor computing system 50, shown in Fig. 4. Referring to Fig. 4, system 50 includes N number of computing engines denominated engine 1, engine 2, engine 3, ..., engines N (collectively "engines 1 - N"). Each one of engines 1 - N has a local cache memory denominated cache 1, cache 2, cache 3, cache N, respectively ("collectively caches 1 - N"), each of which is organized as a pseudo LRU FIFO, described above. The hardware of system 50 may be identical to the hardware of prior art system 10, with the only changes being software additions and modifications.
Alternatively, in addition to the changes in software, one or more of engines 1 - N may be different from the engines of engines lp - Np. Caches 1 - N and main memory 14 may have different capacities from those of caches lp - Np and main memory 14p, respectively. System bus 12 may have a different number of conductors from those of system bus 12p. Additional potential modifications and additions to system 10 are described below.
Overview of data structures In prior art system 10, each run queue a process could be scheduled from had a discrete data structure.
Global run queue 34 included whichqs and qs. FPA global run queue included whichqs~fpa and qs~fpa. Each engine's affinity run queue included e~head and e~tail.
By contrast, in the preferred embodiment, a single data structure, struct runq, is used instead.
where prior art system 10 treated each kind of scheduling data structure with special-case code, the preferred embodiment applies the same code, changing only which instance of struct runq it is operating upon.
As used herein, "cache context" is a measure of how much of the data associated with a process is in a cache memory. When the data is initially copied from main memory 14 to a cache memory, the cache context of the cache memory with respect to the process is high (in fact, 100%). The cache context of the cache memory with respect to the process decreases or erodes as data in the cache are pushed out of the cache memory as data not associated with the process are added to the cache memory. A cache memory is "warm" if the estimated amount cache context is above a certain level. A cache memory is "cold" if the estimated amount of cache context is below a certain level. A process has "cache affinity" with respect to an engine if a pointer (*p rq) of the process points to the affinity run queue, described below, of the engine.
System 50 includes at least one global run queue, such as global run queue 54 shown in Figs. 5A and 5B, and an affinity run queue 58 shown in Fig. 6 for each engine 1 - N. Global run queue 54 and affinity run queue 58 are examples of the "struct runq" data structure, described below. Fig. 5B is a simplified version of Fig.
5A. The structures of global run queue 54 and affinity run queue 58 are similar to the structure of global run queue 34 in that they may queue processes in different linked lists, according to priority. Each linked list. in the multiple slots of global run queue 54 and affinity run queue 58 has the same structure as that of the linked list in the single slot of prior art affinity run queue 34, shown in Fig. 3.
Although each run queue has the same data structure as that of global run queue 54, particular types of processes may be queued to only a certain type of run queue. For example, a first group of engines 1 - N could contain Intel 386 microprocessors, a second group of engines 1 - N could include Intel 486 microprocessors, and a third group of engines 1 - N could contain FPA-equipped Intel 386 microprocessors. In this example, each engine would point to its own affinity run queue 58. In addition, the first group of engines 1 - N would point to global run queue 54. The second group of engines 1 - N would point to a 486 type global run queue. The third group of engines 1 - N would point to an FPA global queue.
System 50 could include additional types of global run queues including global run queues for engines having an expanded instruction set, a reduced instruction set, onchip cache, or other properties. In the case of an;engine with a microprocessor with on-chip cache, the present invention preferably would optimize the use of both onchip and on-board cache.
In some circumstances, a process may be enqueued at different times to more than one type of global run queue. For example, a process that is compatible with the Intel 386 format may be able to run on both an Intel 386 and an FPA engine. In that case, depending on the demands on the different types of engines, the process could be enqueued to either global run queue 54 or the FPA global run queue.
The scheduler according to the present invention comprises the conventional UNIX scheduler to which is added the new and changed data structures and algorithms described herein.
When a process becomes runnable, the scheduler selects the run queue to which the process is to be enqueued. System 50 may use any conventional means to enqueue a process to a run queue. The scheduler selects the run queue by considering an estimation of how much cache context (if any) the process has with respect to the cache of an engine. The estimation of cache context with respect to a process is based on the number of user (as opposed to kernel) process clock ticks an engine has executed since the last time it ran the process.
The process clock ticks are produced by a clock routine, named hardclock. The hardclock routine is entered for each engine one hundred times a second. If the routine is entered during a time when a particular engine is running a user process, then a 32-bit counter associated with the particular engine is incremented.
Engines 1 - N include counters 1 - N, respectively, shown in Fig. 4. For example, counter 2 is included with engine 2. The functions of hardclock and counters I - N may be performed either by existing hardware in prior art system 10 with additional software, or by additional hardware and software.
As each process leaves an engine, a pointer (*p~runeng) that points to the engine is stored. The value (p~runtime) of the counter of the engine is also stored. For example, at time t1, process X leaves engine 2. Accordingly, *p~runeng = engine 2 and the count (p~runtime) of counter 2 at time t1 are stored. At time t21 the process becomes runnable again. At time t3, the scheduler calculates the difference (Dep) between the stored p~runtime and the count (e~runtime) of counter 2 at time t3. De.p is inversely related to the probable amount of cache context remaining. The scheduler uses De.p in estimating how much cache context remains for the process with respect to the engine.
An engine is pointed to by and can run processes from two or more run queues. In the examples described herein, system 50 employs three types of run queues, each having the identical data structure: a global UNIX run queue 54, an FPA global run queue, and one affinity run queue 58 for each engine. When an engine is activated, it is pointed to by a list of the appropriate run queues.
Processes are generally initially attached to the global run queue, and may be moved to other run queues as described below.
Conceptually, a process does not choose to run on a particular engine; instead, a process is enqueued to a run queue, and then is run by an engine that is a member of an engine list pointed to by the run queue. If the engine list contains only a single engine, the run queue is an affinity run queue and the process is affinitied to the engine. If the engine list contains only FPA-equipped engines, the run queue is an FPA run queue and the process has FPA affinity. A global run queue points at an engine list that contains all of the engines on the system that will run processes of the type queued to the global run queue.
Each process has a data structure that has two pointers to run queues: a current run queue pointer (*p~rq) and a home run queue pointer (*p rqhome). The current first pointer indicates the run queue to which the process is enqueued when it becomes runnable. The home run queue pointer indicates the home run queue of the process. When a process is first created, both pointers generally point to a global run queue. (The home run queue may be an affinity run queue if the process is hard affinitied to an affinity run queue.) However, when a process is moved to an affinity run queue (because of sufficient cache context), the current run queue pointer is moved, but the home pointer is unchanged. If the process needs to move from its current run queue (because of insufficient cache context or the engine is shutting down), the current run queue pointer of the process is moved back so that the current run queue pointer points to the home run queue. For an FPA process, the home run queue pointer points to an FPA global run queue. This allows the scheduler to apply cache affinity to more than one global scheduling pool of processes, without the need for consideration of special cases.
The following sequence of operations is exemplary of the handling of processes by the cache affinity scheduler of the present invention. When a process is first created, it is attached to its current run queue which is generally the global run queue. If the process has a higher priority than that of the process currently running in any engine that is a member of the engine list for the current run queue, the engine is nudged to decide whether to immediately run the newly enqueued process in place of the running process.
In addition, an engine can become idle and look for a runnable process among any of the run queues that are on the list of run queues for that engine. The engine then selects the highest priority process found, and runs it. Sometime later the process will cease running, at which time the counter value (p runtime) for the process is stored. Often when a process stops running it enters a sleeping state in which the process waits for another action such as a key stroke prior to becoming runnable again.
When the process subsequently becomes runnable, cache context becomes a consideration in deciding to which run queue the process should be enqueued. The scheduler first examines the p flag field of the process to determine whether the cache affinity bit (SAFFIN) is set (i.e., = 1). If the cache affinity bit is set, the scheduler considers whether the process has cache affinity in deciding in which run queue the process will be enqueued.
The scheduler next inspects the engine on which the process last ran to determine the current counter value for that engine (e~runtime). De.p = e runtime p~runtime is the accumulated clock tick value for other user processes that have run or are running on the engine since the process last ran there. If De.p is low (e.a. less than 3), the estimated cache context is high.
Accordingly, on average, the performance of system 50 will be increased by enqueuing the process to the affinity run queue rather than to a global run queue. In that case, the process switches its current run queue pointer from the process' home run queue to the affinity run queue for that engine. If Dep is high (e.a. more than 15), the estimated cache context is low and the process is moved back to its home run queue.
Data structure descriptions The cache affinity scheduler employs a set of data structures and algorithms that handle processes according to the general description given above. Some of the data structures are new, and others are existing data structures for which additional fields have been defined.
For existing data structures, the added fields are described. Fields not disturbed in the conventional UNIX data structures are indicated by "..." in the listings.
For new data structures, the entire declaration is included.
1. Added fields in the process data structure struct proc struct runq *p rqhome; /* home run queue of process */ struct runq *p~rq; /* current run queue */ ulong p runtime; /* eng time when last run */ struct engine *p~runeng; /* eng the process last ran on */ &num;define SAFFIN 0x4000000 /* use affinity in scheduling */ The following is an explanation of the added process data structure fields: *p rqhome and *p rq are the home and current run queue pointers. As described below, *p rg points to the run queue to which the process will enqueue itself.
Therefore, if the process chooses to enqueue itself to a different run queue (because of cache affinity considerations or an explicit hard affinity request), the *p~rq field is updated accordingly. *p~rqhome keeps track of the base or home run queue of the process. Absent hard affinity, *p rqhome points to a particular global run queue, depending on the type of process. For example, if the process is an FPA type process, *p rqhome for the process points to the FPA global run queue.
p runtime holds the engine hardclock counter value at the time this process last ran.
*p~runeng is a pointer to the engine this process last ran on.
SAFFIN (cache affinity bit) is a new bit in the existing p flag field. Cache context will be considered only for processes having this bit set. This bit is inherited through fork(), and all processes initiated from initial startup of the system will have the cache affinity bit set. The bit is cleared when a process hard affinities itself to an engine, as cache affinity is then a moot factor.
2. Added fields in the engine data structure struct engine ( ...
int e npri; /* priority of current process */ struct runql *e~rql; /* list of run queues to run from */ struct runq *e~rq; /* affinity run queue of engine */ ulong e~runtime; /* clock for cache warmth calc */ struct runq *egushtot/* load balancing, where to push */ int egushcnt; /* # processes to push there */ }; The following is an explanation of the added fields in the engine data structure: e~npri is a field used in the engine data structure of prior art system 10. Although e npri is not added by the present invention, e~npri is included here because it is discussed below with respect to the timeslice algorithm. e~npri records the priority of a process the engine may be currently running. The scheduler uses e~npri to correct for ties in priority of processes so that processes from certain run queues are not continuously ignored.
e rql maintains the linked list of the run queues from which this engine schedules.
e~rq indicates the affinity run queue for this engine (i.e., a run queue whose only member is this engine).
e~runtime is the engine counter value that is compared with p~runtime to calculate the amount of cache context (cache warmth) remaining for this engine.
epushto identifies the engine to which processes will be moved if process load balancing is required. The algorithms controlling load balancing are described below.
egushcnt identifies the number of processes that will be moved to a different engine if load balancing is used.
3. Run queue data structure /* a place to enqueue a process for running */ struct runq ( int r~whichqs; /* bit mask of runq priority levels with waiting processes */ struct prochd r~qstNQS]; /* Run queues, one per bit in r whichqs */ int remembers; /* &num; processes belonging to this queue */ int r emembers; /* &num; engs scheduling from this queue */ struct engl *r engs; /* a list of those engines */ unsigned r flags; /* miscellaneous flags*/ struct runq *r act; /* a pointer to next active runq */ The following is an explanation of the run queue data structure fields: r whichqs and yqs correspond to the structures whichqs and qs used in prior art global run queue 34.
prochd is the pair of ph link and ph~rlink (which are described in connection with Fig. 2) for each slot in a run queue according to the present invention. Each bit in r whichqs corresponds to an index in r qstNQS]; the bit is set if there is a process queued in that slot. "NQS" means the "number of queue slots," for example, 32 slots.
r~pmembers and r~emembers count the number of processes and engines, respectively, belonging to this run queue.
*r engs is a pointer to a linked list of all engines scheduling from this run queue.
r~flags holds miscellaneous flags.
*r~act is a pointer to a singly-linked list of all run queues active on the system. It is used primarily by timeslice() to implement timeslicing priority among processes of equal priority on the system. Timeslicing is discussed below.
4. Runa list and engine list data structures struct runql struct runq *rqlrunq; struct runql *rqlnext; struct engl struct engine *el~eng; struct engl *el~next; The struct runql and struct engl data structures define circularly linked lists of run queue and engine members. The struct runql statement defines the circular list of run queues to which an engine belongs, and is pointed to from the *e~rql field of the engine data structure. The struct engl statement defines the circular list of engines that belong to a run queue, and is pointed to from the *r~engs field of the run queue data structure.
The lists are organized circularly to allow implementation of a conventional round robin scheduling routine. To avoid scheduling inequalities, the scheduling code sets its list pointer (*e~rql for engines; *r~engs for run queues) to the last entry operated upon, and starts looping one entry beyond the last entry. Because the lists are circular, the implementation requires only the assignment of the list pointer.
Figs. 7, 8, and 9 illustrates relationships among various data structures according to the present invention. Fig. 7 illustrates only a single engine list and a single run queue list, whereas, there are actually multiple lists of engines and multiple lists of run queues. Fig. 8 illustrates relationships among data structures of the present invention from the perspective of the process data structure, for a single process.
Fig. 9 illustrates relationships among data structures of the present invention from the perspective of the engine data structure, for a single engine.
Pseudo-code for algorithms The following is a description of the algorithms that govern the operation and relationship of processes, run queues, engines, and lists according to the present invention. The algorithms are expressed in pseudo-code format below. Multi-processor system 50 may use any conventional means to perform the functions of the algorithms, which are described below in detail.
1. Set process runnable (setrun/setra) The following algorithm is called setrun/setrq: If process allows cache affinity calc affinity.
Insert process in r~qs, update r whichqs.
Find lowest priority engine in run queue.
If it is lower than the process Nudge the engine.
When it is newly created, or has awakened from a sleeping state, a process is set runnable by the above setrun/setrq algorithm. The run queue in which the process will be placed is a function of whether it ever ran before, where it may have run before, and the calculated amount of cache context for the process. The scan for the lowest-priority engine traverses the *r engs list from the run queue data structure. If the process is attached to an affinity global run queue, then the lowest priority engine is the only engine associated with an affinity run queue.
2. Calculate cache affinitv (calc~affinity) The calculation of cache affinity (i.e., the calc~affinity of the setrun/setrq algorithm) of a newly runnable process is described in the pseudo-code routine below. The following algorithm is called calc~affinity: If process never ran return If process is currently on affinity run queue If no cache warmth or shutdown Leave the affinity run queue.
Else If cache warmth and not shutdown Join the affinity run queue.
This pseudo-code represents the basic process for utilizing cache affinity: if the process has cache warmth, attach the process to the affinity run queue; if the cache is cold, attach the process to its home run queue. The exact number of clock ticks for "cold" and "warm" cache values are patchable parameters, to allow implementation specific applications. A value of De.p less than a lower limit L1,, indicates a warm cache. A value of De.p greater than an upper limit LwXr indicates a cold cache. In a preferred embodiment, Lower = 3 and Lupper = 15.
If the value of De.p is between Llower and zero the scheduler considers the current state of run queue pointer *p~rq in deciding in which run queue to enqueue a process.
As described above, if a process is affinitied to an engine, *p~rq points to the affinity run queue of that engine. If the process is not affinitied, then *p~rq points to the home run queue, which is typically global run queue 54. In essence, the algorithm states, if a process is not affinitied, then the run queue to which *p~rq points will not change unless the cache context is high. If a process is affinitied, then the run queue to which *p rq points will not change unless the cache context is low. The gap between Llower and Lupper thus builds hysteresis into the run queue switching algorithm and prevents pointer oscillations.
The hysteresis scheme is summarized in the table, below: Run queue process De-D *nrg rg engueued to De#p < Lower global affinity affinity affinity Other < Dep # Lupper global global affinity affinity De-p > Lupper global global affinity global As can be seen from the table, if De-p < LLoer the process is enqueued to the affinity run queue of the engine (*p~runeng) on which the process last ran, regardless of whether *p~rq points to the affinity run queue or the global run queue. If Lower S De-p # Lupper, then the process is enqueued to whatever run queue *p rq points to. If De.p > Luppper, then the process is enqueued to the global run queue, regardless of whether *p rq previously pointed to the affinity run queue or the global run queue.
In the case where De.p > Wupper, if *p~rq previously pointed to the affinity run queue, *p rq is changed to point to the global run queue.
The hysteresis scheme is illustrated by the following example. At time to, both *p rq (current run queue pointer) and *p~rqhome (home run queue) of process X point to global run queue 54. At time t1, process X is run by engine 1, and *prq points to engine 1. At time t2, engine 1 stops running process X, which then goes to sleep. At time t2, the count of the counter of engine number 1 is C1, which is stored in memory as p~runtime. At time t3, process X becomes runnable, and at time t4, the scheduler decides whether to enqueue runnable process X to the affinity run queue 58 of engine 1 or to global run queue 54. At time t4, the count of the counter of engine 1 is C1 + 5, which is stored as e~runtime. Therefore, Dep (C1 + 5) - C1 = 5; As noted above, in a preferred embodiment, the Rawer = 3 and LUpper = 15. Because, L,, s 5 #Lupper, *p~rq continues to point to the global run queue.
Continuing the example, at time t5, process X is run by, for example, engine 5. Therefore, *p rq points to engine 5. At time t6, engine 5 stops running process X, which then goes to sleep. At time t6, the count of the counter of engine number 5 is C2, which is stored in memory as p~runtime. At time t7, process X becomes runnable, and at time t8, the scheduler decides whether to enqueue runnable process X to the affinity run queue 58 of engine 5 or to global run queue 54. At time t8, the count of the counter of engine 1 is C2 + 2, which is stored as e runtime. Therefore, Dep = (C2 + 2) - C2 = 2. Because, Desp = 2 < Llr, process X is enqueued to the affinity queue 58 of engine 5.
Then, the next time process X becomes runnable, the scheduler will decide whether process X should be enqueued to the affinity queue 58 of engine 5 or global run queue 54. However, because process X is affinitied to engine 5, De.p must be greater than Llower = 15 in order for process X to be enqueued to global queue 54.
In a preferred embodiment, the calculation of De.p is made before the decision of which run queue to place the process. There is some latency time between the time the decision of which run queue to place the process in and the time that the process is actually run on an engine. The cache context for that process may have eroded during the latency time. Therefore, the latency time should be considered in choosing the values for Llower and L,. The relatively low values assigned to Ltower and in in the preferred embodiment compensate somewhat for cache context "cooling" during the latency time.
3. Switch to a new process (swtch) The following algorithm is called swtch: Record current engine, engine time in proc Loop: If shutdown Shut down.
Find highest priority process in run queue.
If found something to do Run it.
idle (returns runq) If idle found something Run it.
End loop.
The first step updates the p~runtime and *p runeng fields. These are then used by the setrq() algorithm to implement cache affinity. The loop also calls a function to find the run queue containing the highest priority process under the engine's list. If a run queue with a runnable process is found, the next process from that run queue is dequeued and run. If a runnable process is not found, a subroutine, idle(), is called to implement idleness. Idle() also returns a run queue as idle() had this information available to it.
This loop then takes the next process from this run queue, and runs it. Idle() can also detect that the idling engine has been requested to shutdown. In this case, idle() runs without a run queue. This causes swtch to go back to the top of its loop, detect that the engine has been requested to shutdown, and shut itself down.
4. Priority and load balance algorithms In a multi-engine, multi-run queue system, there is a need to periodically assess and adjust the priority of processes and the engines on which those processes are queued to run on. The three major algorithms are: (1) timeslice(), which timeshares processes of equal priority within a particular run queue slot; (2) schedcpu(), which periodically adjusts the priority of processes assigned to different run queue slots in the same run queue; and (3) load~balance(), which periodically moves processes from one run queue to another to average the amount of work to be performed by each engine. The pseudo-code for these algorithms is given below.
a. Cause timeslicing (timeslice) The following algorithm is called timeslice: For each active run queue Find highest priority waiter.
If higher than or equal to lowest priority engine, Nudge engine.
The timeslicing algorithm is unchanged from the one in the conventional UNIX scheduler. What has changed is the way in which the algorithm is applied to the affinity run queues, global run queue 54, and the FPA run queue. In the system code of prior art system 10, both the FPA and affinity run queues were special cases. In this invention, the same data structure (struct runq) is used for all types of run queues, thereby making it possible to generalize the code and run the same algorithm across each run queue on the active list. There is a possible problem when an engine is a member of more than one run queue. However, the e npri field correctly indicates what priority is pending on that engine (via nudge), so each successive run queue, as it is timesliced, will treat the engine accordingly.
b. Change process priority (schedspu) The schedcpu() algorithm is unchanged from the one used in the conventional UNIX schedulers.
c. Cause load balancing (load balance()) The following algorithm is called load~balance: Scan all on-line engines Record engine with lowest maxnrun value Record engine with highest maxnrun value.
If lowest is two less than highest Move (highest-lowest)/2 processes from highest to lowest.
Clear maxnrun value for all engines.
d; Calculate maxnrun The following algorithm is called runemaxnrun: For each on-line engine Count how many processes are queued If engine is running add one to this count If count is greater than maxnrun for this engine Add 1/8 to maxnrun for this engine.
The maxnrun routine collects information about the overall process load of the various engines. The value of maxnrun is used in the load~balance algorithm.
By sampling the number of processes queued to each engine, the routine approximates how many processes are competing for each engine. By incrementing the maxnrun value in 1/8th count intervals, the routine filters the value and prevents utilization spikes from adversely skewing the maxnrun value. maxnrun is sampled 10 times per second.
The runq~maxnrun algorithm could delete the step of adding one to the count if an engine is running.
The load~balance routine runs every five seconds, which corresponds to 50 samples of the maxnrun value for each engine. The load~balance routine identifies significant load imbalances and then causes a fraction of the processes to move from the most loaded engine to the least loaded engine. Maxnrun is cleared after each sampling interval. When there are ties among the most loaded or least loaded engines, the load~balance routine operates on the first tie found. Round robin scanning is used to minimize favoritism" on the part of the load balancing routine.
The advantage of the multi-run queue algorithm is that the scheduling code paths continue to be as short as they were in the prior art. The cache affinity decision is made once at the time the process becomes runnable, and there is no potential for the same process to be considered repeatedly as each engine looks for work.
Because there are separate run queues, there is also the possibility of moving the run queue interlock into the run queue itself, thus allowing multiple engines to schedule and dispatch their workloads in parallel.
Alternative embodiments of the invention It will be obvious to those having skill in the art that many changes may be made to the details of the above-described embodiment of this invention without departing from the underlying principles thereof.
For example, the invention is also applicable to multi-processor computing systems other than those using UNIX operating systems.
System 50 could include more than one type of engine, but only one global run queue. The global run queue could queue processes of more than one type, such as, for example, 386 type processes and FPA type processes.
The calculation of cache context can be made closer to the time that a process is actually run, for example, when there is only one process in front of the process in question.
The estimation of cache context may consider kernel processes as well as user processes. For example, the counter of an engine could be incremented when the hardclock routine is entered while an engine is running a kernel process.
In the preferred embodiment described above, the scheduler considers only the value of De.p and whether the process is affinitied or unaffinitied in deciding whether a process should be enqueued to an affinity run queue or a global run queue. Alternatively, the scheduler could consider other factors such as the number and/or priority of processes in the affinity run queue. The scheduler could also consider how many processes there are in other run queues and how much data are expected to pass over system bus 12 in the next short time period.
In the preferred embodiment, there is one cache memory for each engine. Alternatively, an engine could have more than one cache memory or share a cache memory with one or more other engines.
In the preferred embodiment, the same data structure is used for each run queue. Alternatively, different data structures could be used for different types of run queues.
The preferred embodiment employs load~balance.
Alternatively or in addition, an engine could "steal" work as follows. An idle engine could scan the affinity run queues of other engines for waiting processes that could be run on the idle engine. This could have the effect of the load~balance algorithm, but might achieve this effect with less latency. This technique could defeat the effects of cache affinity by causing many more engine-toengine process switches than would occur otherwise. The cases where this technique can be used effectively are thus determined by the speed of the engines, the size of the caches, and the CPU utilization characteristics of the processes being scheduled.

Claims (6)

1. A computing system, comprising: multiple computing engines that run processes and are associated with respective affinity run queues, respective particular numbers of the processes being associated with each computing engine, the respective particular numbers being at least zero; storage means for storing multiple variables each having a value and each respectively associated with the multiple computing engines, each respective particular number corresponding to one of the variables; sampling means for repeatedly sampling the respective particular numbers of the processes associated with each computing engine; determining means for determining which of the respective particular numbers of processes are greater than the corresponding variable values; increasing means for increasing each one of the variable values for which a corresponding respective particular number is determined to be greater; and moving means for transferring certain ones of the processes from one of the affinity run queues associated with one of the computing engines associated with a highest variable value to one of the affinity run queues associated with one of the computing engines associated with a lowest variable value.
2. The system of claim 1 in which each one of the respective particular number of the processes is an integer equal to a number of the processes in the affinity run queue of the respective computing engine plus one if one of the processes is being run by the respective computing engine when a sample is made.
3. The system of claim 2 further comprising priority considering means for considering a priority of one of the processes in determining whether the process should be transferred.
4. A computing system, comprising: multiple computing engines that run processes and are associated with respective affinity run queues, respective particular numbers of the processes being associated with each computing engine, the respective particular numbers being at least zero; storage means for storing multiple variables each having a value and each respectively associated with one of the multiple computing engines, each respective particular number corresponding to one of the variables; determining means for determining which of the respective particular numbers of processes are greater than the corresponding variable values; increasing means for increasing each one of the variable values for which a corresponding respective particular number is determined to be greater; and moving means for transferring certain ones of the processes from one of the affinity run queues associated with one of the computing engines having a particular variable value to another one of the affinity run queues associated with one of the computing engines associated with a lower variable value.
5. The system of claim 4 further comprising priority considering means for considering a priority of one of the processes in determining whether the process should be transferred.
6. A computing system substantially as hereinbefore described with reference to, and as illustrated in, the accompanying drawings.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997006484A1 (en) * 1995-08-08 1997-02-20 Novell, Inc. Method and apparatus for strong affinity multiprocessor scheduling
EP0806730A2 (en) * 1996-05-06 1997-11-12 Sun Microsystems, Inc. Real time dispatcher

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1997006484A1 (en) * 1995-08-08 1997-02-20 Novell, Inc. Method and apparatus for strong affinity multiprocessor scheduling
US6728959B1 (en) 1995-08-08 2004-04-27 Novell, Inc. Method and apparatus for strong affinity multiprocessor scheduling
EP0806730A2 (en) * 1996-05-06 1997-11-12 Sun Microsystems, Inc. Real time dispatcher
EP0806730A3 (en) * 1996-05-06 1998-03-11 Sun Microsystems, Inc. Real time dispatcher
US5826081A (en) * 1996-05-06 1998-10-20 Sun Microsystems, Inc. Real time thread dispatcher for multiprocessor applications
US6779182B1 (en) 1996-05-06 2004-08-17 Sun Microsystems, Inc. Real time thread dispatcher for multiprocessor applications

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