GB2280573A

GB2280573A - Half duplex circuit for a local area network

Info

Publication number: GB2280573A
Application number: GB9315897A
Authority: GB
Inventors: Francis Yun-Tai Hung; Andrew Paul Lefevre; Peter John Lee
Original assignee: Northern Telecom Ltd
Current assignee: Nortel Networks Ltd
Priority date: 1993-07-31
Filing date: 1993-07-31
Publication date: 1995-02-01
Anticipated expiration: 2013-07-31
Also published as: GB2280573B; GB9315897D0

Abstract

In a local area network, a half duplex circuit controls transmission over a two-wire link to a user terminal. Line drivers (20L, 20R) are selectively enabled via line circuit monitors (24L, 24R) whose outputs reset free-running counters (36L, 36R) during a signal burst in the one or the other direction. At the end of a signal burst, resetting of the corresponding counter is discontinued. This condition is detected by an RS flip-flop (28L, 28R) which generates a signal to disable the active line driver to ensure that only one line driver can be enabled at any one time. <IMAGE>

Description

HALF DUPLEX CIRCUIT FOR A LOCAL AREA NETWORK This invention relates to local area networks (LAN's) and in particular to coupling arrangements between subscribers or users and a token ring network.

Local area networks (LAN's) are finding increasing applications in e.g. networked computer systems. A widely used LAN is the token ring. In this arrangement, messages are circulated around the ring to each user terminal. Each terminal extracts its own messages and returns to the ring those other messages whose destinations are other user terminals. In a typical token ring a high quality coaxial connection or a four wire connection is provided between the user terminal and the ring or hub to allow for full duplex signalling therebetween. These interconnections are expensive both to install and to update e.g. to add and/or relocate system users.

The object of the invention is to minimise or to overcome this disadvantage.

According to the invention there is provided a half-duplex control circuit for a user link between a token ring and a user terminal, the circuit including first and second line monitor means for sensing incoming and outgoing transmissions respectively, and means responsive to the line monitor means for enabling a respective incoming or outgoing transmission path between the terminal and the token ring.

According to the invention there is further provided a half-duplex control circuit for a user link between a user terminal and a token ring, the circuit including first and second line monitors for sensing transmissions in one direction and the other direction respectively, line drivers1 one for each said direction, means associated with the line monitors for enabling selectively a said line driver responsive to a transmission in the one or the other direction and for disabling the other line driver, and means responsive to the end of a transmission for disabling the line driver associated with the direction of that transmission.

The arrangement allows the use of a relatively low quality two wire connection between the user terminal and the token ring.

Advantageously this connection comprises a standard telephone twisted pair. This significantly reduces the costs of installation whilst maintaining sufficient transmission quality for many applications. In this arrangement communication takes place over the two wire link in both directions, but it in only one direction at a time.

An embodiment of the invention will now be described with reference to the accompanying drawings, in which: Fig. 1 is a schematic diagram of a token ring system; Fig. 2 shows a half-duplex control circuit for use with the token ring of Fig. 1.

Fig. 3 shows the circuit of Fig. 2 in further detail.

Referring to Fig. 1, the token ring system includes a ring or hub 11 to which a plurality of user terminals 12 may be coupled via user links 13. Messages are circulated around the ring via each user terminal 12. Each terminal extracts its own messages and relays back to the ring those other messages whose destinations are other system terminals. Each terminal may also transmit its own messages on to the ring system so as to communicate with other system terminals. Half duplex operation of the link between the user terminal 12 and the ring 11 is provided by a control circuit 13 which circuit monitors activity on the link 12 and provides selective amplification of incoming or outgoing signals whereby to provide communication in either the one or the other direction.

Referring now to Fig. 2, the control circuit is inserted in one wire of the two-wire link between the user terminal and the ring. The two portions of the wire are referred to as the L-line and the R-line respectively. The circuit controls signalling in the right hand and left hand directions.

The circuit includes line drivers 20L, 20R for driving signals in the respective directions and each controlled via a control circuit whereby to ensure that only one line driver is enabled at any one time. The control circuit senses transmission bursts on either the R-line or the L-line and, in response thereto, enables the corresponding line driver.

Fig. 3 shows the detail of the schematic circuit diagram of Fig. 2.

As can be seen from Fig. 3, the circuit is divided into two substantially identical portions corresponding to signal traffic in the right and left directions, the components of each half having a suffix L or R to identify their particular function. In the following description the response of the circuit to a signal burst or the L-line will be discussed. It will of course be appreciated that the response of the circuit to R-line signal is in effect a mirror image of the response to L-line signals.

In the arrangement of Fig. 3, activity on the L-line and R-line is monitored by respective line activity monitors 24L and 24R. These monitors respond each to a transmission burst in the corresponding direction on the L-line and the R-line. In the quiescent state of the circuit, the input to each line driver 20L, 20R is grounded. This provides an active ground at that driver output and provides a termination impedance, typically 50 ohms, to the respective line.

At the start of a transmission burst1 e.g. on the L-line, the line activity monitor 24L responds by generating a pulse which is fed via an AND-gate 26L to the S-lnput of an RS flip-flop circuit 28L. This sets the Q-output of the flip-flop 28L to provide an enabling pulse which propagates through AND-gate 30L to multiplier circuit 32L whereby to enable the input of the line driver 20L. This establishes the correct signal propagation path and allows the data burst to be driven on to the R-line via a source impedance typically of 50 ohms.

As the Q-output of the flip-flop 28L is in its high condition, the corresponding Q output is low and this provides lockout (low) signals to AND gates 34L and 34R to prevent any further signals being fed to the S-inputs of either of the flip-flops 28L and 28R.

During transmission of the data burst via the line driver 20L, multiple crossings of the threshold of the line activity monitor 24L occur (with hysteresis) to provide corresponding multiple reset pulses to a burst end detector counter 36L associated with that line activity monitor. The counter 36L counts clock pulses supplied to the circuit, but is repeatedly reset to zero by the pulses applied to its reset input. This continuous resetting of the counter 36L ensures that its output to the R-input of the flip-flop 28L remains low throughout the signal burst. The multiple pulse from the line activity monitor is blocked from reaching the S-input of the flip-flop 28L by a lockout signal from AND-gate 34L applied to one input of AND-gate 26L.

At the end of the data burst, the L-line becomes quiet and no more reset pulses are generated by the line activity monitor 24L. This allows the burst end detector counter to reach a count level at which its output to the R-input of the flip-flop 28L goes high. This resets the Q-output of the flip-flop 28L and generates a signal from that output via the AND-gate 30L which isolates the L-line from the driver 32L. The input of the driver 20L is grounded whereby to provide an active ground termination e.g. 50 ohms to the R-line.

The lockout signals return to their high condition and the circuit reenters its quiescent state awaiting the next data burst on either line.

The circuit of Fig. 3 provides a reliable half-duplex control mechanism. As soon as line activity is detected on one of the lines, the lockout signals prevent further line activity on either line from triggering the control circuit until the current data burst has been transmitted. This is vital since any data burst will eventually appear on both lines. Similar gating of enable signals to the drivers ensures that a driver can be activated only if the other driver is not activated. Any attempt to enable both drivers simultaneously will result in neither driver being activated. Setting of a suitable threshold level in the line monitor circuits will minimise the risk of triggering due to noise on the line. Hysteresis in the line monitor circuit ensures 'clean' control pulses at their outputs.

Should the circuit be accidentally triggered by a noise spike crossing the activity detection threshold, the burst end detectors (which are continuously clocked) will ensure the circuit is reset within e.g. 8 bit periods. Because of the active termination scheme, both line drivers are always powered, with line signal switching taking place at their inputs. This ensures rapid switching times and minimum switching transients on the lines. In practice, signal delay matching to the line driver inputs, should be used to ensure that minimum loss of data pulse duration occurs while circuit switching takes place.

Claims

CLAIMS:

1. A half-duplex control circuit for a two-wire user link between a token ring and a user terminal, the circuit including first and second line monitor means for sensing incoming and outgoing transmissions respectively, and means responsive to the line monitor means for selectively enabling a respective incoming or outgoing transmission path between the terminal and the token ring.

2. A half-duplex control circuit for a two-wire user link between a token ring and user terminal, the circuit including first and second line monitors for sensing transmissions in one direction and the other direction respectively, line drivers, one for each said direction, means associated with the line monitors for enabling selectively a said line driver responsive to a transmission in the one or the other direction and for disabling the other line driver, and means responsive to the end of a transmission for disabling the line driver associated with the direction of that transmission.

3. A half duplex control circuit as claimed in claim 2, wherein said means responsive to the end of a transmission comprises a counter arranged to count clock pulses and means for repeatedly resetting said counter during a said transmission.

4. A half duplex control circuit as claimed in claim 3, wherein said means for disabling the line driver comprises a flip-flop arranged to change from a first output condition to a second output condition whereby to disable the line driver associated with the direction of transmission when the count exceeds a predetermined value indicative of termination of the transmission.

5. A half duplex control circuit substantially as described herein with reference to and as shown in Figs. 2 and 3 of the accompanying drawings.

6. A local area network incorporating a plurality of half duplex control circuits as claimed in any one of claims 1 to 5.

7. A method of half duplex control of transmissions on a twowire path, which method is substantially as described herein with reference to and as shown in the accompanying drawings.