GB2273620A - Sub-band filter systems - Google Patents

Abstract

A sub-band filter system comprises a decimation stage 10 and an interpolation stage 11, each stage comprising a low frequency path 12a, 12b, 22a, 22b and a high frequency path 13a, 13b, 23a, 23b. The paths 12a, 13a, 22a, 23a of the decimation stage 10 each have a decimator 16a, 16b therein and are connected to a common input 18 for receiving an input signal. The paths 12b, 13b, 22b, 23b of the interpolation stage 11 each have an interpolator 17a, 17b therein and are connected to means 19 for combining signals output along the two paths. The system includes a low-pass half-band filter 14, having an odd number of taps, in the low frequency path 12b, 22a of one of the decimation and interpolation stages, the low frequency path 12a, 22b of the other stage being provided by an all-pass filter, and a complementary high-pass half-band filter 15 in the high frequency path 13a, 23b of the other of the decimation and interpolation stages, the high frequency path 13b, 23a of the other stage being provided by an all-pass filter. Applications in video signal processing are described. <IMAGE>

Description

SUB-BAND FILTER SYSTEMS This invention relates to sub-band filter systems and applications thereof, particularly, though not exclusively, in the field of video signal processing.

Sub-band filter systems for use in sub-band coding are known.

Sub-band coding is a term applied to a class of coding techniques where, by application of a set of filters, an input signal is decomposed into several narrow bands. The separate bands are decimated separately for the purposes of transmission, storage, etc. At the reconstruction stage, the decimated signals are interpolated and filtered before being added to produce the original signal. Sub-band coding is typically applied to the processing of audio and/or video picture signals.

Figure 1 is a schematic block diagram of a simple filter system for sub-band coding. The system comprises a low-pass filter (A) 1, a low-pass filter (B) 2, a high-pass filter (C) 3 and a high-pass filter (D) 4. The filters A and C are connected to a common input for receiving a stream of input samples. The outputs of the filters A and C are connected to respective decimators 5a and 5b. The filters B and D receive inputs from respective interpolators 6a and 6b, and the outputs of these filters are connected to an adder 7 for combining the signals output by the filters. The system provides for the storage, transmission etc 8 of signals between the decimators 5a, 5b and interpolators 6a, 6b.Signals supplied to the input are filtered by the filters A and C and the decimators 5a and 5b each either select or reject samples supplied thereto to reduce the sample rate by a factor of 2. Storage, transmission etc 8 of signals output by the decimators 5a and 5b is thus at half the sample rate of the original input signal.

The sample rate is restored by the interpolators 6a and 6b which generate samples at the positions of samples rejected by the corresponding decimators 5a, 5b.

Figure 2 is a schematic diagram illustrating the expansion of the sub-band coding system of Figure 1 to provide 8-way decimation of an input signal for storage, transmission etc 9, where LF represents a low frequency path and HF represents a high frequency path. In the arrangement of Figure 2, the transmission, storage etc of signals can be effected at i of the original sample rate of the input signal for each of the eight paths.

It is of course desirable in sub-band coding systems to obtain as good a reconstruction as possible. Different sub-band coding systems provide reconstruction which approximates so-called "perfect reconstruction". Our co-pending UK patent applications GB-9111782.0 and GB-9115772.7 propose perfect reconstruction filter pairs for subband coding. The filters of the systems proposed in these applications exhibit the key properties of perfect reconstruction, linear phase and integer coefficients. These systems are based on the use of "halfband" filters which are well-known. Half-band filters have the following properties: a symmetric frequency response about the half Nyquist point; linear phase response; a complementary pair of high-pass and low-pass filters will sum to an all-pass filter; and all even tap coefficients, with the exception of the zero term, are zero.Such filters can also be described diagrammatically with a typical frequency response as shown in Figure 3a, and a typical time response as shown in Figure 3b, where fn represents the Nyquist frequency.

For a system as shown in Figure 1, GB-9111782.0 proposes a low frequency pair of matched decimation and interpolation filters A and B and a high frequency pair of matched decimation and interpolation filters C and D. One of the low frequency filters A and B is a halfband filter. The other low frequency filter has more taps than the half-band filter and the tap coefficients for this other filter are defined by the solutions to a set of simultaneous equations derived from the zero terms of a half-band filter formed by the convolution of the two low frequency filters. Of the high frequency filters, filter C is the complementary filter to B and filter D the complementary filter to A (ie C and D have the same coefficient magnitudes as B and A respectively but the polarity of alternate coefficients is inverted).

Thus, the convolution of the low frequency filter pair is a half-band filter, the symmetry of the low and high-pass sections ensuring that "perfect reconstruction" is achieved. GB-9115772.7 proposes a similar system in which, of first and second filters forming a pair of matched decimation and interpolation filters, the first filter is a half-band filter and the second filter has at least one pair of taps more than the first filter, the tap coefficients of the second filter being defined by solutions to a set of simultaneous equations derived from the zero terms of a half-band filter formed by the convolution of the first and second filters, and by an iterative trial and error process involving setting selected tap coefficients of the second filter so that the remaining tap coefficients of the second filter are defined by the solutions to the simultaneous equations with the selected tap coefficients set.

In accordance with the present invention there is provided a subband filter system which comprises a decimation stage and an interpolation stage, each stage comprising a low frequency path and a high frequency path, wherein the paths of the decimation stage each have a decimator therein and are connected to a common input for receiving an input signal, and wherein the paths of the interpolation stage each have an interpolator therein and are connected to means for combining signals output along the two paths, the system including a low-pass half-band filter, having an odd number of taps, in the low frequency path of one of the decimation and interpolation stages, the low frequency path of the other stage being provided by an all-pass filter, and a complementary high-pass half-band filter in the high frequency path of the other of the decimation and interpolation stages, the high frequency path of the other stage being provided by an allpass filter.

Thus, the invention provides a filter system involving only half the number of filter stages as in the previously proposed systems since one of the paths of both the decimation and the interpolation stage is provided by an all-pass filter, ie these paths are simply all-pass paths. Whereas in the previous proposals described above, perfect reconstruction is achieved by using a half-band filter as one filter in each of the high and low pass sections, determining coefficients for the taps of a second filter in each section such that the convolution of the two filters in each section is a half-band filter, and making the high and low-pass sections symmetrical, the present invention allows perfect reconstruction to be achieved simply with one half-band filter in each of the low and high-pass sections, the filters being in opposite stages to provide the required symmetry. Accordingly, when a filter system in accordance with the invention is provided in a subband coder, there is therefore a significant reduction in system hardware as compared with the systems described above, especially in multiple stage sub-band coders such as that illustrated in Figure 2.

As will be explained below, it is necessary that the half-band filters are of odd tap length for perfect reconstruction to be achieved. In addition, it is preferred that the means for combining signals output along the paths of the interpolation stage is arranged to scale down the combined signal level by a factor equal to the coefficient value for the centre taps of the half-band filters so that the reconstructed signal has the same signal level as the original signal level.

Filter systems embodying the invention can be applied advantageously in a number of areas of video signal processing. In particular, where the low-pass filter is in the interpolation stage of the filter system, and the high-pass filter in the decimation stage of the filter system, the invention provides a video signal processing system, comprising such a filter system, for processing a progressive scan format video signal supplied to the input of the decimation stage of the filter system, wherein the delay elements of the half-band filters are line delay elements such that the filters are arranged as vertical filters, and wherein the decimator in the low frequency path is arranged to select alternately odd lines of pixels and even lines of pixels in successive progressive scan frames supplied thereto, and the decimator in the high frequency path is arranged to select alternately even lines of pixels and odd lines of pixels in corresponding successive frames supplied thereto, whereby, in use, the signal output along the low frequency path of the decimation stage is a 2:1 interlace format video signal with a field rate equal to the frame rate of the input progressive scan format signal. This arrangement is particularly advantageous since the 2:1 interlace format signal output along the low frequency path of the decimation stage is unfiltered, so there is no loss of vertical resolution, and yet the original progressive scan format signal can still be reconstructed.In contrast, if the previously proposed filter systems described above were utilised in a similar manner for progressive scan/interlace conversion, there would be a loss of vertical resolution in the 2:1 interlace format signal due to the presence of the filter in the low frequency path of the decimation stage. The video image obtained through display of the interlaced signal would therefore appear "soft".

For the same filter system arrangement, ie where the low-pass filter is in the interpolation stage and the high-pass filter in the decimation stage, the invention also provides a video signal processing system, comprising such a filter system, for processing a progressive scan format video signal supplied to the input of the decimation stage of the filter system, wherein the delay elements of the half-band filters are frame delay elements such that the filters are arranged as temporal filters, and wherein the decimator in the low frequency path is arranged to select alternate frames of the progressive scan signal, and the decimator in the high frequency path is arranged to reject frames corresponding to those selected by the decimator in the low frequency path, whereby, in use, the signal output along the low frequency path of the decimation stage is a progressive scan format video signal with a frame rate equal to one-half that of the input signal. Thus, frame rate reduction of the progressive scan signal can be achieved while allowing perfect reconstruction of the original signal and without filtering of the reduced frame rate signal output by the decimator in the low frequency path. In contrast, if the previously proposed filter systems described above were applied in a similar way, the low frequency decimation filter of these systems would cause temporal smearing in the reduced frame rate signal.

In video signal processing systems as described above, the highfrequency decimated output can be transmitted via a separate channel to the low frequency output, or can be encoded into the all-pass decimated output for transmission. Thus, the systems may include means for encoding the signal output along the high frequency path of the decimation stage into the signal output along the low frequency path of the decimation stage for transmission, and means for decoding the transmitted signal into the component signals for supply to the corresponding paths of the interpolation stage.

Filter systems embodying the invention may include mirror edge extension means for mirroring sample values at edges of sample arrays supplied to the half-band filters to reduce edge distortion effects.

The mirror edge extension means may comprise random access memory means for storing samples to be supplied to the half-band filters, and addressing means for selectively addressing the memory means according to the samples to be supplied to the filters as will be described further below.

It will be appreciated that the invention extends to a method of converting a progressive scan format video signal into a 2:1 interlace format signal and subsequently reconstructing the original progressive scan format signal using the 2:1 interlace format signal, which method is carried out using a filter system as hereinbefore described.

The invention also extends to a method of converting a first progressive scan format video signal into a second progressive scan format yideo signal with a frame rate equal to one half that of the first signal, and then subsequently reconstructing the first signal using the second signal, which method is carried out using a filter system as hereinbefore described.

In addition, the invention extends to a method of converting a 4 x 4 video signal into first and second 4:2:2 video signals, and then subsequently reconstructing the 4 x 4 video signal from the first and second 4:2:2 video signals, which method is carried out using a pair of filter systems, each filter system being as hereinbefore described.

This application will be discussed further below.

In general, it is to be understood that where features have been described herein with reference to an apparatus in accordance with the invention, corresponding features may be provided in accordance with a method of the invention and vice versa.

Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings in which: Figure 1 is a schematic block diagram of a simple filter signal for sub-band coding; Figure 2 is a schematic diagram of a more extensive filter system for sub-band coding providing a greater number of sub-bands; Figures 3a and 3b illustrate typical frequency and time responses respectively of a half-band filter; Figure 4 is a schematic block diagram of a first sub-band filter system embodying the invention; Figure 5 is a schematic block diagram of a second sub-band filter system embodying the invention; Figure 6 shows an example of the signals at various stages of the filter system of Figure 4 demonstrating that perfect reconstruction is achieved;; Figure 7 illustrates schematically progressive scan to interlace conversion of video signals in one application of the embodiment of Figure 4; Figure 8 illustrates schematically frame rate reduction of progressive scan video signals in another application of the embodiment of Figure 4; Figure 9 is a schematic block diagram illustrating an application of the filter system of Figure 5; Figure 10 is a schematic diagram used in explaining a mirroring technique for reducing edge effects in filter systems embodying the invention; and Figure 11 is a schematic block diagram of apparatus for implementing the mirroring technique of Figure 10.

The sub-band filter system of Figure 4 has a decimation stage, generally indicated at 10, and an interpolation stage, generally indicated at 11. The decimation stage 10 comprises an all-pass path 12a and a high frequency path 13a. The interpolation stage 11 comprises a low frequency path 12b and an all-pass path 13b. The low frequency path 12b of the interpolation stage 11 has a low-pass filter (LPF) 14 therein. The high frequency path 13a of the decimation stage has a high-pass filter (HPF) 15 therein. The all-pass and high frequency paths of the decimation stage 10 have respective decimators 16a and 16b therein.Similarly, the low frequency and all-pass paths of the interpolation stage have respective interpolators 17a and 17b therein. (While, for clarity, the decimator 16b is shown separately of the filter 15, and the interpolator 17a is shown separately of the filter 14, it will of course be appreciated that the decimator 16b and interpolator 17a may be provided as part of the filters 15 and 14 respectively.) The paths 12a, 13a of the decimation stage 10 are connected to a common input 18 for receiving an input signal. The paths 12b, 13b of the interpolation stage 11 are connected to an adder 19 which adds signals output along the paths 12b and 13b. The filter system provides for the transmission, storage etc 20 of signals at half the sample rate of signals supplied to the input 18.

To provide for perfect reconstruction, the low-pass filter 14 and the high-pass filter 15 are half-band filters, and the high-pass filter 15 is the complementary filter to the low-pass filter 14, ie the filter 15 has the same coefficient magnitudes as the filter 14, but the polarity of alternate coefficients is inverted. Further, the filters 14 and 15 have odd numbers of taps.

Figure 5 shows a second filter system embodying the invention.

The embodiment of Figure 5 is generally similar to that of Figure 4, like parts in Figures 4 and 5 being labelled with the same reference numerals. However, in this embodiment, it will be seen that the decimation stage 10 comprises a low-frequency path 22a and an all-pass path 23a, and the interpolation stage 11 comprises an all-pass path 22b and a high frequency path 23b. The low-pass filter 14 in this embodiment is in the low frequency path 22a of the decimation stage 10, and the high-pass filter 15 is in the high frequency path 23b of the interpolation stage 11.

The operation of the filter systems of Figures 4 and 5 to achieve perfect reconstruction can best be understood by considering a specific example as will now be described with reference to Figure 6. Figure 6 shows the signals present at various stages in the embodiment of Figure 4 for a particular input signal and half-band filter set.In general, the half-band filter coefficients can be of any order, but for this example the low-pass filter 14 will be taken to be a fourth order halfband filter with coefficients as follows: -1, O, 9, 16, 9, O, -1 sum = 32 The coefficients of the complementary high-pass filter are thus: 1, O, -9, 16, -9, O, 1 Consider that an input signal consisting of the stream of input samples shown in line (a) of Figure 6 is applied to the input 18 of the embodiment of Figure 4, where the delay elements of the half-band filters are one-sample delays. Considering first the low frequency section of the system, the signal output by the decimator 16a in the all-pass path 12a is as shown in line (b) of Figure 6.The decimator 16a simply reduces the sample rate by a factor of 2, in this case by selecting alternate samples and rejecting the others. Since the filters 14, 15 are of odd tap length, the decimators 16a, 16b take opposite phases, the decimator 16a selecting even samples from the input stream. The effect of the interpolator 17a is to restore the original input sample rate by inserting zero value samples in the received sample stream at positions corresponding to the positions of samples rejected by the corresponding decimator 16a. The output of the interpolator 17a is then supplied to, and filtered by, the low-pass filter 14. With the coefficient set given above, the output of the low-pass filter 14 on the path 12b is thus as shown in line (c) of Figure 6.

Considering now the high frequency section of the system, the input stream shown in line (a) is supplied to and filtered by the highpass filter 15 in the path 13a. For the coefficient set identified above, the output of the high-pass filter 15 is thus as shown in line (d) of Figure 6. The decimator 16b then selects odd samples from the received sample stream to produce an output at half the original input sample rate as shown in line (e) of Figure 6. Again, the effect of the interpolator 17b in the path 13b is to restore the original sample rate by inserting zero value samples in the received sample stream at positions corresponding to the positions of samples rejected by the corresponding decimator 16b. The output of the interpolator 17b on the path 13b is thus as shown in line (f) of Figure 6.

The signals output along the paths 12b and 13b of the interpolation stage are supplied to the adder 19 and added to produce a summed output as shown in line (g) of Figure 6. Comparison of lines (a) and (g) clearly shows that, apart from the scaling factor of 16, perfect reconstruction is achieved. The scaling factor of 16 corresponds to the coefficient value for the centre taps of the halfband filters 14 and 15. Thus, the output of the adder 19 may be supplied to a scaler for scaling down the summed output by a factor equal to the centre tap coefficient value.

While the above example demonstrates the operation of the embodiment of Figure 4, a similar analysis performed in relation to the embodiment of Figure 5 demonstrates that the same result is achieved.

It will be evident from a consideration of the simple example of Figure 6 that it is necessary for the half-band filters to have an odd number of taps for perfect reconstruction to be achieved. In addition, it is observed that for n-bit input samples, the output of the halfband filter 14 or 15 in the decimation stage should provide (n+l)-bit samples for perfect reconstruction. The output of the all-pass path 12a or 23a of the decimation stage is still n-bits, which is unlike conventional filtering operations where the output must generally be of much higher resolution than n-bits.

The filter system of Figure 4 finds particular application in the conversion between progressive scan format and 2:1 interlace format video signals as will now be described with reference to Figure 7. A progressive scan format signal corresponding to x frames/s can be converted to a 2:1 interlace format signal corresponding to x fields/s by deriving one field of the 2:1 interlace format signal from each frame of the progressive scan format signal, odd lines of pixels in a progressive scan frame being selected to produce an odd field, and even lines of pixels in a progressive scan frame being selected to produce an even field. This process is therefore simply vertical sub-sampling with a sample shift each field as illustrated in Figure 7. The left hand side of Figure 7 shows an array of pixels of the progressive scan format signal in the vertical/temporal (V/T) plane.Thus, successive columns in the array represent pixels of a given column of the video image in temporally successive frames. The right hand side of Figure 7 shows a corresponding array of pixels of the 2:1 interlace format signal in the vertical/temporal plane. Again, therefore, successive columns in this array represent pixels in a given column of the video image in temporally successive fields. As indicated, to produce the interlaced signal, in each field alternate pixels in a column are rejected in the sub-sampling process, the positions of rejected pixels alternating on a field-by-field basis.

The vertical sub-sampling illustrated in Figure 7 can be effected by a filter system of the type shown in Figure 4. In this case, the filters are arranged as vertical filters, the delay elements of the filters conveniently being line delay elements, ie elements which delay an input pixel sample by one line period of a progressive scan format signal supplied to the input 18. The decimator 16a in the all-pass path 12a is arranged to select alternate lines of pixels in an input frame, a one-line delay being applied for alternate input frames so that the decimator 16a selects alternately odd lines of pixels and even lines of pixels in successive input frames. The decimator 16b again selects alternate lines of pixels in each input frame, but its operation is out of phase by one line period with that of the decimator 16a.Thus, for the input signal on the all-pass path 12a, the decimator 16a performs the sub-sampling operation illustrated in Figure 7. The input signal on the high frequency path 13a is filtered and the decimator 16b selects filtered pixels corresponding to those indicated as rejected pixels in Figure 7.

With the above arrangement, therefore, the output of the decimator 16a in the all-pass path 12a of the decimation stage is a conventional 2:1 interlace format signal with a field rate corresponding to the frame rate of the input progressive scan signal as illustrated in Figure 7. On the high frequency path 13a of the decimation stage, the input frames are vertically filtered by the highpass filter 15, and decimated as described above by the decimator 16b.

The high-pass decimated output thus represents the inter-line twitter components corresponding to the "missing" pixels in the interlace format output of the decimator 16a. Note also that the interlaced output of the all-pass path is represented by the same number of bits as the input signal since the interlaced output is simply a selection of samples from the input signal.

In the interpolation stage, each interpolator 17a and 17b operates to restore the original sample rate by introducing zero value samples in the input sample stream at positions corresponding to the positions of samples rejected by the associated decimator 16a or 16b.

The output of the interpolator 17a is then vertically filtered by the low-pass filter 14, and the resulting sample streams on the paths 12b and 13b are summed by the adder 19. The level of the signal output by the adder 19 is then scaled down by a factor equal to the coefficient of the centre tap of the filters 14 and 15 for the reasons previously described. The scaled output represents a perfect reconstruction of the original input progressive scan format signal.

With the arrangement described above, therefore. a progressive scan format video signal can be converted to a standard 2:1 interlace format signal for transmission to remote TV receivers. The high-pass decimated output can be encoded into the interlaced signal for transmission, or can be transmitted via a supplementary channel.

Conventional TV receivers will ignore the high-pass data, and therefore receive a standard 2:1 interlace signal for driving an interlaced display. However, upgraded receivers can incorporate the interpolation stage of the filter system, and thus reconstruct the original progressive scan signal to drive a progressive scan display, therefore achieving a better quality picture. Further, it will be noted that there is no loss of vertical resolution in the 2:1 interlace signal to be used by conventional receivers since there is no filtering in the decimation path 12a.

A filter system of the type shown in Figure 4 can also be applied to advantage in frame rate conversion of progressive scan video signals to control "flickering", ie where the displayed picture appears to flicker perceptibly at the frame rate as successive frames are displayed. In conventional progressive scan TV displays, flicker can be controlled by displaying each frame of a received progressive scan signal twice, so that for a 50 Hz signal, for example, frames are displayed at 100 Hz, each frame of the 50 Hz signal being displayed twice. While this reduces the effect of flicker, the quality of motion portrayal is reduced as the display of each frame twice can give rise to a double-imaging effect and hence motion blur.Using the filter system of the type shown in Figure 4, a TV signal can be sourced at twice the normal rate, for example 100 Hz instead of 50 Hz, a 50 Hz signal can be derived for transmission and use as normal by conventional TV receivers, but upgraded receivers incorporating the interpolation stage of the filter system can reconstruct the original 100 Hz signal for display. Flicker is thereby controlled without any reduction in the quality of motion portrayal.

Frame rate reduction is essentially temporal sub-sampling as illustrated in Figure 8. The left hand side of Figure 8 shows an array of pixels of a 100 Hz progressive scan video signal in the vertical temporal (V/T) plane. The right hand side of Figure 8 shows a corresponding array of pixels of a 50 Hz progressive scan signal, where it can be seen that pixels of alternate frames of the 100 Hz signal have been rejected in the sub-sampling process. This temporal subsampling process can be achieved by the decimation stage of a filter system of the type shown in Figure 4. In this case, the filters 14, 15 are arranged as temporal filters, the delay elements of the filters being frame delay elements (ie elements which delay an input sample by one frame period of a progressive scan format signal supplied to the input 18). The decimator 16a in the all-pass path 12a is arranged to select pixels of alternate input frames supplied thereto. The decimator 16b operates out of phase with the decimator 16a by one frame period. Thus, on the high frequency path 13a, input frames are temporally filtered by the high pass filter 15, and the decimator 16b selects filtered pixels corresponding to those indicated as rejected pixels in Figure 8.

With this arrangement, therefore, it will be seen that the output of the decimator 16a is a progressive scan signal at half the frame rate of the input signal as illustrated in Figure 8. The high-pass decimated output of the path 13a can be encoded into the output of the decimator 16a for transmission, or can be transmitted via an auxiliary channel. In either case, a conventional TV receiver, ignoring the auxiliary data, will receive a 50 Hz signal for use as normal.

However, upgraded receivers will incorporate the interpolation stage 11 of the filter system of Figure 4. In this case, each interpolator 17a and 17b operates to restore the sample rate of the original input progressive scan signal by introducing zero value samples in the input sample stream at positions corresponding to the positions of samples rejected by the associated decimator 16a or 16b. The output of the interpolator 17a is then temporally filtered by the low-pass filter 14, and the resulting sample streams on the paths 12b and 13b are summed by the adder 19. The level of the signal output by the adder 19 is then scaled down by a factor equal to the coefficient of the centre tap of the filters 14 and 15 to restore the original signal level. The scaled output then represents a perfect reconstruction of the original input progressive scan format signal.

With the arrangement described above, therefore, TV signals can be sourced at twice the conventional scanning rate, a standard frame rate signal can be derived and transmitted for use by conventional receivers, and upgraded receivers can reconstruct the original progressive scan signal for an improved quality display. Since there is no filtering in the decimation path 12a, the standard frame rate signal output by the decimator 16a is free from temporal smear which would reduce the clarity of pictures in conventional receivers using only the standard frame rate signal.

From the above it will be seen that, while the lack of filtering in the path 12a of the filter system of Figure 4 results in a degree of alias in the signal output along this path due to the sub-sampling process, this is of advantage in applications such as those described above where the signal accurately represents some types of scanning where alias is normal.

A filter system of the type shown in Figure 5 can be applied in 4 x 4 to 4:2:2 video signal conversion as will now be described with reference to Figure 9. A 4 x 4 signal is a full bandwidth signal having Y, B-Y and R-Y channels and also a linear key channel K. The data rate is 2 x CCIR601. It is sometimes necessary to record 4 x 4 signals as two 4:2:2 signals on two digital video tape recorders (DVTRs). This can be achieved in a simple manner using two data splitters 20a and 20b as shown in Figure 9, each data splitter comprising the decimation stage 10 of a filter system as shown in Figure 5. The B-Y channel of the 4 x 4 signal is supplied to the input 18 of the decimation stage 10 forming the data splitter 20a.

Similarly, the R-Y channel of the 4 x 4 signal is supplied to the input 18 of the decimation stage 10 forming the data splitter 20b. The data splitter 20a splits the input B-Y signal into two signals CB and C8' which form the outputs of the decimators 16a and 16b respectively in the data splitter 20a. Thus, as indicated in the figure, CB is the signal output along the low frequency (LF) decimation path 22a, and C13, is the signal output along the all-pass (AP) decimation path 23a.

Similarly, the R-Y signal is split by the data splitter 20b into two signals CR and CR which form the outputs to the decimators 16a and 16b respectively in the data splitter 20b. Thus, CR is the signal output along the low frequency (LF) decimation path 22a, and CR' is the signal output along the all-pass (AP) decimation path 23a.

The chroma signals CB and CR are supplied along with the Y component of the 4 x 4 signal to a first DVTR (DVTR 1), and the chroma signals CB and CR are supplied along with the K component (which is passed as signal Y'') to a second DVTR (DVTR 2). The filtering of the signals on the LF paths of the data splitters provides an anti-aliased 4:2:2 source on one channel (to DVTR 1), whilst signals on the other channel (to DVTR 2) represent a simple demultiplex of the original data. Thus, the Y, CB, CR signal supplied to DVTR 1 has chroma components CB and CR which have low alias frequency content since the response of the half-band filter 14 at the half-Nyquist frequency is -6dB.A good quality picture can therefore be obtained from the Y, C8, CR signal in its own right. While the chroma components of theY", C13,, CR' signal are simply sub-sampled components, the quality is not so important here since the Y", C13', CR' signal is simply a supplementary signal not intended for direct use on its own. This signal is of use where it is desired to reproduce the original 4 x 4 signal from the two 4:2:2 signals. In this case, a perfect reconstruction of the B-Y component can be obtained simply by supplying the signals CB and C13, to the interpolators 17a and 17b of an interpolation stage 11 as shown in Figure 5.Similarly, a perfect reconstruction of the R-Y component can be obtained simply by supplying the CR and CR' signals to the interpolators 17a and 17b of a further interpolation stage 11 as shown in Figure 5.

It will be appreciated that in any filtering operation there will be some edge effects. Edge distortion effects arise because, for a stream of input samples supplied at any time to the taps of the filter, the filtered output sample corresponds to the input sample supplied to the centre tap. Thus, for a finite input sample array, there will be insufficient samples to produce filtered output samples corresponding to input samples at edges of the array. This gives rise to edge distortion effects, the extent of the distortion depending upon the order (ie the number of taps) of the filter in question.

There are a number of ways of reducing edge distortion effects, and in the case of symmetric, linear phase sub-band filters such as the half-band filters utilised in embodiments of the present invention, it has been determined that edge effects can be eliminated by using a mirror edge extension technique. According to this technique, samples at an edge of an array of samples supplied to a half-band filter are mirrored about the edge to provide the necessary input samples to enable filtered output samples corresponding to input samples near the edge of the array to be produced. For example, for an input array with sample positions ranging from 0 to max (inclusive) then mirroring is performed as follows: - if (value < 0) then value = (-value) - if (value > max) then value = (max*2) - value.

In other words, data is addressed on a reflective basis. Given a sample block of size N, any sample address less than zero has its sign inverted, and any sample address greater than (N-1) having the value of X is modified to (2*(N-1)-X).

For example, if N=256 the maximum address is 255. An address value of 256 would be modified to (510 - 256) = 254.

Figure 10 is a schematic illustration of the technique of mirroring. The central block 30 represents the set of samples, of a given sample array, for which corresponding filtered output samples are to be produced. For the purpose of this example, the set of samples is assumed to be a line of n pixels from a left hand picture edge 32 at pixel position 0 to a right hand picture edge at pixel position n-1.

The pixel positions 1, 2, 3 etc. to the right of the left hand picture edge 32 are mirrored 36 to the left of that left hand picture edge.

The pixel positions n-2, n-1, etc. to the left of the right hand picture edge 34 are mirrored 38 to the right of that right hand picture edge 34. The number of pixel positions which are mirrored depends on the number of taps in the filter to which the mirroring relates. Thus, m pixels are mirrored where the filter in question includes (2m +1) taps in total.

Figure 11 is a schematic block diagram of apparatus for implementing the mirroring in a digital filter using discreet components. For example, in the vertical filtering operation performed in application of the filter system of Figure 4 in progressive scan/interlace conversion as described above, the input samples corresponding to a frame of pixels are stored in a Random Access Memory (RAM) 40. A RAM address controller 42 provides selective addressing to the RAM for reading and writing in order to select pixel values to be supplied to a digital filter integrated circuit 44. In this case, columns of-pixels are to be filtered so mirroring must be performed about the upper and lower picture edges. Since the filter delay elements are line delays in this example, lines of pixels in the stored frame should be mirrored about the upper and lower edges of the frame.

Thus, the RAM address controller controls the supply of lines of pixels to the filter accordingly, the mirrored lines of pixels being supplied during the frame blanking period. The apparatus 46, comprising the RAM 40, the RAM address controller 42 and the digital filter integrated circuit 44, can be used to implement any one of the filters 14, 15 in the applications described above, the RAM address controller 42 controlling writing of samples to the RAM 40 and supply of samples to the digital filter circuit 44 accordingly. Clearly, if the filtering process is carried out along the temporal axis, the edge extension must also be effected along the temporal axis, ie the delay elements must be field or frame delay elements.

Claims (14)

1. A sub-band filter system which comprises a decimation stage and an interpolation stage, each stage comprising a low frequency path and a high frequency path, wherein the paths of the decimation stage each have a decimator therein and are connected to a common input for receiving an input signal, and wherein the paths of the interpolation stage each have an interpolator therein and are connected to means for combining signals output along the two paths, the system including a low-pass half-band filter, having an odd number of taps, in the low frequency path of one of the decimation and interpolation stages, the low frequency path of the other stage being provided by an all-pass filter, and a complementary high-pass half-band filter in the high frequency path of the other of the decimation and interpolation stages, the high frequency path of the other stage being provided by an allpass filter.

2. A filter system as claimed in claim 1, wherein the means for combining signals output along the paths of the interpolation stage is arranged to scale down the combined signal level by a factor equal to the coefficient value for the centre taps of the half-band filters.

3. A filter system as claimed in claim 1 or claim 2, including mirror edge extension means for mirroring sample values at edges of sample arrays supplied to a said half-band filter.

4. A filter system as claimed in claim 3, wherein the mirror edge extension means comprises random access memory means for storing samples to be supplied to the half-band filter, and addressing means for selectively addressing the memory means according to the samples to be supplied to the filter.

5. A filter system as claimed in any one of the preceding claims, wherein, for an input signal comprising n-bit samples, the signal output along the path of the decimation stage which has a said halfband filter therein comprises (n+1)-bit samples, the signal output along the other path of the decimation stage comprising n-bit samples.

6. A sub-band coding system comprising a filter system as claimed in any one of claims 1 to 5.

7. A filter system as claimed in any one of claims 1 to 5, wherein the low-pass filter is in the interpolation stage and the high-pass filter is in the decimation stage.

8. A video signal processing system, comprising a filter system as claimed in claim 7, for processing a progressive scan format video signal supplied to the input of the decimation stage of the filter system, wherein the delay elements of the half-band filters are line delay elements such that the filters are arranged as vertical filters, and wherein the decimator in the low frequency path is arranged to select alternately odd lines of pixels and even lines of pixels in successive progressive scan frames supplied thereto, and the decimator in the high frequency path is arranged to select alternately even lines of pixels and odd lines of pixels in corresponding successive frames supplied thereto, whereby, in use, the signal output along the low frequency path of the decimation stage is a 2::1 interlace format video signal with a field rate equal to the frame rate of the input progressive scan format signal.

9. A video signal processing system, comprising a filter system as claimed in claim 7, for processing a progressive scan format video signal supplied to the input of the decimation stage of the filter system, wherein the delay elements of the half-band filters are frame delay elements such that the filters are arranged as temporal filters, and wherein the decimator in the low frequency path is arranged to select alternate frames of the progressive scan signal, and the decimator in the high frequency path is arranged to reject frames corresponding to those selected by the decimator in the low frequency path, whereby, in use, the signal output along the low frequency path of the decimation stage is a progressive scan format video signal with a frame rate equal to one-half that of the input signal.

10. A video signal processing system as claimed in claim 8 or claim 9, including means for encoding the signal output along the high frequency path of the decimation stage into the signal output along the low frequency path of the decimation stage for transmission, and means for decoding the transmitted signal into the component signals for supply to the corresponding paths of the interpolation stage.

11. A filter system substantially as hereinbefore described with reference to the accompanying drawings.

12. A method of converting a progressive scan format video signal into a 2:1 interlace format signal and subsequently reconstructing the original progressive scan format signal using the 2:1 interlace format signal, which method is carried out using a filter system as claimed in any one of claims 1 to 5.

13. A method of converting a first progressive scan format video signal into a second progressive scan format video signal with a frame rate equal to one-half that of the first signal, and then subsequently reconstructing the first signal using the second signal, which method is carried out using a filter system as claimed in any one of claims 1 to 5.

14. A method of converting a 4 x 4 video signal into first and second 4:2:2 video signals, and then subsequently reconstructing the 4 x 4 video signal from the first and second 4:2:2 video signals, which method is carried out using a pair of filter systems, each filter system being as claimed in any one of claims 1 to 5.