GB2269716A - Bias circuit for changing class of part of multistage amplifier - Google Patents

Abstract

A switch able bias circuit is capable of switching the mode of operation of an amplifier between a first class of operation and a second class of operation, the switching being a function of the base bias on the amplifier. In fig. 1 the second and third stages of the multistage amplifier are switched between class A for high linearity and class C for high efficiency, VDM being the switching voltage. <IMAGE>

Description

SWITCHABLE BIAS CIRCUIT This invention relates to a Switchable Bias Circuit for amplifiers.

High frequency amplifiers have been proposed in a wide variety of applications.

Increasingly, these amplifiers are being used in products such as cellular telephones and remote pagers that are required to operate for long periods from a battery power supply.

This demands that the amplifiers used in such products be as efficient as possible and to have a high degree of linearity between the input and ouput of the amplifier. One of the factors influencing the efficiency of an amplifier is the circuitry through which DC power is routed to the transistors that act as amplifying elements. This circuitry must necessarily be low loss in nature whilst also performing functions such as acting as an on/off switch, providing variable current for gain control of the amplifier, and keeping the transistor amplifying elements optimally biased. It is also desirable that this bias circuitry be integrable on the same semiconductor die with the RF circuitry comprising the amplifier. Past solutions to the design of bias circuitry for multi-stage amplifiers have been relatively inefficient and generally lack the variety of functions listed above.

Any solutions that overcome this inefficiency while providing all of the control functions necessary in an amplifier would accordingly be desirable.

The bias conditions are a significant factor determining the trade off between linearity and efficiency. High efficiency is achieved with class C bias where the amplifying stage does not draw any quiescent current when no RF is applied, and high linearity is achieved with class A bias where the amplifying stage draws a large quiescent current such that the RF current excursion is less than this quiescent current For applications where high efficiency is required at certain times and high linearity for the rest of the time, two amplifiers are often used with the output from only one selected at any given time.

One object of the present invention is to provide a bias circuit for amplifiers which overcomes at least some of the disadvantages of the prior art systems.

According to one aspect of the present invention there is provided a bias circuit for a multi-stage amplifier, comprising a first switching subcircuit capable of switching at least one stage of the amplifier from a first class of operation, to a second class of operation without affecting the operation of the other stages of the amplifier.

This has the advantages that the component count is reduced and on/off switch functions are achieved inside the amplifier. In addition, there is no need to have two separate power amplifiers to achieve the two modes of operation, thus significantly reducing the cost and board area of the components.

Reference will now be made, by way of example, to the accompanying drawings, in which: Figure 1 is an amplifier and bias circuit according to one aspect of the present invention; Figure 2 is an amplifier and bias circuit according to a second aspect of the present invention; and Figure 3 is an amplifier and bias circuit according to a third aspect of the present invention.

Figure 1 illustrates the bias network of a three-stage amplifier fabricated on, for example, GaAs using, for example, heterojunction bipolar transistors (HBTs) as the amplifying elements. Resistors R2, R3, R4, R5 and R6 diodes D1 and D2. and transistors Q2, Q3, Q4 and Q5 are the components that set the constant operating point on the second and third stages of the amplifier for class C or class A operation. Class C has been shown to be a particularly efficient operating mode for power amplifiers, whilst class A has been shown to have high linearity.When the voltage, VPC rises above 2.5V, the two series connected diodes D1 and D2 turn on and develop a reference voltage, Vref at the bases of transistors Q2 and Q5 that is substantially independent of further increases in VPC (VPC is a variable voltage input obtained by sensing the output power of the amplifier with a detector diode). Transistors Q2 and Q5 act as both a level shifter and as an emitter follower voltage buffer. The quiescent bias point of the second and third stages is set by the difference of Vref and the DC level shift voltage across the base-emitter junction of transistors Q2 and Q5 and by VDM (as will become apparent below).Because this DC level shift is independent of VPC, the quiescent bias point of the second and third stages is also substantially independent of VPC once the diodes are switched on (VPC greater than 2.5V).

In order to set the operating mode of the second and third amplifiers to be class A or class C, the value of voltage VDM is set to different levels. When VDM is less than or equal to about 2.0V the second and third stages are in class C operation.

At this voltage, Q3 and Q4 are off and the base-bias voltages to the second and third stages are set, primarily by the voltage developed across D1 and D2 (Vref) minus the base-emitter voltage of Q2 and Q5. These base bias voltages and hence the volgage VPC can be used to control the gain of the first stage without further affecting the operation of the other stages. Vref is chosen low enough to set the second and third stage bias currents to zero and hence ensure class C, high efficiency operation for these stages. The value of Vref is set by choosing the area of the diodes D 1 and D2. A large area results in a relatively low Vref whilst a low area results in relatively high Vref. When an RF signal is applied to the amplifier, extra DC base current is induced in the second and third stages.The emitter-follower buffer action of Q2 and Q5 ensures that the circuit can supply this extra current but still maintain the correct voltage (Vref - VBE (Q2, Q5) at the emitter of Q2 and Q5. The extra RF-induced base current current in the second and third stages results in small (approx 200-300mV) voltage drop across the two base feed resistors R3 and R4.

The values of R3, R4 and the areas of D1 and D2 are chosen to set the average DC voltage at the bases of the second and third stages to 1V when RF is applied. This value has been seen empirically to be the optimum average DC base voltage for highest efficiency operation. Resistors R3 and R4 are also necessary to ensure the RF stability of the second and third stages.

When VDM is set to be approximately 4.8V, the second and third stages will be in class A operation. Transistors Q3, Q4 and resistors R5, R6 override the effect of Q2, Q5, R2, D1 and D2 and set the base bias voltage at the second and third stages at a larger value so that there is a large quiescent current (when no RF is applied) in these stages. The value of the quiescent current in the third stage is set by R6 and R4, and that in the second stage by R5 and R3. The large quiescent currents in the final stages result in a highly linear class A operating condition.

Transistor Q1 and R1 are used to achieve the RF gain control in the first stage for the class C case when VDM=OV. For 2.5V < VPC < 4.5V the quiescent current and hence gain in the first stage increases, whilst the gain and quiescent bias voltages in the second and/or third stages remain constant.

For the case of VDM=O (amplifier class C operation), the increasing RF level from the first stage as VPC increases ensures that the drive level and base bias in the second and third stages will be exactly right for highest efficiency operation at one output power at least. (it is both the average DC base voltage and the RF drive level that determines the efficiency of the amplifying stage). The power at which peak efficiency occurs is determined by the tuning of the third stage output matching network. For other power levels in the gain control range, the efficiency is maintained as close as possible to the peak value because the base bias voltage of the second and third stages is held at around 1V as described above.

For the case of VDM=4.8V, power control is not implemented and the amplifier is linear and of constant gain when VPC is held at 4.8= 0.2V.

When VPC and VDM are at zero volts, the quiescent currents in all three stages are reduced to zero by setting the base voltages to zero. Therefore, VPC and VDM also function together as an on/off switch with < 50uA quiescent current and > 40dB of RF isolation between the RF input and RF output for input levels to the amplifier of less than OdBm.

The value of R1 is chosen to set the value of the maximum quiescent current and hence gain of the first stage when the maximum VPC voltage is applied (4.5V).

Figure 2 shows a second embodiment of the circuit where transistors Q3 and Q4 and resistors R5 and R6 act as the subcircuit overriding the rest of the circuit to set the class A operating condition when VDM is about 4.8V. Here, the quiescent current in Q4 is multiplied and mirriored to the second and third stages. The multiplication factor is set by the ratio of the areas of Q4 to the third stage transistor or second stage transistor, and also by the ratio of the base feed resistor R3 or R4 to the resistor R6. Transistor Q3 acts as a voltage buffer which allows the current mirroring to work for large ratios between the current in Q4 and that in the RF stages. The ratio is set between about 50 and 100 to ensure that the current in Q4 is kept as low as possible to limit the current needed to be sunk into VDM by the external circuit.This "buffered, ratioed current mirror subcircuit" allows both the second and third stage currents to be set simultaneously by making use of the different sizes and hence different quiescent currents needed in the second and third stages. This circuit also allows the quiescent currents to be set in the RF stages with less sensitivity to the absolute level of VDM because the resistor R5 can be a large value (for example > 1K), thus producing a better constant current source to supply Q4. The resistor R6 is of large enough value to ensure that the subcircuit does not affect the class C operation when VDM < 2.0V.

Figure 3 shows a third embodiment in which the polarity of the VDM control is reversed.

For the case of VDM 22.0V, diode D3 is by-passed and the second and third stages of the amplifier are held at class C bias. In the case when VDM c l.OV, diode D3 is not bypassed and a larger VREF is produced causing the second and third stages of the amplifier to be held at class A bias. This embodiment has a relatively low sensitivity to the value of VDM in both class A and class C modes of operation. Resistor R5 is set large enough to the limit, the current drawn by VDM to be less than 2mA when VDM 22.0V. In addition, when 22.0V the amplifier will have fixed gain when VPC=4.8+0.2V.

It will be appreciated that the multistage amplifier may have any number of stages greater than two, and that the switchable bias circuitry may be coupled to any one or more of those stages.

If two stages or more are biased using the above described circuitry, each may have a separately controlled VDM such that the operation class of each may be independently controlled. In addition, the change of class need not be A to C or vice versa but may also be any other appropriate change, for example, A to B.

This switchable bias circuit is ideally used in applications, where for some of the time the amplifier must work as efficiently as possible (i.e. with the minimum possible power dissipation), but does not need to be highly linear, and for the rest of the time high linearity is required but efficiency is not a major concern. An example of such an application is in the North American Dual-Mode Analog'Digital Cellular Telephone System. However, other applications of the invention will be obvious to the man skilled in the art It will be appreciated that this switchable bias circuitry could be applied to any type of semiconductor amplifier whether of GaAs or any other material.

Claims (13)

CLAIMS:

1; A bias circuit for a multi-stage amplifier, comprising a first subcircuit capable of changing at least one stage of the amplifier from a first class of operation, to a second class of operation without affecting the operation of the other stages of the amplifier.

2. A bias circuit according to claim 1, wherein the class of operation is changed by changing the bias voltage of said at least one stage of the amplifier.

3. A bias circuit according to claim 1 or claim 2, wherein said other stages of the amplifier are provided with a second sub circuit that provides a bias which varies in proportion to an external variable bias.

4. A bias circuit according to claim 3, wherein the second subcircuit is used to control gain in said amplifier.

5. A bias circuit according to any preceding claim, wherein the first class of operation is class C operation.

6. A bias circuit according to any preceding claim, wherein the second class of operation is class A operation.

7. A bias circuit according to any preceding claim, wherein the first subcircuit comprises a transistor and a resistor coupled to the emitter of the transistor and to the base of one of the at least one stages of the amplifier.

8. A bias circuit according to claim 7, wherein the first subcircuit further comprises a second transistor and a second resistor coupled to the emitter of the second transistor, and wherein the second resistor is further coupled to the base of a second one of the at least one stages of the amplifier.

9. A bias circuit according to claim 7 or claim 8, wherein the transistors are heterojunction bipolar transistors.

10. A bias circuit according to any of claims 7 to 9, wherein the transistors are fabricated in GaAs.

11. A bias circuit according to any preceding claim, wherein if no external bias is applied the amplifier is switched off.

12. An integrated circuit including a bias circuit according to any preceding claim.

13. A telephone including a circuit according to any preceding claim.