GB2268015A - Feed-forward distortion reduction for transconductance amplifier - Google Patents
Feed-forward distortion reduction for transconductance amplifier Download PDFInfo
- Publication number
- GB2268015A GB2268015A GB9212943A GB9212943A GB2268015A GB 2268015 A GB2268015 A GB 2268015A GB 9212943 A GB9212943 A GB 9212943A GB 9212943 A GB9212943 A GB 9212943A GB 2268015 A GB2268015 A GB 2268015A
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- United Kingdom
- Prior art keywords
- amplifier
- pair
- differential
- transistors
- emitter
- Prior art date
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3211—Modifications of amplifiers to reduce non-linear distortion in differential amplifiers
Abstract
A feed-forward amplifier includes a first differential pair of transistors (T3, T4), each in a common-emitter configuration for receiving an input signal (Vin); and a second differential pair of transistors (T2, T5), each in common-emitter configuration for receiving the input signal. The emitters of the first pair transistors are cross-coupled to respective collectors of the second pair transistors thereby reducing distortion components at an output of the first pair of transistors. <IMAGE>
Description
AMPLIFIER
The invention relates generally to wideband amplifiers, and more particularly to circuits for compensating or reducing amplifier distortion using feed-forward techniques.
A major source of amplifier error, which severely inhibits ac and dc performance, is distortion. It is well known that amplifier distortion can be greatly reduced by the use of negative feedback. For adequate reduction of amplifier nonlinearities by means of negative feedback, a large open loop gain together with a dominant time constant is desired. The dominant time constant is intended to provide high frequency stability of the amplifier.
In actual practice, however, negative feedback can be successfully utilized at lower frequencies only because at higher frequencies parasitic time constants can significantly contribute to the open loop transfer function. More specifically, at higher frequencies, the parasitic time constants affect the open loop gain-phase transfer function in such a manner that the phase margin is reduced. This reduction in phase margin results in a conditionally stable amplifier at the higher frequencies.
Therefore, to attain negative feedback stability at higher frequencies, the dominant time constant must be increased until adequate phase margin is achieved. However, increasing the dominant time constant produces an undesired result of reducing the closed loop bandwidth.
An alternative to negative feedback correction of amplifier nonlinear distortions is use of a feed-forward amplifier. In such an amplifier, the amplifier nonlinearity is sensed, fed forward and corrected at an output. A significant advantage of the feed-forward technique is that unconditional stability can be achieved even at frequencies approaching silicon processing constraints such as the transition frequency Ft.
The invention provides a feed-forward amplifier for reducing nonlinear distortion. In a preferred embodiment of the invention, a feed-forward amplifier includes a first differential pair of transistors, each in a common-emitter configuration for receiving an input signal; and a second differential pair of transistors, each in common-emitter configuration for receiving the input signal; each emitter of the first pair transistors being cross-coupled to a collector of one of the second pair transistors thereby reducing distortion components at an output of the first pair of transistors.
The invention further contemplates a feed-forward method for reducing amplifier distortion including the steps of: a) converting a differential input voltage to a differential current signal using a first differential transconductance stage;
b) converting the differential input voltage to a second differential current using a second differential trans conductance stage; and
c) combining the first and second differential currents to produce an output signal from the first transconductance stage that has a reduced distortion.
The invention is further explained in the detailed description that follows, with reference to the drawings, by way of non-limiting examples of some of the preferred embodiments of the invention and wherein:
Fig. 1 is a schematic block diagram of a feed-forward amplifier according to the present invention; and
Fig. 2 is a detailed circuit schematic of a feed-forward amplifier according to the invention.
With reference to Fig. 1, the invention contemplates a feedforward arrangement for reducing the non-linear distortion in a main amplifier generally designated by the numeral 10. While the invention is described herein with particular reference to an integrated circuit as the preferred embodiment, such description is for purposes of explanation only and should not be construed in a limiting sense. Those skilled in the art will readily appreciate that the invention can be realized using discrete components including operational amplifiers and transistors.
In accordance with the invention then, the feed-forward arrangement includes an error amplifier 12 that combines or mixes the main amplifier 10 output with the input signal in such a manner as to reduce the main amplifier 10 distortion at the error amplifier output. The main amplifier 10 is preferably a differential transconductance amplifier stage that has differential inputs 14,16 connectable to an input voltage, Vin.
The transconductance amplifier 10 produces an output current that can be defined generally by the following equations Ai = f(Vin) (1) Ai = 9mlVin a(Vin) +.... (2) where gmi is defined as the transconductance current gain and "a" is defined as the nonlinearity coefficient of the amplifier. The first nonlinearity term is a third-order term because the amplifier 10 is used in a differential configuration. The higher-order nonlinearity terms are generally too small to consider in a mathematical model.
The main amplifier 10 differential current output Ai is connected to a pair of matched degeneration resistors RE to produce a corresponding voltage V1 that can be defined by the following equation: V1 = hi(RE) (3)
The voltage V1 drives a first unity gain buffer 18, and the input signal Vin drives a second unity gain buffer 20. The respective buffer outputs 22,24 are connected to a pair of differential inputs 26,28 of a second differential transconductance amplifier 30. The second differential transconductance amplifier 30 mixes the nonlinear errors of the first transconductance amplifier 10 with the errors of the second amplifier 30.By careful design, the errors in the output current 32 of the error amplifier 12 can be reduced by having the errors of the second amplifier 30 reduce or cancel the errors of the main amplifier 10. For purposes of this analysis, the unity gain buffers 22,24 are assumed not to introduce non-linear errors; however when the invention is realized using a configuration illustrated in Fig. 1, such perfect amplifiers do not exist. But, if the buffers 22,24 are well-matched identical, then the mixing of their outputs in the second amplifier 30 will negate these effects, in a manner similar to common-mode rejection. As will be explained hereinbelow, the invention can also be realized without the use of the unity gain buffers.
The voltage V2 applied to the differential inputs of the second transconductance amplifier 30 can be defined by the following equation:
V2 = Vin - Ai(RE) (4)
From equations (1), (2) and (4) the following relationships can be derived for the output current Si: Si = f(V2) = ftVin - Ai(RE)1 (5) zi=gm2{(1~gm1RE)Vin+aRE(vin) }-â{(1-gm1RE)Vin+aREVin3}3 +...(6) where gm2 is defined as the transconductance current gain and " & is defined as the nonlinearity coefficient of the second transconductance amplifier 30.
By collecting the coefficients of the (Vin)3 terms in equation (6) and equating to zero, the following expression is derived for nonlinearity correction or reduction: αgm2 # -α(gm1) RE (7)
One of the important aspects derived from equation (7) is that the third order nonlinearities can be substantially reduced by appropriate control or selection of the trans conductance stages' current gain, the value of RE, and the nonlinearity coefficients a and & For example, if the transconductance amplifiers are well-matched (such as by producing them on a single integrated circuit) then the values a and & may be nearly equal. However, those skilled in the art will readily appreciate that equation (7) defines or suggests several parameters that can be controlled to effect nonlinearity reduction at the output 32 of the error amplifier 30.
With reference now to Fig. 2, this schematic illustrates a preferred circuit for realizing the invention using NPN transistor technology on an integrated circuit chip. An advantage of this embodiment is that it does not use operational amplifiers or the buffers.
In the embodiment of Fig. 2, an input signal Vin is applied to a pair of differential input nodes 50, 52. Each input node 50,52 is connected to a respective base of an input transistor 54,56 (T1 and T6 respectively). The respective collectors of T1 and T6 are connected to a supply rail 58 (Vcc) such that the transistors T1,T6 each operate in an emitter follower configuration. Each input node 50,52 is also connected to a respective base 60,62 of one of a first differential pair of transistors 64,66 (T3 and T4). The transistors T3 and T4 are each arranged in a common emitter configuration. Accordingly, the collector of transistor T3 is connected in series with a load resistor 68 (RL) to the supply rail Vac. The collector of transistor T4 is likewise connected in series with a load resistor 70 (RL) to the supply rail Vcc.Preferably, the load resistors 68,70 are the same value. The emitter of T3 is series connected with an emitter degeneration resistor 72 (R3) to a current source 76 (I3) that is connected to a bias or reference rail 78 (vex) The emitter of T4 is likewise series connected with an emitter degeneration resistor 74 (R4) to the current source 76 (I3) that is connected to the reference rail 78 (Vee).
Viewed in isolation, each common emitter amplifier T3,T4 will have a small-signal voltage gain approximately defined by the ratio RL/RE (wherein RE generally represents an em tle~ degeneration resistor which in the example herein is respectively
R3 or R4), as is well known to those skilled in the art.
Preferably, the emitter degeneration resistors 72,74 are the same value. The T3 collector/load resistor junction defines a first output node 82; and the T4 collector/load resistor junction defines a second output node 84. Thus, in the preferred embodiment of Fig. 2, a differential output signal Vout is produced across the output nodes 82,84.
As stated herein, the input transistors T1 and T6 provide differential emitter follower input stages for the input signal Vin The emitter followers T1 and T6 drive a second differential pair of transistors 94,98 (T2 and T5). Accordingly, the emitter of T1 is series connected through two diodes 88,90 (D1,D2) to the base 92 of the differential transistor T2. Similarly, the emitter of T6 is series connected through two diodes 100,102 (D3,D4) to the base 96 of the other differential transistor T5.
When the circuit of Fig. 2 is made on a single integrated circuit chip, the diodes D1,D2,D3, and D4 can conveniently be realized by transistors that have the base and collector connected together, as shown in Fig. 2 and is well known to those skilled in the art.
The junction node 104 of diode D1 and the base 92 of transistor
T2 is connected to another current source 106 (I1) which is connected to Vee. The junction node 108 of diode D4 and the base 96 of transistor T5 is connected to another current source 110 (I2) which is also connected to Vee The emitter of T2 is series connected by a degeneration resistor 112 (R1) to a fourth current source 80 (I4) which is also connected to Vee. Similarly, the emitter of T5 is also series connected by a degeneration resistor 114 (R2) to the fourth current source 80 (it). The second differential pair of transistors T2,T5 are in a general sense used in a common emitter configuration.However, the respective collectors of these transistors are cross-coupled to the respective emitters of the first differential pair of transistors
T3 and T4 in a stacked arrangement. That is, the collector of
T5 is connected to the emitter of T3 and the collector of T2 is connected to the emitter of T4. In the embodiment of Fig. 2, the
T2,T5 transistors and associated components serve as the main amplifier 10' (analogous to amplifier 10 in Fig. 1); and the
T3,T4 transistors and associated components serve as the error amplifier 12' (analogous to amplifier 12 in Fig. 1) which mixes the main amplifier 10' nonlinearities with the nonlinearities of
T3 and T4 to reduce the nonlinearities in the output signal Volt.
Thus, the main amplifier 10' drives directly the error amplifier 12' so that the buffers of Fig. 1 are not needed. The emitter followers and diodes T1,T6,D1,D2,D3,D4 are used for level shifting to avoid saturation of the main amplifier 10' transistors (T2,T5). Diodes could be used for T1 and T6, however, the use of emitter followers is preferred to provide high impedance current source inputs to the amplifier.
An important aspect of the invention is that the error amplifier 12 (and 12' in the embodiment of Fig. 2) serves several purposes. Because it is connected to the input signal and the main amplifier, the error amplifier output current includes linear and nonlinear components related to the input signal and linear and nonlinear components related to the output from the main amplifier. The error amplifier thus produces distortion components that can be used to cancel each other or at least reduce their overall contribution at the error amplifier output.
The error amplifier also functions to mix these signals thus resulting in the reduced distortion components at the error amplifier output.
As explained herein with respect to equation (7), the designer has available several controllable parameters by which to achieve a reduction in nonlinear distortion. For example, linearity correction can be achieved by making R3=R4 and R1=R2 with the value of R1 being twice the value of R3; and furthermore making the current value of 14 twice that of I3. Also, the transistors T2,T3,T4 and T5 should be well matched. These criteria are but one example available to the designer and can be determined by the use of computer simulation of the circuit of Figs. 1 or 2 such as by using SPICE or other analog simulation, as is well known to those of ordinary skill in the art.
While the invention has been shown and described with respect to specific embodiments thereof, this is for the purpose of illustration rather than limitation, and other variations and modifications of the specific embodiments herein shown and described will be apparent to those skilled in the art within the intended spirit and scope of the invention as set forth in the appended claims.
Claims (22)
1. A feed-forward amplifier comprising: a first differential pair of transistor amplifiers, each in a commonemitter configuration for receiving an input signal; and a second differential pair of transistor amplifiers, each in commonemitter configuration for receiving said input signal; each emitter of said first pair transistors being cross-coupled to a collector of one of said second pair transistors thereby reducing distortion components at an output of said first pair of transistors.
2. An amplifier according to claim 1 wherein each of said first pair of transistors has a collector load resistor and an emitter degeneration resistor connected thereto.
3. An amplifier according to claim 2 wherein each of said second pair of transistors has an emitter degeneration resistor connected thereto.
4. An amplifier according to claim 3 wherein each of said first pair emitter degeneration resistors is connected in series to a first current source.
5. An amplifier according to claim 4 wherein each of said second pair emitter degeneration resistors is connected in series to a second current source.
6. An amplifier according to claim 5 wherein said first pair emitter degeneration resistors are equal in value and said second pair degeneration resistors are equal in value, said second pair degeneration resistors being twice in value said first pair degeneration resistors.
7. An amplifier according to claim 6 wherein said second current source is twice the value of said first current source.
8. An amplifier according to claim 7 further comprising means for level shifting said input signal applied to said second differential pair of transistors.
9. An amplifier according to claim 8 wherein said level shifting means comprises one or more series connected diodes between said input signal and said second pair of transistors.
10. An amplifier according to claim 9 wherein said level shifting means further comprises an emitter follower input stage for each of said second differential pair transistors.
11. An amplifier according to claim 10 wherein the amplifier is realized in an integrated circuit such that said first differential pair of transistors and said second differential pair of transistors are matched.
12. A wideband amplifier with inherent distortion correction comprising a main differential amplifier and a stacked differential error amplifier, said main amplifier having a pair of transistors both in a common-emitter configuration connectable to an input signal; said error amplifier having a pair of transistors both in a common-emitter configuration connectable to said input signal; said error amplifier producing an output signal that corresponds to a combination of said error amplifier trans conductance current and a current component produced by said main amplifier thereby reducing nonlinear distortions in said error amplifier output signal.
13. An amplifier according to claim 12 wherein said error amplifier transistors each are connected to respective collector load and emitter degeneration impedances, each of said main amplifier transistors having a respective collector connected in series to one of said error amplifier emitters.
14. An amplifier according to claim 12 wherein said main amplifier transistor collectors are cross-coupled to said error amplifier transistor emitters.
15. A method for reducing dc distortion in a differential amplifier comprising the steps of:
a) converting a differential input voltage to a differential current signal using a first differential transconductance stage;
b) converting the differential input voltage to a second differential current using a second differential trans conductance stage; and
c) combining said first and second differential currents to produce an output signal from said first trans conductance stage that has a reduced distortion.
16. The method of claim 15 wherein the step of combining said first and second differential currents includes the step of mixing the collector and emitter currents of cross-coupled transistors in the first and second differential stages.
17. A feed-forward amplifier comprising a first trans conductance amplifier means connectable to an input signal for producing a first signal having a nonlinear distortion component; and a second transconductance amplifier means connectable to the input signal and to said first amplifier means for producing an output signal having a reduced nonlinear distortion component compared to said first signal; said second amplifier means producing a second signal having a nonlinear distortion component; said second amplifier means mixing said first and second signals so as to reduce said nonlinear distortion components in said output signal.
18. A feed-forward amplifier according to claim 17 wherein said first and second signals are currents.
19. A feed-forward amplifier according to claim 17 wherein said first amplifier means includes first buffer means for producing a first voltage corresponding to said first signal; and wherein said second amplifier means includes second buffer means connectable to the input signal for producing a second voltage; said second amplifier means producing an output current having a portion corresponding to said first voltage, and another portion corresponding to said second voltage such that said output current has a reduced nonlinear distortion compared to said first signal.
20. A feed-forward amplifier according to claim 17 wherein said first transconductance amplifier means is cross-coupled to said second transconductance amplifier means.
21. An amplifier, substantially as described with reference to the accompanying drawings.
22. A method of amplification, substantially as described with reference to the accompanying drawings.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9212943A GB2268015A (en) | 1992-06-18 | 1992-06-18 | Feed-forward distortion reduction for transconductance amplifier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9212943A GB2268015A (en) | 1992-06-18 | 1992-06-18 | Feed-forward distortion reduction for transconductance amplifier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| GB9212943D0 GB9212943D0 (en) | 1992-07-29 |
| GB2268015A true GB2268015A (en) | 1993-12-22 |
Family
ID=10717317
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9212943A Withdrawn GB2268015A (en) | 1992-06-18 | 1992-06-18 | Feed-forward distortion reduction for transconductance amplifier |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2268015A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0870360A1 (en) * | 1995-12-27 | 1998-10-14 | Maxim Integrated Products, Inc. | Differential amplifier with improved low-voltage linearity |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4146844A (en) * | 1977-10-31 | 1979-03-27 | Tektronix, Inc. | Feed-forward amplifier |
| US4390848A (en) * | 1981-02-12 | 1983-06-28 | Signetics | Linear transconductance amplifier |
| US4720685A (en) * | 1986-09-02 | 1988-01-19 | Tektronix, Inc. | FET transconductance amplifier with improved linearity and gain |
| US4748420A (en) * | 1987-10-19 | 1988-05-31 | Tektronix, Inc. | Quadcomp amplifier |
| US4804926A (en) * | 1988-02-01 | 1989-02-14 | Tektronix, Inc. | FT quadrupler amplifier with linearity correction |
| US4820997A (en) * | 1986-03-03 | 1989-04-11 | Hitachi, Ltd. | Differential amplifier circuit |
| US5006818A (en) * | 1987-10-12 | 1991-04-09 | Kabushiki Kaisha Toshiba | Linear differential amplifier |
| US5091701A (en) * | 1990-10-15 | 1992-02-25 | Analog Devices, Inc. | High efficiency cross-coupled folded cascode circuit |
-
1992
- 1992-06-18 GB GB9212943A patent/GB2268015A/en not_active Withdrawn
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4146844A (en) * | 1977-10-31 | 1979-03-27 | Tektronix, Inc. | Feed-forward amplifier |
| US4390848A (en) * | 1981-02-12 | 1983-06-28 | Signetics | Linear transconductance amplifier |
| US4820997A (en) * | 1986-03-03 | 1989-04-11 | Hitachi, Ltd. | Differential amplifier circuit |
| US4720685A (en) * | 1986-09-02 | 1988-01-19 | Tektronix, Inc. | FET transconductance amplifier with improved linearity and gain |
| US5006818A (en) * | 1987-10-12 | 1991-04-09 | Kabushiki Kaisha Toshiba | Linear differential amplifier |
| US4748420A (en) * | 1987-10-19 | 1988-05-31 | Tektronix, Inc. | Quadcomp amplifier |
| US4804926A (en) * | 1988-02-01 | 1989-02-14 | Tektronix, Inc. | FT quadrupler amplifier with linearity correction |
| US5091701A (en) * | 1990-10-15 | 1992-02-25 | Analog Devices, Inc. | High efficiency cross-coupled folded cascode circuit |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0870360A1 (en) * | 1995-12-27 | 1998-10-14 | Maxim Integrated Products, Inc. | Differential amplifier with improved low-voltage linearity |
| EP0870360A4 (en) * | 1995-12-27 | 2002-06-05 | Maxim Integrated Products | Differential amplifier with improved low-voltage linearity |
Also Published As
| Publication number | Publication date |
|---|---|
| GB9212943D0 (en) | 1992-07-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
| WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |