GB2266017A - Sigma-delta converter - Google Patents

Sigma-delta converter Download PDF

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Publication number
GB2266017A
GB2266017A GB9207926A GB9207926A GB2266017A GB 2266017 A GB2266017 A GB 2266017A GB 9207926 A GB9207926 A GB 9207926A GB 9207926 A GB9207926 A GB 9207926A GB 2266017 A GB2266017 A GB 2266017A
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Prior art keywords
analogue
digital
quantising
noise
converter
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GB2266017B (en
GB9207926D0 (en
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Francis Neil Adams
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BAE Systems Electronics Ltd
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GEC Marconi Ltd
Marconi Co Ltd
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Publication of GB9207926D0 publication Critical patent/GB9207926D0/en
Publication of GB2266017A publication Critical patent/GB2266017A/en
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Publication of GB2266017B publication Critical patent/GB2266017B/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M3/00Conversion of analogue values to or from differential modulation
    • H03M3/30Delta-sigma modulation
    • H03M3/39Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators
    • H03M3/412Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution
    • H03M3/422Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only
    • H03M3/424Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one
    • H03M3/428Structural details of delta-sigma modulators, e.g. incremental delta-sigma modulators characterised by the number of quantisers and their type and resolution having one quantiser only the quantiser being a multiple bit one with lower resolution, e.g. single bit, feedback

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Analogue/Digital Conversion (AREA)

Abstract

In a sigma-delta converter, the digital output converted to analogue form is subtracted, 1, from the analogue input and the differences are integrated in a filter 2 before being passed to the quantising element 3. The quantising noise of the analogue-to-digital converter 3 is thus shaped to produce a minimum in the signal passband. The depth of the minimum can be increased by adding extra filter stages 2, but instability results unless the analogue-to-digital converter 3 is multi-bit. Linearity of reconversion to analogue form requires that the digital to analogue converter 5 must be single bit, which necessitates a second quantising means 6 at which truncation takes place. In accordance with the invention, the quantisation noise of the latter is suppressed by a noise cancellation path 8 at which the quantisation noise of the truncation quantising means 6, is subtracted digitally in the forward path e.g. at the node 9 to allow the benefit of higher order filters to be used without instability i.e. allowing a greater proportion of the sampling bandwidth to be usable for signals. <IMAGE>

Description

ANALOGUE-TO-DIGITAL CONVERTERS This invention relates to analogue-to-digital converters, especially to sigma-delta converters.
Sigma-delta analogue-to-digital converters include quantising means for producing a digital output, oversampled relative to the signal bandwidth, and a feedback path for feeding a signal derived from the digital output to be combined in analogue form with the analogue input for input to filter means, the output of the filter means being connected to the quantising means. This permits improved signal-to-noise ratio to be achieved from coarse quantisation by shaping the quantisation noise spectrum to suppress it within a desired bandwidth.
The extent to which the quantising noise is shaped in the signal passband depends upon the order of the loop filter within the sigma-delta analogue to digital converter.
Baseband and bandpass converters using single bit quantisation may employ second order loop filtering. The use of higher order loop filters imposes greater demands to ensure loop stability. One way of achieving higher order loop filters without loop stability being an insuperable problem is by arranging that the quantising means is multi-bit in operation. The reason why this has not been widely adopted is the difficulty in converting accurately the signal in the feedback loop derived from the digital output into analogue form. Any non-linearity in conversion in the feedback loop is not suppressed by the loop gain, only non-linearities in the forward path including the quantising means are. For this reason, sigma-delta converters are preferably and usually one bit in operation.
One proposal to utilise the advantages of multi-bit quantisation while retaining the linearity advantages of a single bit analogue-to-digital converter operates by converting the multi-bit digital signal in the feedback loop to a single bit digital signal ("A simple method to obtain significant improvement in the performance of oversampled analogue-to-digital converters", f.j. harris, A.
Constantinides, W. McKnight, and E. Brooking, ISSPA-90, International Symposium on Signal Processing Applications, Gold Coast, Australia, 27-29th August 1990). The truncation to one bit introduces quantisation noise, which is not suppressed by the loop gain, but the noise spectrum is shaped to reduce it in the signal pass band.
The invention provides an analogue-to-digital converter comprising an input for analogue signals, a first quantising means for producing a first multi-bit digital signal from which a multi-bit digital output is derived, a feedback path for feeding a signal derived from the digital output to be combined in analogue form with the analogue input for feeding along a forward path to filter means, the filtered difference signal being applied to the input of the first quantising means in use, the feedback path including second quantising means for converting the multi-bit signal derived from the digital output into a single bit signal, and a noise cancellation path for feeding a signal representative of the quantisation noise of the second quantising means to be subtracted digitally from the signal in the forward path.
The quantisation noise of the second quantising means which is added, from the feedback path, to the forward path is in analogue form in the filter means and as it enters the first quantising means, and is subtracted in digital form by means of the noise cancellation path. The suppression of what was a significant source of noise in the proposal referred to above enables full advantage to be taken of the possibility of using higher order loop filters. This in turn widens the suppressed region in the quantisation noise of the converter, increasing the ratio of usable signal bandwidth to sampling frequency. The suppression will not be complete but will depend on how closely the analogue components produce output values matching those of equivalent digital circuitry at the sampling instants.
The second quantising means is advantageously associated with means to shape the quantisation noise of the second quantising means in the feedback path, an inverse shaping being produced in the forward path to balance the shapings at the first quantising means. The delays of the digital noise correction signal on the one hand and the signal around the feedback loop on the other hand are also advantageously matched in delay. Such noise shaping may be produced by making the second quantising means a digital-todigital converter of the sigma-delta type.
An analogue-to-digital converter constructed in accordance with the invention will now be described by way of example with reference to accompanying drawings in which: Figure la is a schematic diagram of a known sigma-delta analogue-to-digital converter; Figure Ib is a diagram showing the noise spectrum of the converter; Figure ic is a diagram showing the noise spectrum of an equivalent bandpass converter; Figure 2 is a schematic diagram of a sigma-delta analogue-to-digital converter constructed in accordance with the invention; Figure 3 is a more detailed schematic diagram of the sigma-delta analogue-to-digital converter of Figure 2; and Figures 4a, 4b are diagrams showing the structure of some of the parts shown in Figure 3 in more detail; and Figure 5 is a diagram showing the overall quantisation noise of the sigma-delta converter of Figure 2.
Referring to Figure 1, the basic scheme of a sigma-delta analogue-to-digital converter is as shown. An analogue input at a summing node 1 passes along a forward path through filter means 2 such as an integrator with a low pass characteristic, before being converted to digital form by first single bit quantising means in the form of an analogue-to-digital converter 3. The digital output is fed back along a feedback path 4 in which it is converted to analogue form by a digital-to-analogue converter 5. This is subtracted at node X, so that the filter means 2 receives the difference between the analogue input and the converter's representation of that input in digital form, but converted back to analogue form. The differences are integrated by the filter means 2.
Such a converter is known, and the main advantage of it is that the quantisation noise of analogue-to-digital converter 3 is shaped to show a minimum in the region of low frequencies - Figure lb, at which the signal-to-noise ratio is consequently favourable. The reference fs in Figure ib refers to sampling rate. The sampling rate of the analogue-to-digital converter 3 is several times greater than the Nyquist rate for the signal bandwidth i.e. the analogue signal is oversampled. The filter means 2 may have a bandpass characteristic instead of a low pass characteristic, with the result that noise is suppressed in that band of frequencies (Figure lc).
As stated in the opening paragraphs of this patent specification, in an attempt to increase the depth and width of the notch in the characteristic, i.e. the rate of reduction of noise below half sampling frequency, the order of the filter means 2 has been increased. In the case of a baseband converter two integrators in series (each performing a low pass filtering function) have been employed, and in the case of a bandpass converter two bandpass filters in series have been employed. However, the information flow through a single bit quantiser is restrictea, and the bandwidth and dynamic range which can be encoded without such converters becoming unstable, is inadequate.
To overcome this, the analogue-to-digital converter 3 has been made multi-bit and, since the digital-to-analogue converter 5 is one bit because more than one bit leads to non-linearities, an additional quantising means is included in the feedback path to convert from multi-bit to one bit.
Such a quantising means 6 (the second quantising means) is included in the improved sigma-delta analogue-to-digital converter constructed in accordance with the invention shown in Figure 2. Like parts have been given like reference numerals to Figure 1 and throughout the other figures. The filter means 2 has four stages and is baseband. Slant lines have been included to indicate where the digital signal is multi-bit in the converter.
The quantising noise of the quantising means has been shaped in a previous proposal, but the noise still adds to the overall noise of the sigma-delta analogue-to-digital converter.
In accordance with the invention, the quantising noise of the qua.clsing means 6 is extracted at an adder 7 and fed along a noise cancellation path 8 to an adder 9 in the forward path at which it is subtracted in digital form from the output of the analogue-to-digital converter 3 (the first quantising means).
It will be observed that the one bit signal leaving the second quantising means 6 has the quantising noise associated with the truncation process combined with it, and that after conversion to analogue form at digital-to-analogue converter 5 the signal is fed along the forward path from the summing node 1. This signal is converted to digital form at analogue-to-digital converter 3. Consequently the noise is suppressed at summing node 9 where the digital version of the quantising noise is subtracted in digital form.The extent of the suppression depends solely on the extent to which the quantising noise, converted to analogue form in digital-to-analogue converter 5 is converted accurately to digital form in the forward path of the sigma-delta analogue-to-digital converter i.e. the extent of the suppression depends on the extent to which the time sampled pulse response of the analogue elements in the converter is made equivalent to the desired z-transform impulse response of the converter.
The second quantising means 6 shapes the noise it produces to reduce it at low frequencies, and an inverse shape is applied by the filter means 2 in order that the noise is unweighted at quantising means 3, so that the quantising means encodes a flat noise spectrum enabling it to be cancelled at node 9. The signal fed along the noise cancellation path is the difference between the input and output of the quantising element of the quantising means 6, and is also unshaped.
After cancellation of the noise at adder 9, the number of bits in the forward path is truncated in third quantising means 10 to a desired number. Instead of following the converter by the usual digital filter to remove out of band noise, the feedback loop includes an FIR filter 11 to perform this function in part, thus easing the requirements on the post-conversion digital filter.
Referring to Figure 5, the overall quantisation noise of the converter together with two tones A, B is shown. The noise shaping of the second quantising means 6 is second order, the theoretical second order noise slope being shown as a dotted line. The noise shaping of the second quantising means enables full advantage to be taken of the overall higher order notch reduction of the sigma delta converter as a whole. This is reduced in the noise cancellation process. As an example, a noise reduction of around 40dB is shown by the solid line. The order of the loop filter is fourth order and the corresponding theoretical value is shown on Figure 5.
Because the overall noise is as shown, the signal-to-noise ratio is adequate even for tone B, which means that an unusually large proportion of the bandwidth of the sampling frequency is usable.
Referring to Figure 3, the analogue-to-digital converter 3 (first quantising means) is implemented as a second order sigma delta analogue-to-digital converter.
This is shown in Figure 1, with the filter means 2 as a pair of integrators 12, 13 in series. 16 is the summing node, 15 the digital-to-analogue converter, 15a the feedback path and 14 the quantising means.
The filter means 2 is implemented as a pair of filters 2a, 2b. Suitable fractions of the signal from summing node 1 are also taken into the inputs of filters 2b, 12, 13 (not shown) to force the time-sampled pulse response of the analogue elements in the converter to be equivalent to the desired z-transform impulse response of the converter.
The main sigma-delta loop, because of the two filters 2a, 2b, reduces the quantisation noise produced by the quantising means 3 with a second order slope i.e. 12dB per octave. However, because the quantising means 3 is itself a second order sigma-delta converter which slopes the quantisation noise produced by analogue-to-digital converter 14 with a second order slope due to the integrators 12, 13 i.e. 12dB per octave, the overall slope of the noise produced by the analogue-to-digital converter 14 is fourth order i.e. 24dB per octave.
Despite the overall fourth order sloping of the quantisation noise of the analogue-to-digital converter 14, the second order slope of the quantising noise produced by the second quantising means 6 is cancelled by the inverse slope of the integrators 2a, 2b, so that the noise spectrum encoded by the sigma-delta converter 3 is unweighted, permitting cancellation of the noise spectrum in digital form at the adder 9. The second quantising means is a sigma-delta converter, and consists of summing node 17, two low pass filters 18, 19, quantising means 20, and feedback path 21. It is to be noted that this is a digital-to-digital converter and hence the filters 18, 19 are digital filters, and also that there is no digital-to--analogue converter in the feedback path 21. The quantising noise of the quantising means 20, which performs a truncation function to transform the multi-bit input to a single bit output, is shaped with a second order slope (12 dB per octave), and this is made flat by the inverse slope applied by the integrators 2a, 2b.
Equally, the delay of the noise cancellation signal must be matched between the noise cancellation path and around the loop, for when the signals reach the adder 9.
The adder 7 is connected across the quantising means 20 and its quantisation noise signal is not shaped with frequency.
The third quantising means 10 includes a first order digital-to-digital sigma-delta converter 10a and truncates the wordlength (number of bits) fed to the output to make the digital output more manageable for subsequent processing stages.
This truncation process by the third quantising means of course introduces further quantisation noise like the second quantising means 6. The sigma-delta digital-to-digital converter 10a has a first order noise suppression. However, it acts as the quantising means of a sigma-delta converter having four stages of integration, namely, -, 2b, lOb, lOc (the latter two being digital), with the feedback loop 4. As a result, the first order noise spectrum is suppressed to fourth order, producing an overall fifth order noise slope. Thus, the noise of the third quantising means does not mask the fourth order noise slope of the converter as a whole.
Figures 4a, 4b show a suitable implementation of the second and third quantising means in z-domain form. The coefficients cf7 - cflO may be suitably adjusted to adjust the noise shaping in the second quantising means to reduce transients in the loop and, to make this invisible overall, compensating forms are introduced into filters 2a, 2b, 3, 10 and 11.
Referring to Figure 5, the rapid roll-off around half sampling frequency is due to an FIR filter 21, which may also perform a decimation function and so reduce the sampling rate. In a conventional sigma-delta converter, however, the noise would rise rapidly before this roll-off, and the relatively flat shape of the noise between tone B and the roll-off at half-sampling frequency is due to the introduction of a Butterworth filtering characteristic for the converter. The latter has an amplitude and phase response which are flat over a relatively wide bandwidth to permit g ~d coding i.e. good loop stability and high quality transient behaviour, of pulse signals. Impulse response fidelity is important in some applications to preserve pulse shape and reduce overshoots.Hitherto, out-of-band quantising noise generated in a sigma-delta converter was removed in a digital filter connected to the output of the overall sigma-delta converter, which also hitherto performed a decimation function to reduce the sampling rate. The overall phase and step response behaviour of the converter were determined by such a digital filter, which may not have been optimised for its impulse characteristics. The filter 11 on the other hand incorporates a large amount of filtering, but not decimation, within the converter loop itself so that for many purposes the output might be used directly in the manner of a direct sampling device.
The Butterworth characteristic stems from the transfer functions of analogue integrators 2a, 2b, digital integrators lob, lOc, the FIR filter 11 in the feedback path having a high pass characteristic, and the simple FIR filter 21 in the data path. The high pass characteristic of the FIR filter 11 enables the wanted, lower frequencies to be boosted in the loop relative to the unwanted rising noise shape at higher frequencies, producing the flatter region before r'I off referred to. It is preferred that the number of integrations in the forward path is made equal to the order of the Butterworth filter function i.e. four integrations and the filter function fourth order. The combination of integrations in the forward path and digital filtering in the feedback path provide the denominator of the Butterworth filter transfer function.The cut-off frequency is one eighth of the Nyquist frequency corresponding to the sampling rate i.e. one sixteenth of the main sampling rate.
Typical numbers of bits at various points around the loop are as follows: at the output of the analogue-to-digital converter 3, five; along the noise cancellation path 8, eleven; at the output of the adder 9, ten; at the output of the third quantising means 10, eight; at the output of the digital filter 11, eleven. The FIR filter 21 adds four bits to the eight bit output to make a total of twelve bits. A typical sampling rate for the analogue-to-digital converters 14 of the first quantising means, 20 of the second quantisation means, and that of the third quantising means, is 200MHz in each case, and a typical signal bandwidth for the complete converter is 12.5MHz. This represents oversampling of eight times. In a typical prior sigma-delta converter, oversampling of one hundred t zes could be expected.
Various modifications may of course be made without departing from the scope of the invention. Thus, instead of the converter operating on baseband signals, it may instead operate on bandpass signals. In this case, the integrators would be replaced by bandpass filters. Secondly, instead of second order noise shaping in the second quantising means 6, other orders of noise shaping could be applied, including none at all, and some or all of the noise shaping to achieve the same slope (not necessarily flat) at the output of the first quantising means 3 could be imposed on the digital cancellation path 8. Equally, other degrees of noise shaping by the loop filter of the overall converter are possible. Also, delays could be imparted to equalise the noise signals at the adder 9 along the noise cancellation path 8. Further, the noise cancellation signal could be applied at a later point than adder 9 if desired e.g. after the digital integrators lOb, lOc but desirably before the final truncation at converter 10a.

Claims (12)

1. An analogue-to-digital converter comprising an input for analogue signals, a first quantising means for producing a first multi-bit digital signal from which a multi-bit digital output is derived, a feedback path for feeding a signal derived from the digital output to be combined in analogue form with the analogue input for feeding along a forward path to filter means, the filtered difference signal being applied to the input of the first quantising means in use, the feedback path including second quantising means for converting the multi-bit signal derived from the digital output into a single bit signal, and a noise cancellation path for feeding a signal representative of the quantisation noise of the second quantising means to be subtracted digitally from the signal in the forward path.
2. An analogue-to-digital converter as claimed in claim 1, in which the second quantising means is associated with means to shape the quantisation noise of the second quantising means in the feedback path, an inverse shaping being produced in the forward path to balance the shapings at the first quantising means.
3. An analogue-to-digital converter as claimed in claim 2, in which the second quantising means and associated noise shaping means forms part of a sigma-delta modulator in feedback path.
4. An analogue-to-digital converter as claimed in any one of claims 1 to 3, in which the first quantising means is associated with means to shape the quantisation noise it produces.
5. An analogue-to-digital converter as claimed in claim 4, in which the first quantising means and associated noise shaping means form part of a sigma-delta modulator in the forward path from the input.
6. An analogue-to-digital converter as claimed in any one of claims 1 to 5, in which the feedback path includes a digital filter for suppressing out of band noise.
7. An analogue-to-digital converter as claimed in claim 6, in which the digital filter is a finite impulse response (FIR) filter.
8. An analogue-to-digital converter as claimed in claim 6 or claim 7, in which the combination of filtering in the forward path and digital filtering in the feedback path provide the denominator of a Butterworth filter transfer function for the converter.
9. An analogue-to-digital converter as claimed in any one of claims 1 to 8, including third quantising means for truncating to a smaller number of bits the digital signal produced by the first quantising means to produce the digital output.
10. An analogue-to-digital converter as claimed in any one of claims 1 to 9, in which the signal representative of the quantising noise of the second quantising means is in use subtracted digitally from the output of the first quantising means.
11. An analogue-to-digital converter as claimed in any one of claims 1 to 10 in which the converter is of the sigma-delta type.
12. An analogue-to-digital converter substantially as hereinbefore described with reference to Figures 2 to 5 of the accompanying drawings.
GB9207926A 1992-04-10 1992-04-10 Analogue-to-digital converters Expired - Fee Related GB2266017B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002019533A2 (en) * 2000-08-30 2002-03-07 Hrl Laboratories, Llc Multi bit delta sigma modulator having linear output
EP1583245A2 (en) * 2004-03-10 2005-10-05 Matsushita Electric Industrial Co., Ltd. Data converter device and data conversion method, and transmitter circuit, communications device and electronic device using the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002019533A2 (en) * 2000-08-30 2002-03-07 Hrl Laboratories, Llc Multi bit delta sigma modulator having linear output
WO2002019533A3 (en) * 2000-08-30 2003-09-04 Hrl Lab Llc Multi bit delta sigma modulator having linear output
EP1583245A2 (en) * 2004-03-10 2005-10-05 Matsushita Electric Industrial Co., Ltd. Data converter device and data conversion method, and transmitter circuit, communications device and electronic device using the same
EP1583245A3 (en) * 2004-03-10 2006-09-13 Matsushita Electric Industrial Co., Ltd. Data converter device and data conversion method, and transmitter circuit, communications device and electronic device using the same
US7817725B2 (en) 2004-03-10 2010-10-19 Panasonic Corporation Data converter device and data conversion method, and transmitter circuit, communications device and electronic device using the same

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GB2266017B (en) 1995-04-19
GB9207926D0 (en) 1992-05-27

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