GB2264574A - External data storage device and connection therefor. - Google Patents
External data storage device and connection therefor. Download PDFInfo
- Publication number
- GB2264574A GB2264574A GB9203754A GB9203754A GB2264574A GB 2264574 A GB2264574 A GB 2264574A GB 9203754 A GB9203754 A GB 9203754A GB 9203754 A GB9203754 A GB 9203754A GB 2264574 A GB2264574 A GB 2264574A
- Authority
- GB
- United Kingdom
- Prior art keywords
- storage device
- data
- port
- microcomputer
- combination according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0004—Parallel ports, e.g. centronics
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
Abstract
A microcomputer 2 having a normally-write-only interface (e.g printer port) 3 is connected to an external data storage device (e.g disk drive) 1, by means of the interface. When connected, the arrangement serves to adapt the interface 3 to allow bi-directional data transfer, e.g as multiplexed bytes or half-bytes, between the data storage device 1 and the microcomputer 2. <IMAGE>
Description
EXTERNAL DATA STORAGE DEVICE
AND CONNECTION THEREFOR
This invention relates to a connection for connecting an external data storage device to a microcomputer.
Particularly, the invention relates to a means for connecting an external data storage device to a parallel or serial port of a microcomputer.
A data storage device is capable of providing a large memory. Generally, however, such devices need to be permanently enclosed in the particular microcomputer being used, or, if transportable, require the use of a hard-ware device driver. As a consequence of this, the transfer of a large amount of data between a computer and data storage device can be inflexible and time consuming or restrictive in that a particular storage device can serve only one or a limited number of microcomputers.
The present invention sets out to provide an arrangement in which an external data storage device may be easily and conveniently connected to a microcomputer, thus allowing fast and efficient bidirectional transfer of data between the microcomputer and the data storage device.
According to one aspect of the present invention there is provided a data storage device for connection to a microcomputer having a write-only part, the said storage device comprising connector means adapted to releasably engage the said port, and means serving to adapt the said port to enable bi-directional data flow such that data may be written from the microcomputer to the storage device or read from the storage device to the computer via the said port.
According to a further aspect of the invention there is provided in combination a microcomputer having a write-only port installed and a data storage device for connection to the microcomputer, the said storage device comprising connector means adapted to releasably engage the saidport, the arrangement serving to adapt the said port to enable bi-directional data flow such that data may be written from the microcomputer to the storage device or read from the storage device to the computer via the said port.
The parallel port, for example, was originally designed for efficient handling of output only devices; its primary design objective is to serve as a printer interface. The electrical signals in this interface tend to be meaningful only to printers and other output signal receiving devices.
By defining a certain protocol of communication between the external storage device and the host computer, the invention provides an arrangement in which electrical signals of the parallel port no longer have their conventional meanings.
In order to save or restore information from the external storage device, a device driver is utilised.
The driver permits the use of the storage device as an additional storage device which co-exists with the computer; preferably it is assigned as the last logical drive in the system.
Preferably, use is made of the DOS device driver. The storage device can thus become a standard device in the
DOS environment, available for access at any time, from within programs and from outside programs, such as from the command level.
Applications software can run directly from the storage device.
Preferably the storage device is a hard disk device.
The present invention is, for example, suitable for use with a standard parallel port such as the type known as a "centronics" port. The conventional centronics port has only 4 input lines which are generally used for transmitting control signals from a printer to the computer. The input lines are not used for data transfer. The only data transfer is transmitted from the microcomputer to the printer in an 8-bit format such as ASCII code. Generally, this is not suitable for bidirectional data transfer, since the degree of control via the input lines is limited. The present invention sets out to remove this obstacle by discarding the standard centronics printer standard normally used by the interface and adapting the electrical characteristics of the interface by use of a completely different data-transfer protocol.This effectively makes use of the available input control lines as data input. The resulting arrangement therefore adapts the interface to allow 16-bit data (frequently used in storage devices) to be transferred in both directions via the centronics port, leading to increased speed of operation and efficiency.
An embodiment of the invention will now be described by way of example and with reference to the accompanying drawings in which:
Figure 1 is a view of part of a microcomputer, with its cover removed, exposing a conventional data storage device mounted within;
Figure 2 is a view of a data storage device and part of a microcomputer, showing how the two may be connected together in accordance with the invention;
Figure 3 is a schematic diagram showing the features of a data storage device in accordance with the present invention and its relationship with a conventional centronics interface;
Figure 4 shows the interface standard of a centronics type interface for use in accordance with the present invention;
Figure 5 depicts the protocol of a write cycle in accordance with the invention;
Figure 6 depicts the protocol of a read cycle in accordance with the present invention; and
Figure 7 diagrammatically depicts an interface of a data storage device according to an embodiment of the present invention.
Figure 1 depicts a microcomputer 52 fitted with a known data storage device 50, a power supply 60, an interface card 54, a system board 56 and a speaker 58. The storage device is permanently fitted to the computer and is, therefore, not transportable.
It can be seen from Figures 2 and 3 that the storage device 1 according to the invention is in the form of a module which also comprises suitable on-board interface circuitry 12, to which the memory 10 is directly connected via a bus 14. In the present case, the memory 10 is in the form of a hard disk, however, any suitable form of memory could be used, such as, for example, an optical or solid state drive. The data storage device 1 can be either self-powered (for example, by using re-chargeable cells) or can be connected to the microcomputer 2 by means of a keyboard adapter 4 which fits to a standard keyboard port 5 in the microcomputer 2. The interface circuitry 12 comprised within the module connects directly to the centronics interface 3 of the computer 2.
The microcomputer 2 is set up with an operating system which is not, for example, limited to DOS only. The effect of this is that the external storage device 1 essentially becomes part of the microcomputer 2.
As can clearly be seen from Figure 4, the conventional interface standard of the centronics printer port is not used. The electrical characteristics on the data transfer protocol are significantly altered. The numbering of the pins is the standard numbering used within the Art and does not relate to any similarly numbered feature in any of the other figures. The same is also true of the bits identified in this figure.
Figure 5 depicts the protocol of a write cycle. The activity portrayed on the various signal lines shown in
Figure 5 illustrates instructions performed at an assembly level. The operation of the write cycle will now be described, with reference to various nominal times during the cycle which are designated T1, T2, T3 etc sequentially. These times are given to refer to points where operative actions occur and do not refer to set times within the cycle.
Before data is sent from the microcomputer to the storage device, a mode character is sent to the centronics interface at time T1. The mode character designates the impending mode of operation (in this case "write"). The second instruction is then sent at time
T2, which notifies the centronics interface of the address of the registers to be used within the storage device. At time T3 the same address is subsequently latched onto the storage device. The write mode characteristic sent to the centronics port via pin 17, as can be seen from Figure 4. The address information is sent via pins 2 to 9.
Data to be written from the microcomputer to the storage device is then similarly treated by first impressing the first eight-bits (the low byte), representing the first part of a 16-bit word, upon the centronics interface (T4) and subsequently latching the byte to the storage device (T5). The next byte (the high byte), representing the second part of the 16-bit word, is transferred in a similar fashion. When all of the data has been sampled and latched (T8) the interface is reset and becomes ready for another operation mode.
The latching to the storage device is controlled by a logic change in the address/data toggle Each time the address/data toggle toggles, the data impressed upon the centronics port is latched to the storage device.
Thus this arrangement provides time-dependent multiplexing, allowing sixteen-bit data to be transferred with limited lines.
Referring to Figure 6, it can be seen that the read cycle makes use of a similar protocol to the write cycle. A significant difference is, however, that the read cycle makes use of a further instruction: IN for transmission of data from the storage device to the microcomputer. The operation of the read cycle will now be explained. It should be noted that T1 in the read cycle does not necessarily correspond to T1 in the write cycle. The read and write modes are not time dependent for their commencement of operation, but respond purely to the toggle signal assigning a fresh mode character.
At T1 a read cycle is primed by sending a suitable mode character to the centronics port. At T2, the command/data address is impressed upon the port and this is subsequently latched to the storage device by means of the address/data toggle toggling at T3. Since only four input lines are provided on the centronics interface, it is necessary to multiplex the 16 bits of information stored at the address into four four-bit segments termed "low byte, low nibble", "low byte, high nibble", "high byte, low nibble" and "high byte, high nibble". The low byte, low nibble portion comprises bits 2, 3, 1 and 0 which are simultaneously transmitted via pins 10, 11, 12 and 13 respectively. The order of transmission of the remaining bits can be readily seen from Figure 3.The retrieval of data is read segment-by-segment, with each portion being time-division-multiplexed in response to a toggling of the address/data toggle. Once the entire 16 bits of data have been retrieved, another toggle at time T12 resets the whole operation, preparing to accept another mode character.
Figure 7 generally illustrates the interface of this embodiment in block-diagram form. Information interchange is accomplished by the implementation of several data latches. These latches 1, 2, 3, 4, 5, 6 and 7 may be implemented as standard TTL 74 LS 244 or 74LS373. Alternatively, 4, 5, 6 and 7 may be implemented as standard TTL 74LS157. The toggle detector simply provides a modulus 8 with the address/data toggle as its clock input. A subsequent divide-by-2 and divide-by-4 will then by used as synchronisation clocks for all latches in the circuit.
The mode select circuitry is made up of TTL gating, first enabling the appropriate latches to avoid bus contention between a read and a write operation.
Example A software device driver is used which has the standard structure of an installable block device driver. The program is written to Microsoft design specifications and this permits DOS to recognise the new device connected and integrate it with the rest of the present standard devices; the device-controlling software routines actually become part of DOS.
The major components of the device driver are: a device header, a MSDOS request block, a local pointer to the request block, strategy code, and an interrupt code.
The device header contains the information that identifies the device driver; the main fields that must be found in the body of the device header are: a pointer to the next device driver, driver attributes, the entry address of the strategy codes, the entry address of the interrupt code and the name of the device driver.
By correctly using all the parameters of the device driver, the external hard disk will have the same structure as when used under a DOS environment. This determines a complete compatibility of all standard software applications.
The host computer accesses the drive by programming a set of registers (called the task file) with the desired values. All data transfers are completed via programmed input or output signals. The main commands that can be used to control the hard disk are: recalibrate, read sector(s), write sector(s), verify sector(s), format track, seek, diagnostics, set drive parameters, read sector buffer, write sector buffer and identify drive.
All commands are decoded from the command register in the task file. On completion of a command, the drive will return valid status information via the status register. The main phases of completion of any command are: idle state, select phase, command phase, data phase and result phase.
In order to ensure the correct operation of the hard disk, checking of the status information is necessary.
In the case of encountering errors an error code and additional error information will be passed to DOS.
The following illustrates the basic programme structure characterising the above described protocol. The base language used in this instance is that of an Intel instruction code, though the invention is not limited to use of this code.
DATA'R ; THIS ROUTINE WRITES A DATA WORD ( 2 BYTES ) THROUGH THE DATA PORT TO THE EXTERNAL IDE HARD DISK
INPUT ; BX CONTAINS DATA TO WRITE: BL = LOW DATA BYTE ;BH = HIGH DATA BYTE ;
OUTPUT ; [AL] DESTROYED ; [DX] DESTROYED
DATAWR BROC NEAR
MOV AL,DATAWR ; operation mode
MOV DX,CTRLP ; control port address
OUT DX,AL ; set operation mode
MOV AL WRADDR ; address of write data port
MOV DX,WRP ; transfer data port
OUT DX,AL ; set address to write
MOV AL,TOG1 ; determine first toggle
MOV DX, CTRLP
OUT DX,AL ; latch address
MOV AL,BL
MOV DX,WRP
OUT DX,AL ; prepare first data byte
MOV AL,TOG2
MOV DX,cTRLP OUT DX, AL ; latch first byte
MOV AL,DATAH
MOV DX,WRP
OUT DX,AL ; prepare second data byte
MOV AL,TOG3 MOV DX, CTRLP
OUT DX, AL ; latch second byte
MOV AL,TOG4
MOV DX,CTRLP
OUT DX,AL ; terminate operation
RET DATAWR ENDP
DATARD
THIS ROUTINE GETS ONE DATA WORD ( 2 BYTES ) FROM THE ; EXTEEWAL HARD DISK ;
INPUT NONE OUTPUT ; [BX] CONTAINS DATA WORD OBTAINED ;
DATARD PROC NEAR
MOV AL,DATAWR ; operation mode
MOV DX,CTRLP ; control port address
OUT DX,AL ; set operation mode MOV AL,WRADDR ; address of write data port
MOV DX,WRP ; transfer data port OUT DX,AL ; set address to write MOV ~ AL,TOG1 ; determine first toggle
MOV DX, CTRLP OUT DX, AL ; latch address
MOV AL,TOG2 OUT DX,AL
MOV DX,RDP
IN AL,DX ; get low byte / low nibble
MOV BL,AT ; save low byte / low nibble
AND: BL,OFH MOV AL,TOG3
MOV DX,CTRLP OUT DX,AL
MOV DX, RDP
IN AL,DX ; get low byte / high nibble
MOV CL,4
SHL AL,CL ADD AL,CLBL,AL ; complete low byte
MOV AL,TOG4 MOV DX,CPRLP OUT DX,AL NOV DX,RDP IN AL, DX ; read high byte / low nibble MOV BH,AL
AND BH, OFH
MOV AL,TOG5
MOV DX, CTRLP
OUT DX,AL NOV DX,RDP IN AL DX ; read high byte / high nibble SHL AL,CL
ADD BH,AL ; complete high byte
MOV AL,TOG6
MOV DX, CTRLP
OUT DX,AL
RET
DATARD ENDP
Many modifications of the invention will become apparent to those versed in the art upon making reference to the foregoing illustrative embodiment, which is given by way of example only and is not intended to limit the scope of the invention in any way.
Claims (14)
1. A data storage device for connection to a microcomputer having a write-only part, the said storage device comprising connector means adapted to releasably engage the port, and means serving to adapt the port to enable bi-directional data flow such that data may be written from the microcomputer to the storage device or read from the storage device to the computer via the said port.
2. In combination, a microcomputer having a write-only port installed and a data storage device for connection to the microcomputer, the said storage device comprising connector means adapted to releasably engage the port, the arrangement serving to adapt the port to enable bi-directional data flow such that data may be written from the computer to the storage device or read from the storage device to the computer via the port.
3. A combination according to claim 2 wherein the said port is a centronics port.
4. A combination according to claim 2 or 3, wherein the said data storage device comprises a hard disk.
5. A combination according to any are of claims 2 to 4, wherein the said data storage device comprises an internal power supply.
6. A combination according to any one of claims 2 to 4, wherein the said microcomputer comprises a keyboard adapter, the said data storage device also being connected to the said keyboard adapter and drawing its power supply via the said keyboard adapter.
7. A combination according to any one of claims 2 to 6, wherein the said data transferred between the data storage device and the microcomputer is 16-bit data.
8. A combination according to any one of claims 2 to 7, wherein the said data transferred between the data storage device and the microcomputer is time-division-multiplexed.
9. A combination according to claim 8 when dependent on claim 6, wherein each written 16-bit data word is written in two multiplexed 8-bit bytes and each read 16-bit data word is read in four multiplexed four bit segments.
10. A combination according to claim 9, wherein the reading of information operates in accordance with a read cycle comprising the following steps:
(i) sending a read mode character to the said port;
(ii) impressing a data address upon the said port;
(iii) latching the data address to the said storage
device;
(iv) retrieving the data in 4-bit segments and
multiplexing the segments; and
(v) resetting the mode character.
11. A combination according to claim 9 or 10, wherein the writing of information operates in accordance with a write cycle comprising the following steps:
(i) sending a write mode character to the port;
(ii) impressing the address of the storage device
register(s) to be used upon the port;
(iii) latching the address upon the storage device;
(iv) transferring the data in two eight-bit
multiplexed segments to the said data storage
device; and
(v) setting a fresh mode character to the port.
12. A combination according to claim 10 or 11 wherein the operation of the read and write cycles is controlled in dependence upon a toggle.
13. A combination of a microcomputer and a data storage device substantially as herein described with reference to any one of figures 2,3, 4 to 6, or 7 of the accompanying drawings.
14. A data storage device substantially as herein described with reference to any one of figures 2 or 3 of the accompanying drawings.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9203754A GB2264574B (en) | 1992-02-21 | 1992-02-21 | External data storage device and connection therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9203754A GB2264574B (en) | 1992-02-21 | 1992-02-21 | External data storage device and connection therefor |
Publications (4)
| Publication Number | Publication Date |
|---|---|
| GB9203754D0 GB9203754D0 (en) | 1992-04-08 |
| GB2264574A8 GB2264574A8 (en) | 1993-09-01 |
| GB2264574A true GB2264574A (en) | 1993-09-01 |
| GB2264574B GB2264574B (en) | 1995-10-18 |
Family
ID=10710822
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9203754A Expired - Fee Related GB2264574B (en) | 1992-02-21 | 1992-02-21 | External data storage device and connection therefor |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2264574B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2301997A (en) * | 1995-06-08 | 1996-12-18 | Hewlett Packard Co | Computer graphics fits 40 bit word onto 32 bit bus |
| EP0836136A1 (en) * | 1996-10-08 | 1998-04-15 | Lucent Technologies Inc. | Interface assembly for peripheral accessories |
| EP1396569A2 (en) | 2002-09-06 | 2004-03-10 | Dürkopp Adler Aktiengesellschaft | Programmable sewing machine system and data carrier to be used in a sewing machine system of such kind |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990016025A2 (en) * | 1989-06-21 | 1990-12-27 | Perex Limited | Data store connection |
-
1992
- 1992-02-21 GB GB9203754A patent/GB2264574B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1990016025A2 (en) * | 1989-06-21 | 1990-12-27 | Perex Limited | Data store connection |
| GB2234093A (en) * | 1989-06-21 | 1991-01-23 | Stratum Technology Limited | Data store connection |
Non-Patent Citations (2)
| Title |
|---|
| "Valitek Portable Tape Backup", C.Sandler, Computer Shopper, October 1990. * |
| Megastor advertisement, PC User magazine, 16-29 January 1991 * |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2301997A (en) * | 1995-06-08 | 1996-12-18 | Hewlett Packard Co | Computer graphics fits 40 bit word onto 32 bit bus |
| US5671373A (en) * | 1995-06-08 | 1997-09-23 | Hewlett-Packard Company | Data bus protocol for computer graphics system |
| GB2301997B (en) * | 1995-06-08 | 2000-02-23 | Hewlett Packard Co | Data bus protocol for computer graphics system |
| EP0836136A1 (en) * | 1996-10-08 | 1998-04-15 | Lucent Technologies Inc. | Interface assembly for peripheral accessories |
| EP1396569A2 (en) | 2002-09-06 | 2004-03-10 | Dürkopp Adler Aktiengesellschaft | Programmable sewing machine system and data carrier to be used in a sewing machine system of such kind |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2264574A8 (en) | 1993-09-01 |
| GB9203754D0 (en) | 1992-04-08 |
| GB2264574B (en) | 1995-10-18 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19970221 |