GB2256117A - Transmission of data pulses on intrinsically safe power lines - Google Patents

Abstract

The apparatus employs a host system, having a computer 23 and a transceiver 22, and at least one remote system, each having a micro-processor 34, a transceiver 28, and a sensing device 30. When the host computer selects one of the remote systems, each having a distinct address, data from that sensing device 30 is processed and induced on the power lines 20, 21 by that remote transceiver 28. This data is then detected by the host transceiver 22 for employment by the computer 23. Application is to oil or gas well drilling. <IMAGE>

Description

TRANSMISSION OF DATA PULSES ON INTRINSICALLY SAFE POWER LINES This invention relates to data transmission on intrinsically safe unregulated power lines in hazardous environments.

As is well known, in the electronic circuit design field, the term "Intrinsically Safe", means that the amount of power (voltage X current) or energy in use or able to be stored in a given circuit is less than that level of power required to ignite an explosive mixture of gas. The use of Intrinsic Safety (IS) as a method of circuit protection demands that every conductor (e.g. wire) entering a hazardous area be isolated so that the energy which is being transmitted into the hazardous area will be safe (e.g. below the level necessary for an explosion to occur).

Generally, a pair of isolated power lines (e.g., transformer isolation) and a pair of isolated data lines (e.g., opto-isolation or transformer isolation) limited to predetermined power levels will satisfy this requirement.

For example, in an oil or gas well drilling operation, a plurality of multi-conductor cables are employed, each to provide power and data communication to a plurality of remote sensing devices. These devices are generally located on a well platform which is a hazardous environment, thus requiring each cable (i.e., each individual conductor) to be intrinsically safe. The multi-conductor cables employed are expensive and bulky and several attempts have been made to reduce the cost and size of these cables. In particular, a reduction in the number of conductors, without eliminating any of the remote sensing devices, would provide a significant cost savings and reduce installation time. A method commonly employed to reduce the number of conductors is to have a common return conductor for both the power and data lines, thus eliminating one of the data lines.This is significant when there is a plurality of remote sensing devices, each requiring power and data lines.

The number of devices that can be powered by the power lines is limited by the intrinsically safe power limitation. Redundant pairs of power lines are required when the number of devices exceeds this limit.

The object of the present invention is to provide a device for data communication over a pair of unregulated power lines that overcomes or alleviates the above discussed and other problems and deficiencies of prior art.

Accordingly the present invention provides a device for providing data communication over a pair of unregulated power lines comprising first pulse generating means, said first pulse generating means being responsive to a first transmitting signal for inducing a first plurality of pulses on a pair of unregulated power lines; first pulse detecting means, said first pulse detecting means for detecting a second plurality of pulses present on a pair of unregulated power lines, to provide a first receiving signal, first signal processing means, said first signal processing means being responsive to said first receiving signal, said first signal processing means having first memory means for storing signals including program signals defining a first executable algorithm for providing said first transmitting signal, and for processing said first receiving signal; second pulse generating means, said second pulse generating means being responsive to a second transmitting signal for inducing said second plurality of pulses on a pair of unregulated power lines; second pulse detecting means, said second pulse detecting means for detecting said first plurality of pulses present on a pair of unregulated power lines, to provide a second receiving signal; and second signal processing means, said second signal processing means being responsive to said second receiving signal, said second signal processing means having second memory means for storing signals including program signals defining a second executable algorithm for providing said second transmitting signal, and for processing said second receiving signal.

A further aspect of the present invention provides a device for providing two-way communication over a pair of unregulated power lines comprising host communication means, said host communication means having host pulse generating means responsive to a host transmit signal for inducing a plurality of host transmit pulses on a pair of unregulated power lines, said host communication means further having host pulse detecting means for detecting a plurality of remote transmit pulses presented on a pair of unregulated power lines, to provide a host receive signal, and having host signal processing means, responsive to said host receive signal, said host processing signal means having first memory means for storing signals including program signals defining a first executable algorithm for providing said host transmit signal for requesting a remote transmit signal by specifying an address and for processing host receive signal ; and at least one remote communication means, each of said remote communication means having remote pulse generating means responsive to a remote transmit signal, for inducing said plurality of remote transmit pulses on a pair of unregulated power lines, further each of said remote communication means having remote pulse detecting means for detecting said plurality of host transmit pulses presented on a pair of unregulated power lines, to provide a remote receive signal, and each having remote signal processing means, responsive to said remote receive signal, said remote signal processing means having second memory means for storing signals including program signals defining a second executable algorithm for providing said remote transmit signal in response to said host transmit signal and for processing remote receive signal, and each having said address, said address being destinct for each of said at least one remote communication means.

In accordance with the present invention, an isolated unregulated power supply has a pair of power lines which provide the means for both data and power transmission to remote devices. A host transceiver located at the source generates and detects pulses induced on the power lines.

At least one remote transducer located at a sensing device also detects and generates pulses on the power lines. The host transceiver, in accordance with the requirements of a host computer, generates pulses on the power lines by either regulating voltage or sinking current. These pulses are detected by a voltage comparator at the remote transceiver. The output of the comparator at the remote transceiver is monitored by a micro-processor which interfaces with the remote sensing device. Each remote sensing device has a predetermined address to allow the host transceiver and computer to communicate with more than a single sensing device over a single pair of power lines.

The remote transceiver generates pulses in the power lines by sinking current between the power lines. These pulses are detected by the host transceiver's comparator, similar to the remote transceiver. The output of the host comparator is monitored by a host computer to process the data received from the sensors. Thus, power and two-way communication are provided to the sensors over a single pair of power lines.

The present invention provides power and data communication over a single pair of unregulated power lines for a plurality of sensor devices. This significantly reduces the number of conductors required in the multiconductor cable for employment in hazardous environments as compared to the prior art methods. Further, the intrinsically safe levels are maintained without sacrificing the number of devices that can be driven by a single pair of power lines.

Preferred embodiments of the invention will now be described with reference to the accompanying drawings, wherein - Figure 1 is a simplified block diagram of an apparatus for transmitting data on intrinsically safe power lines in accordance with the present invention; - Figure 2 is a simplified block diagram of a host transceiver of Figure 1; - Figure 3 is a schematic diagram of the host transceiver in Figure 2; - Figure 4 is a simplified block diagram of the remote transceiver of Figure 1; - Figure 5 is a schematic diagram of the remote transceiver in Figure 4; and - Figure 6 is a simplified block diagram of an alternate embodiment in accordance with the present invention.

Referring to Figure 1, a power source 10 is connected by a pair of lines 11 to the primary side of a transformer 12. The secondary side of transformer 12 is connected by a pair of lines 13 to a loop barrier 14.

Transformer 12 provides isolation between power source 10 and loop barrier 14. Loop barrier 14 comprises an isolated unregulated DC power supply 16 with a series resistor 18 which provides current limiting. Power supply 16 with series resistor 18 is commonly referred to as a soft supply because neither the output voltage or current are fixed. A pair of unregulated power lines 20 and 21, from loop barrier 14, are referred to as the bus which provides both power and data communications.

A host transceiver 22 connected between lines 20 and 21 provides two way communication along the bus. A host computer 23 is connected by a line 24 to host transceiver 22. Host computer 23 collects data in the receiving mode and formats data for transmission in the transmitting mode.

Line 21 is connected to an isolated ground 26. This ground 26 is isolated from power source 10 ground by transformer 12.

At least one remote transceiver 28 is connected between lines 20 and 21 at a location where a sensing device 30 is employed. Although sensing device 30 is described for use in communications, any device suitable for communications with the host may employed (e.g., a terminal). Remote transceiver 28 is connected by a line 32 to a remote microprocessor 34, to provide proper addressing for sensing device 30. Remote micro-processor 34 is connected by a line 36 to sensing device 30. Remote micro-processor 34 responds to pulses on the bus when its address is selected. Data transmission by remote transceiver 28 is accomplished when data from sensing device 30 is collected and formatted by remote micro-processor 34. This is a master/slave system and remote micro-processor 34 will only transmit and receive when selected by host computer 23.Regulated power on a line 37 is provided to power remote micro-processor 34 and sensing device 30.

Referring to Figure 2, a simplified block-diagram of host transceiver 22 is shown. Host computer 23 is connected by a line 38, labeled Tx, to a transmitting buffer 40. An output of transmitting buffer 40 is connected by a line 42 to an opto-isolator 44. Opto-isolator 44 provides isolation between the intrinsically safe environment and the nonintrinsically safe environment for data transmission. An isolated output signal of opto-isolator 44 on a line 45, is presented to a host transmitting controller 46. Host transmitting controller 46 provides a control signal on a line 50 to a voltage regulator 52 for generating pulses on a regulated portion 20a of line 20. The duration and width of pulses produced by voltage regulator 52 are indicative of the pulses generated by host computer 23. Voltage regulator 52 reduces the voltage at its output to produce a pulse on line 20a.

The transmitted pulses may be detected on a line 55 by host decoder 54 which provides a decoded signal on a line 58. The decoded signal is presented to a second optoisolator 60. An output signal of opto-isolator 60 on a line 61 is presented to a second buffer 62. The output of receiving buffer 62 is connected by a line 66, labeled Rx, to host computer 23. Thus, a loop is provided such that the data presented on line 20a can be compared, to assure that the proper data information is being transmitted.

When host transceiver 22 is receiving pulses from remote transceiver 28 (Figure 1) detection is performed on the unregulated side of voltage regulator 52, which is an unregulated portion 20b of line 20. The pulses produced by remote transceiver 28 (Figure 1) are generated by a current sink (described hereinafter). The voltage on line 20a is regulated (i.e., fixed) and line 20a connects voltage regulator 52 of host transceiver 22 to remote transceiver 28 (Figure 1), the pulses generated by the current sink of remote transceiver 28 are not detectable on the line 20a. Thus, detection of pulses transmitted by remote transceiver 28 (Figure 1) must be on the unregulated side of voltage regulator 52. The current sink, when generating a pulse, increases the current (I') demand which reduces the voltage (V') at the loop barrier 14.However, voltage regulator 52 is regulating the voltage (V) on line 20a. Thus, when the current sink is on, the current (I) is increased while the voltage (V) on the line 20a is fixed.

The input of voltage regulators 52 on line 20b is provided by loop barrier 14 (i.e., a soft supply), thus, to provide the increased current (I) on line 20a at the fixed voltage (V) the current (I') on line 20b will increase and the voltage (V') will decrease. The decreased voltage (V') on line 20b is the pulse transmitted from remote transceiver 28 (Figure 1). These pulses are presented to host decoder 54 by a line 68. The pulses are detected by host decoder 54 and processed by host computer 23 in the same manner described hereinbefore.

The voltage (V) between lines 20a and 21 is limited by a voltage limiter 70 which is connected across lines 20a and 21.

Referring now to Figure 3, a schematic of host transceiver 22 is shown. Host computer 23 is connected by line 38, labeled Tx, to NAND gate 78. Generally and hereinafter, a voltage above a logic threshold is referred to as a logic HIGH and a voltage below the logic threshold is referred to as a logic LOW. When computer 23 generates a LOW pulse the output signal on a line 79 of NAND gate 78 will be a HIGH, this signal is presented to an input of an opto-isolator 82. The HIGH pulse on line 79 turns a light emitting diode (LED) 83 off, thus, a Darlington circuit 84 of opto-isolator 82 is off. When Darlington circuit 84 is off a current will flow through a resistor 85 along a line 86 to the base of a transistor 88. This turns on transistor 88 which by a line 90 shunts a resistor 92.This produces a negative going pulse on line 20a of the output of a voltage regulator 96. This pulse is produced by the voltage change in the ratio of resistors 98, 100 and 92 (i.e., when resistor 92 is shunted). A capacitor 102 is connected between an input of voltage regulator 96 and isolated ground 26 to provide transient suppression.

A plurality of zenor diodes 104 provide voltage limitation between line 20a and the isolated ground 26. The voltage is limited to +10V DC to more easily satisfy IS Group D requirements at the current levels necessary for the circuit to function properly. A resistor 105 is employed to pull up the line 38 from host computer 23. A resistor 106 limits current flow through LED 83 of optoisolator 82. Switching speed of the Darlington circuit 84 of the opto-isolator 82 is enhanced by a resistor 108. A capacitor 109 is connected across the base and collector of transistor 88 to improve transient performance of transistor 88. The pulses produced on line 20a are presented to a decoder circuit, which comprises a capacitor 110 connected from line 20a to diode 111 and a resistor 114. Diode 111 and resistor 114 are connected in parallel.The combination of capacitor 110, diode 111 and resistor 114 provides detection of a pulse on line 20a.

These pulses on a line 116 are presented to a negative clamp circuit comprising a diode 118 and resistors 120 and 122.

The voltage from the clamp on a line 124 is presented to an input of a comparator 126. The combination of resistors 127 and 122 provide an offset voltage on line 124. A capacitor 128 connected between line 124 and isolator ground 26 filters out high frequency noise and spikes. The voltage on line 124 is compared to a voltage on a line 130 which is a reference voltage determined by a combination of resistors 132, 134 and 136. This comparison provides the detection of the negative going pulses at line 124. A resistor 138 can be employed to adjust the reference voltage on line 130 when so desired.

The output signal on a line 140 of the comparator 126 is presented to a LED 142 of a second opto-isolator 144.

When the output of comparator 126 is HIGH, LED 142 turns off, thus, a Darlington circuit 146 of second optoisolator 144 is off. The output of opto-isolator 144 is connected by line 145 to a resistor 149 which pulls line 145 HIGH when Darlington Circuit 146 is off, and to a NAND gate 150, employed as an inverter, which converts the HIGH on line 145 to a LOW signal on a line 152 at the output of NAND gate 150. Switching speed of the Darlington circuit 146 is enhanced by a resistor 153. A resistor 154 limits current flow through LED 142. The output signal of NAND gate 150 is buffered by a buffer 155 before it is presented to computer 23 on line 66, labeled Rx, for comparison of the data transmitted.

Detection of pulses from remote transceiver 28 (Figure 1) on line 20 is performed on the input side of voltage regulator 96. The pulses on line 20b are detected through a capacitor 158 in series with a resistor 159 which is connected to the clamp circuit, described hereinbefore.

The circuitry from the clamp circuit to the host computer is the same circuitry described hereinbefore to monitor transmitted pulses.

Regulated voltage on a line 160 is supplied by a +5v regulator 161 to power host transceiver circuit 22.

Referring to Figure 4, a simplified block diagram of remote transceiver 28 is shown. Remote micro-processor 34 generates an output signal on a line 162, labeled Tx, which is presented to a transmitting buffer 164. Remote microprocessor 34 only generates an output signal when its address is selected by host computer 23. The address is transmitted and received in the same manner data is transmitted and received. The buffered signal on a line 166 is presented to a remote transmitter control circuit 168.

Remote transmitter control circuit 168 controls a current sink 170, which draws current from line 20a to line 21 when a pulse is to be generated. Remote transmitter control 168 is connected by a line 172 to current sink 170. When current sink 170 is on, the demand for current (I) is increased. However, the voltage (V) on line 20a is regulated by voltage regulator 52 (Figure 2) of host transceiver 22 and the pulses generated by current sink 170 are not detectable on line 20a. These pulses are detected on line 20b (Figure 2) as described hereinbefore.

The transmitted pulses may be detected by a remote decoder 174. Remote decoder 174 is connected by a line 175 to a resistor 176 at current sink 170. Resistor 176 allows the current pulses generated by current sink 170 to be seen at the remote transceiver. A decoded signal on a line 177 is presented to a receive buffer 178. The decoded signal is buffered by buffer 178 and this signal is presented to remote micro-processor 34 on a line 179, labeled Rx, to allow verification of the data transmitted by remote microprocessor 34.

Detection of pulses generated by host transceiver 20 (Figure 1) is performed by remote decoder 174 and processed by remote micro-processor 34 in the same manner described hereinbefore.

Referring to Figure 5, a schematic of remote transceiver 28 is shown. Remote micro-processor 34 receives a signal on line 36 (Figure 1) from sensing device 30 (Figure 1) to generate data pulses on a line 162 which are presented to an inverting buffer 182. As described hereinbefore remote micro-processor 34 is a slave device and only responds when selected by the master (i.e., host computer 23). A buffered signal on a line 184 passes through a resistor 186 and continues along a line 188 to the current sink circuitry. The current sink circuitry comprises a transistor 190, resistors 176 and 194, and a capacitor 195. Transistor 190 is turned on by a pulse from micro-processor 34 to sink current from line 20a through resistor 176 down through the collector and emitter of transistor 190 and then through a resistor 194 to isolated ground 26.This results in a change in the voltage across resistor 176, which is indicative of the pulse transmitted.

Capacitor 195 across the collector and base of transistor 190 is employed to improve transient performance of transistor 190. A diode 196 is employed to create a constant current sink by maintaining a fixed voltage across resistor 194 when the transistor 190 is turned on. Thus, a plurality of pulses may be induced on line 20a to provide communications from remote transceiver 28 to host transceiver 22 (Figure 1).

The pulses generated by the current sink may be detected on a line 197. The voltage on line 197 is not regulated as is the voltage on line 20a from host transceiver 22. The voltage on line 197 is detected through a capacitor 198 in series with a resistor 200 and then presented to a clamp circuit. The clamp circuit comprises a diode 202 and resistors 204 and 206. The voltage from the clamp circuit on a line 208 is presented to a comparator 210. This voltage is compared to a reference voltage on a line 212. A reference voltage is determined by the combination of resistors 214, 216 and 218. A capacitor 219 is provided to filter out high frequency noise and spikes. The output signal of comparator 210 on a line 220 is presented to a second comparator 221. The combination of second comparator 221 with a plurality of resistors 222, 223 and 224 are employed as an inverting buffer.The buffered output signal on line 179 is presented to remote micro-processor 34 (Figure 1). This circuitry is similar to the circuitry employed in host transceiver 22, described hereinbefore.

Pulses generated by host transceiver 22 (Figure 1) on line 20a are detected as a drop in voltage presented through resistor 176 on line 197. This drop (i.e., pulse) is presented to the clamp circuitry through capacitor 198 and resistor 200 and compared by comparator 210 for detection, in the same manner described hereinbefore.

Regulated voltage on a line 229 is supplied by a +5v regulator 230 to power remote transceiver circuit 28 (Figure 1).

Referring now to Figure 6, a power source 231 is connected by a pair of lines 232 to the primary side of a transformer 233. The secondary side of transformer 233 is connected by a pair of lines 234 to a loop barrier 235.

Transformer 233 provides isolation between power source 231 and loop barrier 235. Loop barrier 235 comprises an isolated unregulated DC power supply 236 with a series resistor 237 which provides current limiting. Power supply 236 with series resistors 237 is commonly referred to as a soft supply, because neither the voltage or current are fixed. A pair of unregulated power lines 238 and 239, from loop barrier 235, are referred to as the bus which provides both power and data communications.

A host current sink 244 is connected across lines 238 and 239. A transmitted pulse generated by a host computer 245 is presented on a line 248, labeled Tx, to a buffer 250. The buffered output signal on a line 252 is presented to an opto-isolator 253. The isolated signal on a line 254 is presented to a host transmitting controller 255. The output signal of the transmitting controller 255 on a line 256 controls a host current sink 244 for the generation of pulses on line 238. Detection of pulses may be performed on line 238 by an AC coupled comparator. The AC coupling is provided by a capacitor 258 which is connected by a line 260 to the line 238 and is also connected by a line 262 to a comparator 264. Another input of comparator 264 is connected to a reference 266 for comparison of the voltage on line 262 for detection of pulses.The output signal of comparator 264 on a line 267 is presented to a second opto-isolator 268. The isolated signal on a line 269 is presented to a second buffer 270.

The buffered output signal on a line 272, labeled Rx, is presented to computer 245 for comparison of the data sent to the data received.

One of the differences between the host and remote systems is that the computer is a master and the microprocessor is a slave. The host computer sends instructions via the bus to each remote micro-processor. Each remote micro-processor having its own distinct address. Thus, the host communicates with each remote site only when selected.

A remote current sink 274 is also in parallel with loop barrier 235. A transmitted pulse generated by a remote micro-processor 276 is presented on a line 278, labeled Tx, to a buffer 280. The buffered output signal on a line 286 is presented to a host transmitting controller 288. The output signal of the transmitting controller 288 on a line 290 controls remote current sink 274 for the generation of pulses on line 238. Detection of pulses on line 238 may be performed by an AC coupled comparator. The AC coupling is provided by a capacitor 292 which is connected by a line 294 to line 238 and is also connected by a line 296 to comparator 298. Another input of comparator 298 is connected to a reference 300 for comparison of the voltage on line 296 to detect pulses. The output signal of comparator 298 on a line 302 is presented to a second buffer 308.The buffered output signal on a line 310, labeled Rx, is presented to remote microprocessor 276 for comparison of the data sent to the data received. The data is generated by a sensing device 312 which is connected to remote micro-processor 276 by a line 314.

Although a loop is described for error detection of transmitted pulses, other methods of error detection may be employed (e.g., a parity bit at the end of a formatted transmission). Although the present invention has been described for employment with intrinsically safe power lines, any so called "soft supply" lines may be employed.

Although transformers and opto-isolators have been described to provide isolation, other devices may be employed for isolation without departing from the scope of the present invention. Further, although the power lines have been described as isolated, isolation is not required for the present invention.

Claims (35)

1. Device for providing data communication over a pair of unregulated power lines comprising first pulse generating means, said first pulse generating means being responsive to a first transmitting signal for inducing a first plurality of pulses on a pair of unregulated power lines; first pulse detecting means, said first pulse detecting means for detecting a second plurality of pulses present on a pair of unregulated power lines, to provide a first receiving signal, first signal processing means, said first signal processing means being responsive to said first receiving signal, said first signal processing means having first memory means for storing signals including program signals defining a first executable algorithm for providing said first transmitting signal, and for processing said first receiving signal; second pulse generating means, said second pulse generating means being responsive to a second transmitting signal for inducing said second plurality of pulses on a pair of unregulated power lines; second pulse detecting means, said second pulse detecting means for detecting said first plurality of pulses present on a pair of unregulated power lines, to provide a second receiving signal; and second signal processing means, said second signal processing means being responsive to said second receiving signal, said second signal processing means having second memory means for storing signals including program signals defining a second executable algorithm for providing said second transmitting signal, and for processing said second receiving signal.

2. Device as claimed in Claim 1 further comprising isolated power supply means for providing an unregulated power signal on said pair of power lines, said second plurality of pulses being induced on said unregulated power signal, and said first plurality of pulses being present on said unregulated power signal.

3. Device as claimed in Claim 1 or 2 wherein said second pulse generating means comprises current sink means.

4. Device as claimed in Claim 3 wherein said first pulse generating means comprises voltage regulator means.

5. Device as claimed in Claim 3 wherein said first pulse generating means comprises current sink means.

6. Device as claimed in Claim 3 or 5 wherein said current sink means comprises transistor means; and resistor means in communication with said transistor means.

7. Device as claimed in any one of the Claims 1 to 6 wherein said first and second pulse detecting means each comprise comparator means.

8. Device as claimed in Claim 4 wherein said first pulse detecting means comprises detecting circuit means, said detecting circuit means for detecting said second plurality of pulses, said detecting circuit means in communication with two wires; negative clamp circuit means, said negative clamp circuit means for clamping the negative going voltage of said second plurality of pulses from said detecting circuit means; and comparator means, said comparator means for comparing said second plurality of pulses from said negative clamp circuit means to a reference voltage.

9. Device as claimed in Claim 8 wherein said detecting circuit means comprises capacitor means connected to one of two wires; diode means connected in series with said capacitor means; and first resistor means connected in parallel with said diode means.

10. Device as claimed in Claim 9 wherein said negative clamp circuit means comprises second resistor means connected to said first resistor means and said diode means; third resistor means connected in series with said second resistor means; and diode means connected in parallel with said second and third resistor means.

11. Device as claimed in any one of the Claims 1 to 10 wherein said first and second transmitting signals and said first and second receiving signals each comprise a plurality of binary data bits.

12. Device as claimed in any one of the Claims 1 to 11 wherein said first pulse detecting means further comprises means for detecting said first plurality of pulses on said pair of unregulated power lines respectively on said unregulated power signal.

13. Device as claimed in any one of the Claims 1 to 12 wherein said second pulse detecting means further comprises means for detecting said second plurality of pulses on said pair of unregulated power lines respectively on said unregulated power signal.

14. Device as claimed in any one of the Claims 1 to 13 further comprising isolation means, said isolation means for isolating said first transmit signal and said first receive signal.

15. Device as claimed in Claim 14 wherein said isolation means comprises opto-isolator means, said optoisolator means for each of said first transmit signal and said first receive signal.

16. Device as claimed in Claim 2 wherein said isolated power supply means comprises loop barrier means, said loop barrier means for providing a DC power signal, said loop barrier means connected across two wires; and fourth resistor means to provide said unregulated power signal, said fourth resistor means connected in series with said loop barrier means.

17. Device for providing two-way communication over a pair of unregulated power lines comprising host communication means, said host communication means having host pulse generating means responsive to a host transmit signal for inducing a plurality of host transmit pulses on a pair of unregulated power lines, said host communication means further having host pulse detecting means for detecting a plurality of remote transmit pulses presented on a pair of unregulated power lines, to provide a host receive signal, and having host signal processing means, responsive to said host receive signal, said host processing signal means having first memory means for storing signals including program signals defining a first executable algorithm for providing said host transmit signal for requesting a remote transmit signal by specifying an address and for processing host receive signal ; and at least one remote communication means, each of said remote communication means having remote pulse generating means responsive to a remote transmit signal, for inducing said plurality of remote transmit pulses on a pair of unregulated power lines, further each of said remote communication means having remote pulse detecting means for detecting said plurality of host transmit pulses presented on a pair of unregulated power lines, to provide a remote receive signal, and each having remote signal processing means, responsive to said remote receive signal, said remote signal processing means having second memory means for storing signals including program signals defining a second executable algorithm for providing said remote transmit signal in response to said host transmit signal and for processing remote receive signal, and each having said address, said address being destinct for each of said at least one remote communication means.

18. Device as claimed in Claim 17 wherein said host communication means further comprises host self-detecting means, said host self-detecting means for detecting said host transmit pulses.

19. Device as claimed in Claim 17 or 18 wherein said remote communication means further comprises remote selfdetecting means, said remote self-detecting means for detecting said remote transmit pulses.

20. Device as claimed in Claim 17, 18 or 19 wherein said remote pulse generating means comprises current sink means.

21. Device as claimed in Claim 20 wherein said host pulse generating means comprises voltage regulator means.

22. Device as claimed in Claim 20 wherein said host pulse generating means comprises current sink means.

23. Device as claimed in Claim 22 wherein said current sink means comprises transistor means and resistor means in communication with said transistor means.

24. Device as claimed in any one of the Claims 17 to 23 wherein said host and remote pulse detecting means each comprise comparator means.

25. Device as claimed in Claim 21 wherein said host pulse detecting means comprises detecting circuit means, said detecting circuit means in communication with a pair of unregulated power lines; negative clamp circuit means, said negative clamp circuit means for clamping the negative going voltage of said remote transmit pulses from said detecting means; and comparator means, said comparator means for comparing said remote transmit pulses from said negative clamp circuit means to a reference voltage.

26. Device as claimed in Claim 25 wherein said detecting circuit means comprises capacitor means connected to one of a pair of unregulated power lines; diode means connected in series with said capacitor means; and first resistor means connected in parallel with said diode means.

27. Device as claimed in claim 26 wherein said negative clamp circuit means comprises second resistor means connected to said first resistor means and said diode means; third resistor means connected in series with said second resistor means; and diode means connected in parallel with said second and third resistor means.

28. Device as claimed in any one of the Claims 17 to 27 comprising isolation means for isolating said host transmit signal and said host receive signal.

29. Device as claimed in Claim 28 wherein said isolation means comprises opto-isolator means for each of said host transmit signal and said host receive signal.

30. Device as claimed in any one of the Claims 17 to 29 wherein said host transmit signal, said host receive signal, said remote transmit signal, and said remote receive signal each comprise a plurality of binary data bits.

31. Device as claimed in Claim 30 wherein said host transmit signal comprises a data portion and an address portion.

32. Device a claimed in Claim 30 wherein said host receive signal is a data signal.

33. Device as claimed in Claim 30 wherein said remote transmit signal is a data signal.

34. Device as claimed in Claim 30 wherein said remote receive signal comprises a data portion and an address portion.

35. Device for providing data transmission on intrinsically safe unregulated power lines substantially as described hereinbefore with reference to the accompanying drawings.