GB2255257A - Telecommunications switching - Google Patents

Description

22-)52-)7 TELECOMMUNICATIONS SWITCHING The present invention is concerned

with an ATM switching network which is very flexible in terms of size and configuration with a minimum fixed cost overhead and low cost overall.

According to the present invention there is provided a switch for protocol transparent data communications between a Source and Destination wherein a message is divided into packets each packet comprising an Information Field and a Header where the Header carries, at least, a Destination Address and a Source Address and where the Destination Address is interpreted in an Interpreter to the address for an output port of the switch in each successive switch in a Network of said switches.

Preferably the Source Address is used at the Destination to identify the message of which the packet is a part.

Additionally, one of the switch ports may be connected internally to provide access via a network to a Resource Manager, which Resource Manager provides control of the Interpreter, the bandwidth allocation and an Emergency Mode feature.

The present invention will now be described, by way of example, with reference to the accompanying drawings, in which:- Figures la and lb show the CCITT recommended formats for ATM cells for User-Network Interface (UNI) and Network-Network Interface (NNI) respectively; Figure 2 shows a diagrammatic representation of a network according to the present invention; Figure 3 shows diagrammatically the path taken by a packet through a typical network; Figure 4 shows a general diagrammatic view of the structure of a switch according to the present invention; Figure 5 shows diagrammatically the switching unit of the switch of Figure 4; Figure 6 shows a diagrammatic representation of the Rate-Adaption Unit and the Policing Unit of the switch of Figure 4.

The switch which is described in accordance with the present invention is concerned with switching packets having a fixed size. Normally ATM switching is concerned with cells having variable sizes. Consequently, in respect of the present invention, reference is made to packets, whereas in the description reference is made to ATM cells. To a large extent the two can be regarded as interchangeable in the present application.

In order to meet the above objective the network is configured from a number of small integral switches. A typical size for these switches is 16 ports of which one port may be reserved for internal use. The remaining 15 ports may be used to connect to other similar switches, to users, to a public network or to network resources such as an Electronic Mail node or a Database. At least one port in the network will be connected to a Resource Manager.

In order to eliminate the substantial fixed costs resulting from the use of Virtual Circuits (VCs) which are established on demand, every external port of the network, referred to as a Network Port, has a path predefined by the Resource Manager to every other Network Port. The Destination and Source addresses are carried in the VPI and VCI fields respectively of the ATM Cell format recommended by the CCITT. The Destination address is interpreted, but not changed, in each switch in the path.

The physical interface of each switch port, excluding the port used internally, is implemented on one of several types of exchangeable unit, each providing for a specific type of external connection; for example, optical fibre, twisted pair, ribbon cable or co-axial cable. Since different types and lengths of physical medium have different bandwidth capability, adjustable rate adaption at the ports is an integral part of the switch structure.

The two CCITT recommended formats for ATM cells are shown in Figures 1(a) and 1(b) with the fields used to carry the

Destination and Source addresses shown shaded.

In the proposed network as shown in Figure 2 each Cell carries the Destination Address in the VPI field and the Source Address in the VCI field. At the input to each switch in the path of a connection the Destination Address is interpreted to an address for an output port on that switch. This interpretation is provided by a memory which is maintained by the Resource Manager.

The 12 bit VPI field of the standard Cell format for the NNI interface is split into two parts. An 8 bit field corresponding to the PI field in the UNI version of the standard ATM Cell format is used for addressing a group, typically up to 150, users within a portion of the total network; this grouping being referred to as a Mini-Network. The remaining 4 bit field is used to provide routing between separate Mini-Networks.

The interpreters at inputs to the switch may only be required to interpret either the 8 bit field or the 4 bit field depending upon whether the destination is on the same Mini-Network or on another Mini- Network; if this mechanism is used rather than interpretation of the full 12 bit field, the size of the memory needed for the interpreter is minimised. Also, if speed is not a problem, a single interpreter may be time shared over all of the inputs of a single switch.

At the destination, all of the inputs will have the same Destination Address, thus the Source Address carried in the KI field is used to distinguish between separate and possibly interleaved multi-cell messages arriving simultaneously from several different sources, and also to provide a destination for response.

The Source Address will use only 12 of the 16 bits of the VCI field. The remaining four bits are not directly of concern to the network but may be used for one of several different purposes between a pair of network endpoints.

One of the uses for the remaining 4 bits is to identify one of up to 16 Virtual Circuits simultaneously established between a particular network Source Address and Destination Address; this requires a signalling protocol between the end points that is carried transparently by the network.

A second use for the remaining 4 bits is to control a 4-way multiplexer. For this application the 4 bits are split into two 2 bit fields providing multiplexer destination and source sub-addresses.

The diagram shown in Figure 3 demonstrates a path through a typical network configuration.

In order to minimise the probability of short-term congestion on links in the network each switch input port is provided with a bandwidth control mechanism which limits the short-term average bandwidth to a value supplied by the Resource Manager. This function is referred to as "policing".

If the short term average bandwidth allocated to the port is exceeded then Cells are likely to be deleted and lost, however in order to avoid the clipping of bandwidth peaks originating from bursty sources an input queue is provided; it is the output from the queue that is restricted in bandwidth thus Cells are only lost when the queue overflows.

A feature often required in private data networks is the ability to send data from a single port to a group of network ports; this is referred to as Multicasting.

Some of the values in the 8 bit 01 field may be used to identify a group of addresses in the network. These values are of two types, Local and Global. A value chosen for Local Multicast relates to a group of destinations on one Mini-Network; in this case the number of Destination addresses the Mini-Network can support is reduced by the number of Local Multicast addresses provided. A value chosen for Global Multicast relates to a group of Destination addresses which may be anywhere in the network; in this case the number of Destination addresses which can be supported in every Mini-Network is reduced by the number of Global Multicast addresses provided.

PI values chosen for Multicast addresses are interpreted in each switch as for Destination addresses but the Interpreter may provide addresses for two or more output ports of the switch; in this case duplicate copies of the Cell are generated within the switch. The group of addresses identified by a Multicast value in the 8 bit PI field may include the Source address as a Destination (for example when a single Multicast value is used to define a group of users who commonly communicate with each other); in order to avoid the formation of undesirable address loops the address of the source port of a switch is deleted from the interpreted group of switch ports.

A block diagram of the switch structure is shown in Figure 4, while the switching unit is shown in Figure 5 and the Rate-Adaption and Policing Unit are shown in Figure 6.

All VPI values defined as Multicast have priority access to the interpreted switch output ports. A VPI value may be defined as "Multicast" even when only one destination is addressed, in order to gain priority access.

In general, interpretation is on either the 8 bit VPI field or the 4 bit VPI field but the Rate-Adaption unit uses the full 12 bit field to address a 1 bit wide memory which identifies "Emergency Mode". With Emergency Mode set at a switch port, the Bandwidth Control is disabled so that the full bandwidth of the physical medium can be utilised.

A 4096xl bit memory is addressed by the Source address, carried in the VCI field of a Cell. If the addressed bit is set and if Emergency Mode is enabled at that port by the Resource Manager then Emergency Mode is set for the port. Default mode is restored after a short time-out if no further "Emergency Mode" Cells are received at the port.

Sources which have been given the capability to initiate Emergency Mode are allocated two addresses, the second for Default Mode operation.

All Cells requiring Emergency Mode Operation would be defined as Multicast to gain access priority at the switch output ports.

Use of Emergency Mode is likely to result in significant deterioration of performance for all other data sharing the same links in the network thus this feature must be used very sparingly.

The performance of the network is monitored by examining the short-term average size of contention resolving queues used for statistical multiplexing within each Switch Unit, and of queues used in the Rate Adaption Units for rate adaption of the switch outputs and policing of the inputs. This information is stored in a memory of the switch microprocessor and is available for interrogation by the Resource Manager via the switch port connected internally.

The Resource Manager is typically an application run on a personal computer connected to one of the Network Ports which can provide features such as histograms showing performance at a switch and its ports, path trace, identification of heavily loaded ports, a network schematic and identification of sources using Emergency Mode. The Resource Manager is able to control the network by the re-configuration of paths, by changing the bandwidth allocated to ports and by enabling or disabling certain features such as Prtiority (single destination Multicast) and Emergency Mode.

Each switch operates synchronously internally using a local clock generator. There is no requirement for synchronisation across the network; the asynchronous nature of the transport mechanism together with the queues provided by the Rate-Adaption and Policing mechanisms on all ports allow modest differences in clock rate between switches, whilst the Bandwidth Allocation feature provides for gross differences. Similarly the physical transport medium may also operate asynchronously; for example a port connecting to the Public Network may have its rate locked to the Public Network but is independent of the rate in the terminating switch of the Private Network.

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Claims (16)

1. A switch for protocol transparent data communications between a Source and a Destination wherein a message is divided into packets each packet comprising an Information Field and a Header where the Header carries, at least, a Destination Address and a Source Address and where the Destination Address is interpreted in an Interpreter to the address for an output port of the switch in each successive switch in a Network of said switches.
2. 2. A switch as claimed in Claim 1 wherein the Source Address is used at the Destination to identify the message of which the packet is a part.
3. 3. A switch as claimed in Claim 1 or 2, wherein one of the switch ports is connected internally to provide access via a switching network to a Resource Manager.
4. 4. A switch as claimed in Claim 3, wherein information on the performance of the switch is provided by monitoring the short term average length of all queues to determine the bandwidth and the information is stored for on-demand access by the Resource Manager.
5. 5. A switch as described in Claim 4, wherein control of the Interpreter, the bandwidth allocation and an Emergency Mode feature are provided by the Resource Manager.
6. 6. A switch as claimed in any preceding claim, in which the packets are of fixed length and in the format recommended by the CCITT for ATM Cells and where the Destination Address is carried in the VPI field and the Source Address is carried in the VCI field.
7. 7. A switch as claimed in Claim 6, where the 8 bit VPI field defined for the UNI format of Cells is used to address destinations in a local network of said switches and where the 4 additional bits of the NNI format are used to identify to which of one or more local networks the required destination is connected.
8. 8. A switch as claimed in Claim 6 or 7, wherein the Source Address uses 12 bits of the 16 bit VCI field and where the remaining 4 bits provide two 2 bit fields for the Source and Destination addresses of a 4-way multiplexer.
9. 9. A switch as claimed in any preceding claim, including means for providing Rate Adaption to permit different rates of transmission on different physical media connected thereto.
10. 10. A switch as claimed in any preceding claim, wherein means for managed bandwidth control is provided at each input port of the switch and wherein the means for bandwidth control is preceded by an input queue of limited maximum length, which queue permits a proportion of input bandwidth transitions beyond the set value.
11. 11. A switch as claimed in Claim 10 wherein the Emergency Mode feature disables the bandwidth control on a particular input port and is activated by interpretation of certain values of a Source Address and is disabled after a period of time.
12. 12. A switch as claimed in Claim 10, wherein a source which owns an Emergency Mode address is allocated a second address for normal usage.
13. 13. A switch as claimed in any preceding claim wherein some of the Destination Address values are used to define a group of Destinations in the network so that the interpretation of the Destination Address value in a particular switch may result in more than one output port of the switch being addressed and copies of the packet being sent to each of the addressed ports, such packets having priority of access to the output ports of the switch.
14. 14. A switch network including a plurality of switches as claimed in any preceding Claim, wherein the links therebetween operate asynchronously with respect to each other.
15. 15. A switch substantially as hereinbefore described, with reference to and as illustrated in the accompanying drawings.
16. 16. A switching network comprising a plurality of switches as claimed in Claim 15, and substantially as hereinbefore described with reference to the accompanying drawings.