GB2253929A

GB2253929A - Disk drive emulation

Info

Publication number: GB2253929A
Application number: GB9204103A
Authority: GB
Inventors: David Mottram
Original assignee: Distribution Systems and Computers Ltd
Current assignee: Distribution Systems and Computers Ltd
Priority date: 1991-02-26
Filing date: 1992-02-26
Publication date: 1992-09-23
Also published as: GB9204103D0; GB9104001D0

Abstract

An electronic data storage arrangement 10 for use with a computer 12 comprises control moans including modified BIOS software 14 operable to receive instructions and data from a data processing device 16, in conventional form for reading or writing from or to a disc. Solid state RAM memory 20 has a data portion 22 allocated to store data received from the control means, and an identifying portion 24 allocated to store identifying data which identifies the data stored at a plurality of locations within the data portion 22. The control board 15 can interrogate the portion 24 to find a location within the data portion 22 for data to be written or read, and can access the data portion 22 to read or write. The modified BIOS converts data from conventional form for disc storage to a form suitable for storage in the memory means 18. <IMAGE>

Description

Electronic Data Storage Arrangement The present invention relates to electronic data storage arrangements and in particular, to computer memories.

It has become conventional for personal computers (PC's) to incorporate one or more disc drives, to allow data storage on disc. The physical and electrical parameters of discs, and data formats, have all become standardised. Disc operating software is readily available. One such system is known as DOS.

The degree of standardisation and the general familiarity of users with the operation of disc drives have led to their general acceptance as an established technology. However, there are disadvantages. For instance, the magnetic medium of the discs is delicate, and vulnerable to damage from sources such as heat, magnetic fields, dirt, dust and liquids, unless carefully protected. If a damaged disc is used in a disc drive by mistake, serious damage to the disc drive can result.

Furthermore, the operation of the disc drive is largely mechanical, which makes conventional disc drives vulnerable to breakdown, and places limitations on the speed with which data can be accessed from a disc. These mechanical limitations make disc access extremely slow in relation to data processing speeds within electronic data t processing apparatus.

It is an object of the present invention to obviate or mitigate these and other disadvantages of the prior art.

According to the invention, there is provided an electronic data storage arrangement comprising control means operable to receive instructions and data from a data processing device in conventional form for reading or writing from or to a disc, memory means comprising a solid state RAM memory having a data portion allocated to store data received from the control means, and an identifying portion allocated to store identifying data which identifies the data stored at a plurality of locations within the said data portion, the control means being operable, in response to instructions, to interrogate the identifying portion of the solid state RAM memory to ascertain a corresponding location within the data portion for data to be written to or read from the arrangement, and to access the data portion in response to the results of the interrogation to read or write data, the control means being further operable to convert data between a form suitable for storage in the memory means and a conventional form for storage on disc.

Preferably the memory means comprises a plurality of solid state RAM circuits. One of the plurality of solid state RAM circuits preferably provides the identifying portion of the memory means. The remainder of the plurality of solid state RAM circuits may together provide the data portion. The arrangement may comprise a plurality of 32k solid state RAM circuits.

The identifying data in the identifying portion may identify a location by identifying a solid state RAM circuit. The identifying data may identify an address within that solid state RAM circuit. The control means may be operable to select the solid state RAM circuit to which data is written or read. The control means may be operable to select the address within the solid state RAM circuit, to which data is written or read.

Preferably the control means comprises modified BIOS (binary operating system) software operable to convert data as aforesaid. A control circuit may be operable to read or write data from or to a selected location in the data portion the control circuit communicating with the data processing device over a conventional BUS. Preferably the modified BIOS software is retained within the data processing device with which the arrangement is being used.

In use, data is preferably received by the control means from conventional DOS software within the data processing device with which the arrangement is being used.

The arrangement preferably further contains a permanent store for software and modifying means operable to modify conventional BIOS software in accordance with the permanently stored software in order to cause the modified software to operate as part of the control means as aforesaid. The modifying-means may be operable as aforesaid when a data processing device with which the arrangement is used is booted.

The arrangement may further comprise a housing which houses the memory means, and a port for receiving the housing, the port and housing having data transfer means which allow data to be transfered between the housing and the port. The port may comprise contacts operable to supply power to a housing located in the port. The port may comprise detecting means operable to detect the presence of a housing in the port and to enable the data transfer means and/or the contacts only when a housing is present. The detecting means may incorporate delay means which prevent the data transfer means and/or the contacts from being enabled until the expiry of a delay period beginning when a housing is first detected.

The detecting means is preferably operable to disable the data transfer means and/or the contacts when a housing is to be removed, and to provide a signal to an operator to authorise removal of the housing only after the data transfer means and/or the contacts have been disabled. The delay means may prevent the provision of the signal until the expiry of a delay period beginning when the data transfer means and/or the contacts are disabled.

The invention also provides a method of storing electronic data, in which data and instructions are received from a data processing device in conventional form for reading or writing from or to a disc, solid state RAM memory means are notionally divided into a data portion allocated to store data and an identifying portion allocated to store identifying data which identifies the data stored at a plurality of locations within the said data portion, and in which the identifying portion of the solid state RAM memory is interrogated in response to instructions from the data processing device to ascertain a corresponding location within the data portion for data to be written or read, and the data portion is accessed in response to the results of the interrogation to read or write data, and in which data received from the data processing device is converted to a form suitable for solid state RAM storage, and data read from the solid state RAM memory means is converted to a conventional form for storage on disc before being sent to the data processing device.

Preferably, the solid state RAM memory means comprises a plurality of solid state RAM circuits, and a location in the first portion is identified by identifying a solid state RAM circuit and a location within that solid state RAM circuit. The solid state RAM circuit to which data is written or read is preferably selected with reference to the contents of the second portion.

Preferably software is permanently stored and used to modify conventional BIOS software to function as aforesaid. Preferably the BIOS is modified when the data processing device is booted. Preferably the permanently stored software is used to overwrite part of a conventional BIOS.

One embodiment of the present invention and its method of operation will now be described in more detail, by way of example only, and with reference to the accompanying drawings in which: Fig. 1 is a highly schematic diagram of the arrangement in use with a PC computer; and Fig. 2 is a diagram showing a data housing forming part of the invention, and a port for receiving the housing.

Fig. 1 shows an electronic data storage arrangement 10 in use with a PC computer 12. The arrangement 10 comprises control means including modified BIOS software 14 operable to receive instructions and data from a data processing device 16 and in conventional form for reading or writing from or to a disc. The control means further includes a control board 15 which communicates with the BIOS 14 over a conventional BUS 17. Memory means shown generally at 18 comprise a solid state RAM memory 20 having a data portion 22 allocated to store data received from the control means 14, and an identifying portion 24 allocated to store identifying data which identifies the data stored at a plurality of locations within the said data portion 22.The control board 15 is operable in response to instructions received from the data processing device 16 via the BIOS 14, to interrogate the identifying portion 24 to ascertain a corresponding location within the data portion 22 for data to be written to or read from the arrangement 10, and to access the data portion 22 in response to the results of the interrogation to read or write data. The modified BIOS 14 converts data between a form suitable for storage in the memory means 18, and a conventional form for storage on disc.

In more detail, the computer 12 includes a central processing unit (CPU) 26 which runs a DOS system 28. It is to be appreciated that the representation of the computer 12 in Fig. 1 is highly schematic, and that conventional features which are not relevant to the invention are not shown. The DOS 28 is connected to the BIOS 14 at 30. The BIOS 14 is connected to the board 15 through the BUS 17. The board 15 has two connections to the memory means 18. A two way data connection 32 allows data to be written to the memory means 18, or read from the memory means 18. A control connection 34 allows the board 15 to select part of the memory means 18 for data transfer over the connection 32, as will be described later.

The arrangement 10 also comprises a permanent (ROM) memory 36 on the board 15, containing software.

The memory means 18 consists of a plurality of solid state RAM memory circuits, such as a total of 128 solid state circuits each having a capacity of 32k and giving a total capacity of 4MBytes. The data portion 22 and the identifying portion 24 may therefore each consist of a number of separate circuits which together form the corresponding portion of the memory.

Further details of the arrangement are apparent from the operation of the arrangement, which will now be described. When the computer 12 is first booted, the CPU installs a conventional BIOS by reading the BIOS from permanent (ROM) memory 37 into RAM memory at 14. At this stage, the computer 12 is capable of communicating with a conventional disc in a conventional disc drive.

However, the arrangement 10 then uses the software stored in the memory 36 to overwrite part of the BIOS, to leave a modified BIOS in place at 14. After modification, the BIOS is still able to load DOS to the CPU 16, e.g. from another conventional disc connected to the BUS 17.

If the CPU 12 requires a file to be read, a request is sent from the DOS to the modified BIOS, in conventional form for a DOS to access a disc drive. When the modified BIOS 14 receives such a request from the DOS, asking for a file to be read, the modified BIOS 14 instructs the board 15 to use the connection 34 to select the identifying portion 24 of the memory 18 for connection to the data connection 32. The identifying portion 24 can then be interrogated to determine the location of the requested file within the data portion 22. The file may be stored at a single sequence of consecutive addresses, or may be broken up and stored at a variety of locations in the data portion 22. If so, each of these locations will be identified in the identifying portion 24, which preferably also maintains a register of locations not currently in use within the data portion 22.

Once the modified BIOS 14 has ascertained the location of the file called for by the DOS, the board 15 enables the appropriate solid state RAM circuit of the first portion 22 by using the connection 34, and selects the appropriate address within that circuit, in order to begin retrieving the contents of that location, thereby retrieving the requested file. Data read from the memory means 18 in this manner is passed to the BIOS in a form and at a speed appropriate to storage in solid state RAM memory. The BIOS then operates, by virtue of its modification, to convert the data into a form corresponding to the form in which data would be received from a conventional disc. Having completed this conversion, a data stream is sent back to the DOS over the connection 30, at a speed which is conventional for disc storage.The DOS therefore receives data in a form indistinguishable from data which would be received from a disc, in response to a request which is in conventional form for accessing a disc.

When the DOS wishes to write data to memory, details of the relevant file are again sent to the modified BIOS 14 in conventional form for writing to disc. The modified BIOS 14 then communicates with the board 15 to cause the identifying portion 24 of the memory 18 to be interrogated to locate the appropriate solid state RAM circuit 22 and address for storing the file, or to have an unused address allocated for storing a new file. Details of the allocated address are recorded in the circuit 24. The appropriate circuit 22 of the data portion can then be selected over the connection 34 and data can be written to that location.

The data file received from the DOS will not be in a form appropriate for storage in the solid state RAM circuits 22, but will be in conventional form for writing to disc.

The BIOS therefore performs a conversion to an appropriate form. Thus, the DOS writes data in conven tional form, as if to a disc, but the data is, in fact, written to solid state RAM memory.

It will be apparent from the above description that the mechanical operation of a conventional disc drive in selecting disc sectors and tracks. Locations of the data portion 22 are selected electronically over the control connection 34. Consequently, the data is available for reading or writing immediately the connection 34 has selected the appropriate solid state circuit 22. This arrangement increases the speed of access to the level of speed associated with electronic solid state operation, rather than mechanical operation. Moreover, the non-mechanical nature of the arrangement reduces its vulnerability to damage, wear etc. The avoidance of a mechanical system for reading the data from the storage medium reduces the risk of corruption of data.

However, the DOS acts precisely as if dealing with a conventional disc, both in terms of the commands sent to the BIOS, and the form of the data sent and received.

Thus, the CPU 26 can run any conventional DOS software, with a conventional DOS, but the increased speed of access to memory will enhance the operation of this software.

In order to further improve the analogy between the arrangement 10 and a conventional disc, the memory 18 can be built into a housing which is removable from the computer 12, so that stored data can be removed for replacement by other data in an alternative memory, or for transport to another machine. This mimics the replacement of a disc by another disc. Fig. 2 shows a housing 40 which incorporates the memory 18 (not shown in Fig. 2). The housing 40 is shown partially inserted in a port 42 forming part of the computer 12. The housing 40 includes a connector portion 44 which mates with a second connector portion 46 when the housing 40 is fully inserted into the port 42. The connectors 44,46 provide the connections 32,34 (Fig. 1) between the board 15 and the memory 18. In addition, the connectors 44,46 may provide a power supply to the housing.The power supply may be provided to maintain power to the solid state RAM memory 18, and also to recharge a battery back-up system incorporated in the housing 40.

The connectors 44,46 preferably also incorporate mating connections 48,50 which are used to detect the presence of a housing 40 in the port 42. The presence of a housing 40 may be sensed over a connection 49 when the connections 48,50 mate, and may for instance be used to instruct software that a housing has been inserted or removed. It may be desirable to provide a beacon 51 to indicate when a housing 40 is correctly inserted, or to instruct a user to remove the housing from the port, or to leave the housing in the port. For instance, a detecting device 52 (shown as hardware, but which could be implemented in software) may cause the connectors 44,46 to be disabled while a housing is being inserted or removed. The device 52 may operate in the following manner. Until a housing has been inserted, the connectors 46 will be disabled (with the exception of the connection 50).As soon as the connection 50 indicates the presence of a housing fully inserted in the port 42, the device 52 waits for a short delay, such as one half of a second. This allows any transients etc. to settle.

At the end of the delay, the device 52 enables the connectors 46 and illuminates the beacon 51 to serve as a warning that the housing 40 is connected to the port and should not be removed. When the housing 40 is to be removed, the device 52 can first disable the connectors 46, but keep the beacon 51 illuminated for a further short delay to allow transients to settle, especially power supply transients. At the end of the delay, the beacon 51 is turned off, to indicate to the user that the housing can be removed.

It will be apparent from the above description and the accompanying drawings that many variations and modifications can be made to the arrangement shown, without departing from the scope of the present invention.

Whilst endeavouring in the foregoing specification to draw attention to those features of the invention believed to be of particular importance it should be understood that the Applicant claims protection in respect of any patentable feature or combination of features hereinbefore referred to and/or shown in the drawings whether or not particular emphasis has been placed thereon.

Claims

1. An electronic data storage arrangement comprising control means operable to receive instructions and data from a data processing device in conventional form for reading or writing from or to a disc, memory means comprising a solid state RAM memory having a data portion allocated to store data received from the control means, and an identifying portion allocated to store identifying data which identifies the data stored at a plurality of locations within the said data portion, the control means being operable, in response to instructions, to interrogate the identifying portion of the solid state RAM memory to ascertain a corresponding location within the data portion for data to be written to or read from the arrangement, and to access the data portion in response to the results of the interrogation to read or write data, the control means being further operable to convert data between a form suitable for storage in the memory means and a conventional form for storage on disc.

2. An arrangement according to claim 1, wherein the memory means comprises a plurality of solid state RAM circuits.

3. An arrangement according to claim 2, wherein one of the plurality of solid state RAM circuits provides the identifying portion of the memory means.

4. An arrangement according to claim 3, wherein the remainder of the plurality of solid state RAM circuits together provide the data portion.

5. An arrangement according to any of claims 2 to 4, comprising a plurality of 32k solid state RAM circuits.

6. An arrangement according to any of claims 2 to 5, wherein the identifying data in the identifying portion identifies a location by identifying a solid state RAM circuit.

7. An arrangement according to claim 6, wherein the identifying data identifies an address within that solid state RAM circuit.

8. An arrangement according to claim 6 or 7, wherein the control means is operable to select the solid state RAM circuit to which data is written or read.

9. An arrangement according to claim 8, wherein the control means is operable to select the address within the solid state RAM circuit, to which the data is written or read.

10. An arrangement according to any preceding claim, wherein the control means comprises modified BIOS software operable to convert data as aforesaid.

11. An arrangement according to claim 10, wherein a control circuit is operable to read or write data from or to a selected location in the data portion, the control circuit communicating with the modified BIOS software over a conventional BUS.

12. An arrangement according to claim 11, wherein the modified BIOS software is retained within the data processing device with which the arrangement is being used.

13. An arrangement according to any preceding claim, wherein, in use, data is received by the control means from conventional DOS software within a data processing device with which the arrangement is being used.

14. An arrangement according to any preceding claim, containing a permanent store for software and modifying means operable to modify conventional BIOS software in accordance with the permanently stored software in order to cause the modified software to operate as part of the control means as aforesaid.

15. An arrangement according to claim 14, wherein the modifying means is operable as aforesaid when a data processing device with which the arrangement is used is booted.

16. An arrangement according to any preceding claim, further comprising a housing which houses the memory means, and a port for receiving the housing, the port and housing having data transfer means which allow data to be transfered between the housing and the port.

17. An arrangement according to claim 16, wherein the port comprises contacts operable to supply power to a housing located in the port.

18. An arrangement according to claim 16 or 17, wherein the port comprises detecting means operable to detect the presence of a housing in the port and to enable the data transfer means and/or the contacts only when a housing is present.

19. An arrangement according to claim 18, wherein the detecting means incorporate delay means which prevent the data transfer means and/or the contacts from being enabled until the expiry of a delay period beginning when a housing is first detected.

20. An arrangement according to claim 18 or 19, wherein the detecting means is operable to disable the data transfer means and/or the contacts when a housing is to be removed, and to provide a signal to an operator to authorise removal of the housing only after the data transfer means and/or the contacts have been disabled.

21. An arrangement according to claim 20, wherein delay means prevent the provision of the signal until the expiry of a delay period beginning when the data transfer means and/or the contacts are disabled.

22. An electronic data storage arrangement substantially as described above with reference to the accompanying drawings.

23. A method of storing electronic data, in which data and instructions are received from a data processing device in conventional form for reading or writing from or to a disc, solid state RAM memory means are notionally divided into a data portion allocated to store data and an identifying portion allocated to store identifying data which identifies the data stored at a plurality of locations within the said data portion, and in which the identifying portion of the solid state RAM memory is interrogated in response to instructions from the data processing device to ascertain a corresponding location within the data portion for data to be written or read, and the data portion is accessed in response to the results of the interrogation to read or write data, and in which data received from the data processing device is converted to a form suitable for solid state RAM storage, and data read from the solid state RAM memory means is converted to a conventional form for storage on disc before being sent to the data processing device.

24. A method according to claim 23, wherein the solid state RAM memory means comprises a plurality of solid state RAM circuits, and a location in the first portion is identified by identifying a solid state RAM circuit and a location within that solid state RAM circuit.

25. A method according to claim 23 or 24, wherein the solid state RAM circuit to which data is written or read is preferably selected with reference to the contents of the second portion.

26. A method according to any of claims 23 to 25, wherein software is permanently stored and used to modify conventional BIOS software to function as aforesaid.

27. A method according to claim 26, wherein the BIOS is modified when the data processing device is booted.

28. A method according to claim 26 or 27, wherein the permanently stored software is used to overwrite part of a conventional BIOS.

29. A method of storing electronic data, substantially as described above with reference to the accompanying drawings.

30. Any novel subject matter or combination including novel subject matter disclosed, whether or not within the scope of or relating to the same invention as any of the preceding claims.