GB2251524A - Analogue oversampled finite impulse response filter - Google Patents
Analogue oversampled finite impulse response filter Download PDFInfo
- Publication number
- GB2251524A GB2251524A GB9022533A GB9022533A GB2251524A GB 2251524 A GB2251524 A GB 2251524A GB 9022533 A GB9022533 A GB 9022533A GB 9022533 A GB9022533 A GB 9022533A GB 2251524 A GB2251524 A GB 2251524A
- Authority
- GB
- United Kingdom
- Prior art keywords
- analogue
- summer
- fir filter
- shift register
- passive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
- H03H17/06—Non-recursive filters
- H03H17/0614—Non-recursive filters using Delta-modulation
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mathematical Physics (AREA)
- Filters That Use Time-Delay Elements (AREA)
Abstract
An analogue oversampled FIR filter structure has a SIGMA - DELTA modulator (Block 1) which encodes an analogue input signal into a train of digital pulses. The digital pulses representing the analogue input are stored and propagated down a binary shift register (Block 2) which controls the coupling between a reference source and passive or active components forming part of an analogue summer or summer/integrator (Block 3). The passive or active components provide the coefficients for the FIR filter being implemented. The values of the passive or active components can be programmable or variable to implement programmable or adaptive FIR filters. An example of the SIGMA - DELTA modulator is described (Fig 2). <IMAGE>
Description
Analogue Oversampled Finite Impulse Response Filter
This invention relates to a circuit structure which implements what are known as FIR (finite impulse response) filters.
Finite impulse response filters (or transversal filters) are a well known filter type for their linear phase characteristic and are widely used in applications where frequency selective filtering with linear phase is required.
FIR filters are typically implemented using special or general purpose digital computers or using charge coupled devices (CCD).
Because of the number of multiplications required, digital computer implementation of FIR filters tends to be slow, complex and consumes large power. COD technology requires special integrated circuit processing steps which differ from the standard digital MOS (metal oxide semiconductor) technology. The implementation of FIR filters using COD technology therefore tends to be more expensive.
A third approach is to implement FIR filters with analogue integrated circuits, for example, using switched-capacitor (SC) techniques. Such analogue integrated circuits are known for their low power consumption and low cost. They can be fabricated using standard MOS technology.
The main problem with implementing an analogue FIR filter is the realization of analogue delay-storage elements. Known switchedcapacitor delay-storage elements are prone to various signal degradations caused by noise, clockfeedthrough, gain deviation due to capacitance mismatch, power-supply coupling and offset.
When a signal propagates down a long line of many such analogue delay-storage elements, the above errors accumulate which seriously degrade the performance of the FIR filter. A typical
SC delay-storage element consists of an op-amp and several capacitors. A large number of such delay elements requires a large silicon area which translates to high cost for the resulting FIR filter.
According to the present invention there is provided an Analogue
Oversampled FIR Filter Structure comprising a A modulator, a binary shift register, digital logic circuits for grouping pairs of bits of the shift register and an analogue summer circuit.
A specific embodiment of the invention will now be described bi- way of example with reference to the accompanying drawings in which:
Figure 1 shows the block diagram of an FIR filter structure with a -A modulator, a binary shift register, a reference voltage and an analogue summer/integrator circuit implemented using the switched capacitors.
Figure 2 shows a possible embodiment of a 2nd-order S-t modulator using switched capacitors.
Figure 3 shows the measured power density spectrum of the output of a 2nd-order -A modulator for a sine input at lkHz.
Figure 4 shows the measured amplitude and phase transfer characteristics of an FIR filter implemented according to the present invention.
Referring to Figure 1 the -A modulator marked block 1 is a well known circuit building block which converts an analogue input signal VIN to a digital output V'. V' is a train of digital pulses representing plus or minus reference voltage VR. The density of the pulses V' reflects the amplitude of the input voltage VIN. V' is applied to an n-bit binary shift register marked block 2. Block 3 is an analogue switched capacitor summer/integrator structure. The 2n outputs of the shift register marked b1, b1, b2, b2, ... bn-1, bn-1, bn, bn are redrawn in block 3 to indicate that they are connected to the controlling nodes of the same name for the switches marked s1, s1', s2, 5n-1' ... Sn-1, Sn-1', Sn, sn'.The switches marked SA, SB, are SH are controlled by two nonoverlapping clock phases represented by 4)1 and #2. The capacitance ratios C1/CFS C2/CFr ... Cn~1/CF, Cn/CF determine the coefficients of the resulting
FIR transversal filter.
The specific embodiment of the 2nd-order -A modulator shown in
Figure 2 is a well known structure for encoding the analogue input VIN into a digital pulse train. The quantization error introduced by such encoding concentrates at high frequencies, due to the feedback structure of the -A modulator. A typical power density spectrum of the -A modulator output V' for a sinewave input is shown in Figure 3. The noise spectrum can be seen to be low at low frequencies but rises as the frequency increases. The pulse train which propagates down the binary shift register therefore also contains high frequency noise.
In the present invention the s- modulator is combined with a binary shift register and an analogue summer or a summer/ integrator. The analogue summer provides coefficients which implement low frequency bandlimiting types of FIR filters. The characteristics of such bandlimiting FIR filters are exploited in the present invention to naturally remove the high frequency noise introduced by the -A modulator, enabling the use of a simple binary shift register as the delay-storage elements in lieu of the error prone analogue delay-storage elements.
Although digital signals instead of the original analogue input is propagated down the delay line, the FIR filter according to the present invention is precision analogue because the digital signals are only used to control the charging and discharging of capacitors by the precision reference source, in this specific case voltage source VR. The S-h modulator and the analogue summer can also be implemented easily using known precision analogue circuits such as the ones used in this specific example.
When the clock frequency is high compared to the signal frequencies, an FIR filter with a high number of coefficients can be implemented by the present invention with low power consumption, low cost in terms of silicon area and high performance.
To illustrate the validity of the principles described in the preceding paragraph the measured transfer function of a very simple FIR filter with only 32 taps implemented according to the present invention is shown in Figure 4. Both the desired linear phase and frequency selective amplitude characteristic have been obtained.
Another specific embodiment of te invention will now be described by way of example with reference to the accomp ryn.g drawings in which: Figure 5 shows the block diagram of an FIR filter structure with a -A modulator, a binary shift register, digital logic circuits for grouping pairs of bits of the shift register, a reference voltage and an analogue summer/integrator circuit implemented using the switched capacitors.
Referring to both Figure 5 and Figure 1 the two examples differ only in Block 2 and Block 3. Due tc the symmetrical character istic of linear phase FIR filters, the capacitors marked C1 is equal to Cn in value, C2 is equal to Cn~1, etc. In the present invention this characteristic is exploited to save capacitor area. Each pair of identical capacitors are replaced by one capacitor of the same value. The total number of capacitors and control switches for n filter coefficients is only n/2 instead of n.The n control signals a1, b1, a2, b2 ... for the n switches sl, s1', s2, s2', ... s(n-l) /2 S (n-l) /2 t Sn/2, sn/2' are the outputs of the pairs of AND and NOR gates in Block 2, Figure 5. The two inputs to each pair of AND and NOR gates are pairs c shift register outputs dl and dn, d2 and dn~1 etc, as shown in Figure 5.
In both examples the reference voltage VR in Figure 1 and 2VR in
Figure 5, all the capacitances in both figures can be made programmable or electrically variable to provide programmable or variable coefficients for the FIR filter. A specific embodiment for the programmable capacitor can be what is known as the binary weighted capacitor array [1]. Programmable and/or adaptive FIR filters can therefore also be implemented by the present invention.
Reference [1] J. L. McCreary and P. R. Gray, "All MOS charge redistribu- tion analog-to-digital conversion techniques - Part I", IEEE J.
Solid-State Circuits, vol. SC-10, pp.371-379, Dec. 1975.
Claims (5)
1. An Analogue Oversampled FIR Filter Structure comprising a -A modulator of any order, a binary shift register, digital logic circuits for grouping pairs of bits of the shift register and an analogue summer or summer/integrator circuit, the -A modulator encoding the analogue input into a string of binary pulses which is fed to and propagated down an n-bit binary shift register, whose-n outputs either directly or through some digital logic controlling the connection between a precision reference source and the passive and/or active components forming part of an analogue summer or summer/integrator and providing the coefficients for the FIR filter or programmable FIR filter or adaptive FIR filter being implemented.
2. A A modulator - binary shift register combination as claimed in claim 1, wherein an analogue signal can be stored and delayed in binary digital form.-
3. A reference source - analogue summer or summer/ integrator circuit combination as claimed in claim 1 wherein the connectivity between the reference source and the passive or active components forming part of the summer or summer/ integrator is controlled by digital pulses representing an analogue signal as claimed in claim 2.
4. A reference source - analogue summer or summer/integrator circuit combination as claimed in claim 1 or claim 3 wherein the reference source and/or the passive and/or active components forming part of the analogue summer are programmable or variable by electrical or other means of control.
5. An analogue oversampled FIR filter structure substantially as described herein with reference to Figures 1-5 of the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9022533A GB2251524B (en) | 1990-10-17 | 1990-10-17 | Analogue oversampled finite impulse response filter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9022533A GB2251524B (en) | 1990-10-17 | 1990-10-17 | Analogue oversampled finite impulse response filter |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9022533D0 GB9022533D0 (en) | 1990-11-28 |
GB2251524A true GB2251524A (en) | 1992-07-08 |
GB2251524B GB2251524B (en) | 1994-11-02 |
Family
ID=10683856
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9022533A Expired - Fee Related GB2251524B (en) | 1990-10-17 | 1990-10-17 | Analogue oversampled finite impulse response filter |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2251524B (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1210181A (en) * | 1968-04-10 | 1970-10-28 | Rank Organisation Ltd | Improvements in or relating to electrical filter devices |
GB1373717A (en) * | 1971-01-27 | 1974-11-13 | Philips Electronic Associated | Arrangement for frequency transposition of analogue signals |
EP0015681A1 (en) * | 1979-03-02 | 1980-09-17 | Fujitsu Limited | Binary transversal filter |
-
1990
- 1990-10-17 GB GB9022533A patent/GB2251524B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1210181A (en) * | 1968-04-10 | 1970-10-28 | Rank Organisation Ltd | Improvements in or relating to electrical filter devices |
GB1373717A (en) * | 1971-01-27 | 1974-11-13 | Philips Electronic Associated | Arrangement for frequency transposition of analogue signals |
EP0015681A1 (en) * | 1979-03-02 | 1980-09-17 | Fujitsu Limited | Binary transversal filter |
Also Published As
Publication number | Publication date |
---|---|
GB2251524B (en) | 1994-11-02 |
GB9022533D0 (en) | 1990-11-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP0454407B1 (en) | Multi-stage sigma-delta analog-to-digital converter | |
US4588979A (en) | Analog-to-digital converter | |
Brodersen et al. | MOS switched-capacitor filters | |
US4835482A (en) | Semiconductor integrated circuit forming a switched capacitor filter | |
Gregorian et al. | Switched-capacitor circuit design | |
US6288669B1 (en) | Switched capacitor programmable gain and attenuation amplifier circuit | |
CA2042213A1 (en) | Double rate oversampled interpolative modulators for analog-to-digital conversion | |
US6140950A (en) | Delta-sigma modulator with improved full-scale accuracy | |
KR20030074310A (en) | Continuous-time integrating filter with minimum phase variation, and bandpass sigma-delta modulator using such a filter | |
US5140325A (en) | Sigma-delta analog-to-digital converters based on switched-capacitor differentiators and delays | |
US5177484A (en) | Switched capacitor oversampling analog/digital converter with noise filtering | |
Burmas et al. | A second-order double-sampled delta-sigma modulator using additive-error switching | |
EP1417765B1 (en) | Multiplexed analog to digital converter | |
US6340945B1 (en) | Analog/digital converter | |
TWI387204B (en) | Charge domain filter and methods of determining transfer function | |
JP4454498B2 (en) | Switched capacitor systems, methods and uses | |
WO1981001779A1 (en) | Switched-capacitor elliptic filter | |
GB2251524A (en) | Analogue oversampled finite impulse response filter | |
JP2003234638A (en) | MULTI-INPUT INTEGRATION CIRCUIT AND MULTI-INPUT DeltaSigmaMODULATION CIRCUIT | |
Nadeem et al. | 16-channel oversampled analog-to-digital converter | |
GB2175765A (en) | Symmetric switched capacitor fir filter | |
JPH06209266A (en) | Multiplex transmission sigma- delta a/d converter | |
Srivastava et al. | A programmable oversampling sigma-delta analog-to-digital converter | |
Iwakura | Realization of tapped delay lines using switched-capacitor LDI ladders and application to FIR filter design | |
Qiuting et al. | Oversampled analog FIR filters |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19981017 |