GB2242985A - Calibrator - Google Patents

Abstract

A calibrator (1) for calibrating test equipment (2) includes a radio receiver (5) which receives (4) a radio frequency signal of known fixed frequency e.g. 198 kHz. A circuit (6, 7, 8, 10, 11) derives a plurality of reference frequency signals from the received radio signal and the calibrator is responsive to control data to output (9) a required reference signal for measurement by test equipment (2) under calibration. As shown the calibrator (1) is controlled by a microcomputer (3). <IMAGE>

Description

CALIBRATOR The present invention relates to a calibrator for the calibration of test equipment such as oscilloscopes and test meters.

The maintenance of electronic systems requires the use of various forms of test equipment. This test equipment must be maintained in a calibrated state if any meaningful measurements are to be made. Moreover the calibration standard must be maintained uniformly across a system without local variations. In order to achieve this the calibrator must itself be calibrated with reference to a more accurate source. That more accurate source will in turn need calibration and so on, reaching back until one reaches the original source which will generally be a standard established by an international authority such as the ISO. It is desirable that all calibration paths should be traceable in case faults or errors in accuracy occur, thus allowing rapid identification of all affected items.

When, for example, maintaining test equipment for use in the telephone network it has been the practice to maintain accurate calibration sources at one or two sites and to return all test equipment to those sites for calibration with a frequency typically ranging from once every six months to once every two years, with the equipment being away from site typically 1. 5 to 6 weeks. During the time that the equipment is away for calibration either the work for which the equipment is used is held up or duplicate test equipment is required, with consequent disadvantages in terms of cost and efficiency of operation. These problems might be overcome by using calibrators which are taken to the sites where the test equipment is in use. Then however another layer is effectively introduced in the calibration paths, with the turn requiring calibration.It is in general desirable to keep the calibration paths as short as possible.

According to the present invention there is provided a calibrator for calibrating test equipment, including a radio receiver arranged to receive a radio frequency signal having a known fixed frequency, means to derive from the received radio frequency signal a plurality of reference signals each at a respective frequency having a predetermined relationship to the known fixed frequency, and means responsive, in use, to data identifying a said reference signal and received from an associated calibration control processor to output the said reference signal for measurement by the test equipment under calibration.

The different reference signals may be provided at a number of different respective output terminals, but preferably are output sequentially at a single terminal.

Preferably the means to derive a reference signal comprise a reference voltage source and a reference current source.

In use the calibrator is controlled by an associated processor which, in the preferred embodiment discussed below, is a general purpose microcomputer. Then if a suitable digital output is available from the test equipment the reference process can be made entirely automatic with the control processor comparing the data from the calibrator and from the test equipment for the different calibration signals. Alternatively, for equipment such as oscilloscopes which require a visual determination to be made by the user, the calibration process can be made at least semi-automatic. In these circumstances the user will typically make a reading and then enter that reading via the computer keyboard.

A further advantage of such a process is that the computer can be used to prompt the user to follow a certain sequence of tests. In such a system a number of features may be used to prevent the introduction of systematic errors by the user. The quality of the test results are improved by requiring the operator to enter readings into the PC without knowing what the "correct" value is, as opposed to the computer indicating the expected result and asking for confirmation by the operator.

When tests are performed repeatedly in a set order then "patterning" of the user tends to occur, with the user tending to introduce systematic variations in the readings according to their position in the test series. Preferably therefore the control processor is arranged to vary the sequence in which the different reference signals are used. The control processor may be arranged to introduce occasionally a test not normally included for the equipment under calibration.

It may also occasionally challenge a "correct" value input by the user, requiring the user to repeat a test or tests. This avoids the user gaining immediate feedback as to whether the reading is correct. This avoids any tendency for the user unconsciously to correct for perceived errors in the test equipment.

A calibrator and a calibration system including such a calibrator will now be described in detail with reference to the accompanying drawings in which: Figure 1 is a system block diagram for a calibrator; Figure 2 is an expanded block diagram for the receiver of Figure 1; Figure 3 is an expanded block diagram of the sine generator; Figure 4 is an expanded block diagram of the reference voltage generator; Figure 5 is a voltage temperature curve for the reference voltage generator; Figure 6 is an expanded block diagram for the mode switch; Figure 7 is an expanded block diagram of the output switch assembly; Figure 8 is an expanded block diagram of the voltage and current output buffers; Figure 9 is circuit diagram for the Ohms circuit; Figure 10 is an expanded block diagram for the auto-zero circuit; Figure 11 is a circuit diagram for components of the system of Figure 1;; Figure 12 is a block diagram of a calibration system; and Figure 13 is a diagram showing a jitter stripper.

As shown in Figure 12, a calibration system includes a local calibrator 1 which in use is connected to the test equipment 2 under calibration.

The local calibrator 1 also is in two-way data communication with a control processor 3 which in the present example is a conventional microcomputer connected to the local calibrator 1 via an RS232 serial port. The local calibrator 1 is portable so that it can be taken to the site where the test equipment 2 is in use.

In use, the local calibrator 1 detects a broadcast radio frequency signal of a known calibrated frequency, such as the 198 kHz signal transmitted by the Droitwich transmitter. The local calibrator 1 then generates from the radio frequency signal appropriate reference signals which are.output via the analogue output to the test equipment 2. The reading made for a given reference signal using the test equipment 2 is entered in the control processor 3 and compared with the expected value.

The local calibrator is shown in further detail in Figure 1. The broadcast signal is received by a ferrite rod aerial 4 and detected by a 1. 32 MHz phase locked receiver 5. An output from the receiver 5 at 660 kHz is applied to frequency division circuits 6 which generate both analogue and digital outputs having frequencies locked to the input frequency. The analogue output from the frequency division circuits 6 are used in combination with signals from a reference voltage source 7, and Ohms circuit 8 which in combination with the reference voltage provides a reference current, to generate reference signals which are output via an output stage 9. A mode switch 10 is connected to the voltage reference source 7 and the frequency division circuits 6 and provides an output via a variable attenuator 11 and the output stage 9.

The variable attenuator 11 is used to set the output level required for a particular reference signal. The mode switch 10 is used to select different signal types such as positive or negative-going square waves and sine waves of different respective phases.

In order further to improve the accuracy of the frequency reference obtained from the broadcast signal the local calibrator 1 may include a jitter stripper 12 interposed between the receiver 5 and the frequency division circuits 6. Phase remodulation by either delay comparison or reference comparison is used to eliminate jitter present in the off-air signal. As shown in Figure 13 the 660 kHz output from the receiver 5 is fed to a modulator 13. The output from the modulator 13 is branched to a Hi-Q oscillator which provides a substantially jitter-free reference signal which is compared with the direct output of the modulator 13 in a comparator 14. The comparator 14 generates an error signal which is fed back to the oscillator 13, thereby providing a control loop which enables regenerative jitter reduction.

As noted above, in use the operation of the local calibrator 1 is controlled by a microcomputer 3. In the present embodiment the physical channel used for communication between the computer 3 and the calibrator 1 is a conventional RS232 serial interface.

In software terms the interface between the computer 3 and the calibrator 1 is divided into sixty different channels. The assignment of software channels is defined in editable control files maintained separately from the main calibration program provided in the computer 3. This allows for a greater degree of flexibility and ease in modifying this part of the software core.

In normal operation data is communicated continuously between the computer and the calibrator.

In the preferred embodiment however the computer and calibrator are also arranged so that they can be set in a "quiet" mode to enable quiet DC testing unhampered by digital noise.

The control program for the computer 3 controls the calibrator 1, causing it to output a certain sequence of different reference signals having different frequencies, amplitudes, waveforms etc. At the same time the program prompts the user via a display on the computer monitor to carry out the readings on the test equipment appropriate to each reference signal. The user enters the different readings via the keyboard of the computer and these are then compared with the expected values. Where a discrepancy occurs the computer may simply alert the user to the discrepancy or, in a fully-automated system, may output a control signal to the test equipment 2 in order to correct the detected error. During a calibration run random querying of the results is incorporated to keep the user alert.This may involve misrepresenting calibration results to the user in order to avoid the user tending to correct unconsciously the readings being made, thereby introducing a systematic error which may be mistaken for a calibration error. The true calibration results are stored and may then be inspected at the end of a calibration run. Readings obtained from the equipment being calibrated are entered into the computer without prompting from the computer as to the expected value. The computer may initiate a "time to calibrate" event as a result of keeping track of the due date for calibration for a given item by means of its internal real time clock.

The computer can also carry out hardware checking of the calibrator itself, looking for faults, errors or misuse. Safety interlocking and the use of front panel indicators on the calibrator to direct the operator to the correct test sockets is provided to protect the operator and the system from each other. A pressto-test facility is also included.

Traceability is an important part of the calibration procedure. Preferably therefore each item of test equipment to be calibrated is provided with a unique identification code which is input to the computer at the start of the calibration process. The calibrator may also be provided with an identification code. By storing these codes and the results of the calibration run together with such data as the date of the calibration the computer can maintain a complete record of all calibration procedures. The computer may be provided with a list of the codes identifying equipment which it is able to test and so is able to warn the user at the start of a calibration run if it is unable to calibrate the particular item of equipment concerned.

The hardware shown in the accompanying circuit diagrams will now be described in detail. The specification for the calibrator is as follows: DC Volts + 50 mV to + 150 V RMS AC Volts 50 mV to 150 V &commat; @ 50Hz 50 mV to 10V up to 20 kHz DC Current t 5 mA to + 1 A AC Current 5 mA to 1A &commat; e 50 50 Hz 5 mA to 100 mA up to 20 kHz Resistance 1 Ohm to 10 MOhm Frequency square wave, uncontrolled amplitude 10 Hz to 10 MHz in decade steps Frequency square wave, controlled amplitude 10 Hz to 1 MHz The frequency source to be "off air" locked to Droitwich standard.

The voltage reference to be 3 x 10 volt reference ICs.

The current reference to be the voltage reference and precision resistors.

The resistance reference to be precision resistors.

The accuracy for Resistance, Current, Voltage, to be + 0. 1%, and for frequency 1 part in 108 or better.

Hardware (Figure 1) The frequency standard was derived "off-air" from radio Droitwich which has a frequency of 198 kHz maintained to an accuracy of t 1 part in 1012.

The voltage standard was derived from three 10 volt reference integrated circuits (parallel connected).

The current standard was derived from the voltage standard by the means of precision resistors.

The resistance standard uses precision resistors for high values and an electronic resistor assembly for the low ohmic values in order to overcome the effects of terminal/wiring resistance.

The square wave and sine wave sources were both derived from the frequency and voltage standards.

(Figures 2, 11 (RF,IF)) The "off-air" signal from Droitwich is received at 198 kHz by means of a ferrite rod aerial. This is amplified by a tuned field effect transistor (FET) amplifier, and buffered to low impedance by another FET to match the narrow band crystal filter. This filter removes the modulation sidebands from the signal. The bandwidth (BW) was measured as approximately 30 Hz at the -6 dB points.

Two further 198 kHz tuned FET amplifiers precede the mixer. These amplifiers have automatic gain control (AGC) applied to them to prevent any limiting taking place.

In the mixer the local oscillator signal (132 kHz) is mixed with the 198 kHz to produce a product of 330 kHz. This is then amplified firstly by a tuned 330 kHz, amplifier having AGC and then an untuned amplifier. The signal then splits into two paths, one to feed a detector and amplifier for the AGC, and the other to the 1. 32 MHz synthesiser.

The AGC level is monitored by the computer in order to ensure that low signal strength is alerted to the operator to prevent uncertainty of measurement.

1. 32 MHz Svnthesiser The 330 kHz signal is squared and fed to a digital comparator, the second 330 kHz input to this comparator is derived from the 1. 32 MHz oscillator divided by four. The error signal from the comparator is used to phase lock the 1. 32 MHz oscillator.

The 132 kHz local oscillator signal for the RF/IF mixer is obtained by dividing the 1. 32 MHz by 10.

This gives a simple relationship between the local oscillator (LO) and IF of 1:2.5. The "kickstart" circuit scans the 1. 32 MHz oscillator frequency, when the system is switched on, to allow the LO/IF loop to come on frequency.

The control status is monitored by lamps and the computer, the "fail" status is hardwired to the 1 MHz oscillator circuit to produce a cascade shut down on failure. The computer can shut down the 1. 32 MHz oscillator and hence the following oscillators to reduce the internal system noise for extremely quiet DC testing purposes. Similarly, computer to calibrator "chatter" can also be suspended for quiet measurements. However, loss of monitoring then ensues.

1 MHz Svnthesiser A 660 kHz signal derived from the 1. 32 MHz oscillator divided by two is further divided by sixty-six to produce a 10 kHz signal. This is compared with a 10 kHz signal divided down from the 1 MHz oscillator. This oscillator is phase locked by means of the error signal from the comparator. The 1 MHz signal is fed, via a buffer, to the front panel of the calibrator as a standard 1 MHz source, for use as an external standard for frequency counters to improve their accuracy.

The 1 MHz is divided down in decades to 10 Hz, all decades are available via a computer controlled switch, directly through buffers to the front panel, or via divide by two and buffers to the front panel, and to the sine oscillator.

The status is monitored in a similar way to the 1.32 MHz unit, the "fail" output being cascaded to the sine oscillator.

(Figure 3) The decade output from the 1 MHz unit is fed into the sine assembly where it first passes through a divide by "n" (n = 1 to 15) divider, the output of which splits into 3 paths.

(1) To the Mode switch 10 (2) Via a buffer to the front panel (3) To a sine comparator The sine comparator is used to compare the divide by "n" signal with a square wave reference signal from the sine wave oscillator and hence phase lock this oscillator. Control and monitoring is done by the computer and lamps.

The sine wave output is passed to an automatic level control device as follows. The sine wave signal passes through an electronically controlled attenuator and on to the Mode switch 10. The sine wave also passes via an equaliser to a true r.m.s. to DC converter IC. The resulting DC is passed via a summing network to a comparator where it is compared with the 10 volt DC reference. The resulting error signal is passed through a switch to an integrator and thence to the control input of the aforementioned attenuator. Rate information is derived from the control signal and forms the second input to the summing network.The settling time for the control loop is long, and the switches etc. are to allow the computer to force the loop conditions in order to shorten the settling time in order to speed up the measuring procedures and also to hold up the loop conditions during range switching to prevent excessive disturbance to the control loop levels. The computer also monitors various points.

(Figure 4) The + 10 volt reference is derived from three parallel-connected 10 volt reference ICs as shown. The 10 volt output is buffered by a high input impedance buffer. These reference ICs are supplied from an independent, monitored supply. This independence is necessary to prevent supply current flowing in the analogue zero volt connection. Such current is undesirable because it would introduce a variable and unknown error voltage into the 10 volt reference. Great care was taken in the layout of the analogue zero volt rail to separate it from the power zero volt rail for the above reason.

Figure 5 shows the voltage/temperature curve for this module.

(Figure 6) The mode switch 10 consists of two high input impedance amplifiers and four FET optical switches. The incoming signal is used to generate a three bit address for the control PROM. This PROM is a 256 x 4 bit device. The first 128 addresses are used actively, addresses above 7F are set to decimal 9 which is zero out of the mode switch. The above configuration gives 16 x 8 bit frames. Frame selection is done by the computer, the scanned 8 bits allows complex patterns to be built up if required for purposes other than pure calibration use. The switch table in Figure 6 shows the simple functions that may be generated.

(Figure 7) The output switch provides for the selection of which of the four output paths are to be used. It also controls the protective interlocks and indicator lamps associated with each channel.

The DIR (direct) channel is also used for ohmic measurements. The DIR facility is provided as an unbuffered voltage output.

(Figure 8) The voltage buffers each consist of a voltage amplifier followed by a current output stage.

The load applied to the buffer is monitored to provide two stages of sensing. Stage 1 occurs at 105% of the rated output, at this level the output must still be within specification. Stage 2 is the overload point where the output specification will. not be met.

Four-terminal connections are used to overcome the effect of contact/terminal resistance.

The current buffer is a standard form of voltage to current converter. The power stages are monitored for load conditions as above. All monitored conditions are fed to the computer.

(Figure 9) The operation of the resistance circuit is as follows. For low values of resistance an electronic four-terminal resistor is used to overcome the effect of terminal resistance and wiring resistance. On higher values of resistance simple resistors will suffice to obtain the required accuracy.

(Figure 10) The auto-zero circuit is designed automatically to keep the calibrator zero output as close to true zero as possible. One of four sampler heads compares the zero reference with the voltage on the signal wire. Any difference will result in a square wave output, the phase of which is compared with a reference phase to determine the polarity of the error. A digital filter is employed to reduce noise errors. This filter basically counts 16 sample pulses and a count of more than 12 would be taken to be a logical 1. A count of less than 5 would be taken as a logical 0. Counts between these figures would be classed as indeterminate. The 1 or 0 will determine the direction of the up/down counter. The output of this counter is translated into a voltage by means of a digital/analogue converter and used to set the offset of the attenuator amplifier (Figure 6). Once zeroing is complete the counter would be held and the required measurements taken. Zeroing would be done often, e. g. between every measurement.

Claims (8)

1. A calibrator for calibrating test equipment, including a radio receiver arranged to receive a radio frequency signal having a known fixed frequency, means to derive from the received radio frequency signal a plurality of reference signals each at a respective frequency having a predetermined relationship to the known fixed frequency, and means responsive, in use, to data identifying a said reference signal and received from an associated calibration control processor to output the said reference signal for measurement by the test equipment under calibration.

2. A calibrator according to claim 1, in which the means to derive a reference signal comprise a reference voltage source and a reference current source.

3. A calibration system comprising a microcomputer and a calibrator connected to the microcomputer to communicate data with the microcomputer, the calibrator including a radio receiver arranged to receive a radio frequency signal having a known fixed frequency, means to derive from the radio frequency signal a plurality of reference signals each having a respective predetermined relationship to the known fixed frequency, the microcomputer being arranged to send to the calibrator data identifying a said reference signal to be outputted by the calibrator, and the calibrator including means responsive to receipt of said data for outputting the said reference signal for measurement by test equipment under calibration.

4. A calibration system according to claim 3, in which the microcomputer is arranged to control the calibrator to output a number of different reference signals in a sequence determined by the microcomputer, and at the same time to prompt the user to make a corresponding sequence of measurements.

5. A calibration system as claimed in claim 3 or claim 4, and for use in calibrating controllable test equipment, in which system the microcomputer is arranged to provide, in use, a control signal for the test equipment in response to a difference between an expected value of the reading on the test equipment and the actual value inputted to the microcomputer and thereby correct the reading of the test equipment.

6. A calibrator or calibration system according to any one of the preceding claims, in which the calibrator is portable.

7. A calibrator substantially as described with respect to the accompanying drawings.

8. A calibration system substantially as described with respect to the accompanying drawings.