GB2239752A - Radio frequency mixer circuit - Google Patents
Radio frequency mixer circuit Download PDFInfo
- Publication number
- GB2239752A GB2239752A GB9000215A GB9000215A GB2239752A GB 2239752 A GB2239752 A GB 2239752A GB 9000215 A GB9000215 A GB 9000215A GB 9000215 A GB9000215 A GB 9000215A GB 2239752 A GB2239752 A GB 2239752A
- Authority
- GB
- United Kingdom
- Prior art keywords
- signal
- mixer
- amplifier
- transistor
- control means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/12—Transference of modulation from one carrier to another, e.g. frequency-changing by means of semiconductor devices having more than two electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Superheterodyne Receivers (AREA)
- Amplifiers (AREA)
Abstract
A mixer circuit for mixing two radio frequency signals wherein a first signal is fed to an amplifier for amplification, and a second signal is used simultaneously to control the gain or transconductance of the amplifier. The amplifier may be a transistor Q1 in common emitter configuration. Control may be effected by a second transistor Q2. The signals to be mixed may be a received radio signal and that of a local oscillator. <IMAGE>
Description
AN IMPROVED MIXER CIRCUIT
This invention concerns mixer circuits, particularly Radio Frequency (R.F.) mixer circuits. Conventional R.F. mixers generally use a "tree" or "Gilbert cell" configuration. Such configurations have inherently poor noise performance; a noise figure of > 10dB being typical. Such circuits usually have low gain and high power consumption.
It is an object of the present invention to provide an improved mixer circuit wherein the aforesaid disadvantage are overcome.
413 In our recently filed copending applicationl (our reference
F20670) entitled "Improvements in or relating to amplifiers" by the same inventor, there is described an amplifier having a controllable gain which is capable of responding very quickly to control signals.
According to the present invention, an R.F. mixer comprises an amplifier having an input whereto a first signal to be mixed may be applied and an output, there being control means for controlling the gain of the amplifier, and a second input to the control means for inputting a second signal to be mixed with the first signal, the second input controlling the operation of the control means and thereby the gain of the amplifier. The control means advantageously comprises an active load of the amplifier.
In a preferred embodiment, the amplifier comprises a first transistor in common emitter configuration to the base of which is input a first signal to be mixed. A collector of the first transistor includes in its collector circuit an active load controlling the gain of the first transistor. The active load comprises a second transistor to the base of which a second signal to be mixed with the first signal is applied.
The second transistor may have a mixer enable input comprising a diode connected transistor for switching the second transistor between its operating range and off.
The output of the amplifier, taken from the collector of the first transistor, is advantageously buffered from a next stage by a fourth transistor.
The invention will be described further, by way of example, with reference to the accompanying drawing in which the single figure (Figure 1) is a diagrammatic representation of a Radio
Frequency (R.F.) mixer in accordance with the present invention.
As shown in Figure 1, an R.F. mixer circuit comprises a first, amplifier, transistor Q1- The transistor Q1 is connected in common emitter configuration having an input to its base 10, its emitter 12 connected to ground 18, and an output from its collector 14.
The collector 14 is connected to a supply rail 16 via a load resistor R2 and a second control transistor Q2. The control transistor
Q2 provides an active load for the first transistor Q i. A biasing resistor R1 is provided between the collector 14 and base 10 of the transistor Q1- Such an amplifier is described in our aforesaid copending patent application.
The output from the collector 14 of the transistor Q1 is buffered through a buffering fourth transistor Q4 to a next stage (not shown).
The fourth emitter follower transistor Q4 is connected between the supply rail 16 and ground 18 through an emitter resistor R4.
The active load of the transistor Ql comprises the load resistor
R2 in the collector/emitter path of the second transistor Q2. Control of the active load so formed in effected by applying, to the base 20 of the second transistor Q2, an enable signal via a base resistor R3 from a diode connected third transistor Q3 itself having a base resistor Rs.
The signal input to base 22 of the transistor Q3 e.g. connection to the positive rail 18, serves to switch on the transistor Q3 and switch the transistor Q2 to the centre of its operating range.
A second signal to be mixed, for example, the output of a local oscillator (not shown) is applied to the base 20 of the transistor Q2 and causes variations in the current passed thereby i.e. in the load of the transistor Q1- The first signal, input to the base 10 of transistor Q1 has its amplification (transconductance) varied due to the variation of the load of the transistor Q1. The buffered output from the transistor Q4 is thus the mixed signal comprising the sum and difference frequencies of the two input signals. If desired, the difference signal may be taken as an IF signal for further processing.
Computer simulations have been effected of the circuit shown in Figure 1. Referring to figure 1 for node numbers, it can be seen that the local oscillator signal input to the base 20 of the transistor Q2 is the dominant term in the mixer transfer equations. It is assumed that the node 7 is taken directly to the positive rail Vcc, and that the base currents of Q3 and Q2 are small. Then node 3 is substantially at a voltage of Vcc - 2.Vbe where Vbe is the forward base emitter voltage of Q2 or Q3.Since Q1 is self biassed through R1, and again the voltage drop across R1 is small, then the collector current of Q1 is:
Ic = (Vcc - 3.Vbe)/R-2 Or, referring this to the local oscillator input,
Ic = (Vlo -3.Vbe)/R2 The gain of Q1 is (Ic.RL)/(1/(kT/q)), where Ic is in Amps and
RL is the effective stage load resistance. The presence of the emitter follower Q4 ensures that the load is substantially equal to R2.
Therefore, at node 2:
V(2) = Vinput.(0.038).(Vlo - 3Vbe) (l/(kT/q) = 0.038 at 300K)
Under normal small signal conditions, Vbe 300K can be assumed to be constant, hence
V'(2) = (0.038.V'input.V'lo) where the prime quantities are ac components.
The output to node 2 is therefore a multiplication of the input and local oscillator voltages. Node 6 replicates this voltage with only a small error due to finite the output impedance of Q4. This analysis is valid for small signal conditions, i.e. where the input is insufficient to cause switching of the stage ( < 100mV p-p). In the case where, say, two inputs are present, one of which is an unwanted signal at high level, intermodulation can occur. However, the circuit of Q1, with feedback from the collector, is linear up to approximately -3dBm with the values indicated. This represents the upper limit of signals which could be applied at the input. The other assumptions made in the derivation, are that the load on Q1 is equal to R2, and that Vbe is constant.The former of these is dependant on the exact parameters of Q2 and Q4, but is likely to be substantially correct. A slightly better validation of this would be to connect a decoupling capacitor from node 3 to ground, but this will not normally be necessary. The assumption of constant Vbe is valid at constant temperature for a wide range of current; an error of only 60mV per decade is incurred so with likely changes of about 10% in current, extra intermodulation terms are small. Vbe is of course temperature sensitive, as is the stage gain via the (kT/q) parameter characterised as 0.038 above. However, temperature variation of gain over the whole receiver circuit can be taken out by suitable AGC circuitry.
Conversion gain of the mixer, which strongly influences intermodulation, is determined by the supply voltage Vcc or the voltage at node 7 if this is less than Vcc. It is not substantially affected by R2, since this also sets the current and hence the transconductance of Q1- If intermodulation becomes a problem, there are two courses of action open. First, the gain can be reduced by including a load resistor from node 2 to ground, probably via a coupling capacitor. This loses gain after the gain stage and therefore has only a secondary effect on noise figure. This mixer will have very good noise performance, so it is possible, by sacrificing this to some extent, to much improve the signal handling performance by attenuating the signal prior to the mixer in the conventional way. An alternative to this is to omit the conventional R.F. amplifier; the degradation in noise figure will often be acceptable, while the signal handling of the system will improve by three times the gain (in dB) of the omitted stage.
From the simulations, the expected characteristics are:
Conversion gain 20dB
Noise Figure < 6dB*
Bandwidth > 1.5GHz
Power Consumption < lOmW Third order intercept > -7dBm* *Estimated from amplifier figures.
It will be appreciated that the exemplified mixer design will provide:1) Minimum noise configuration 2) Linear multiplication 3) Low Power 4) Ability to be turned off for standby operation
The invention has been described in detail with particular reference to one embodiment but it will be appreciated that variations are possible. For example, the resistor values shown are by way of example only and other values could be used. The transistors Q3 and Q4 are ancillary to the invention and other switching and buffering arrangements are possible.
Claims (6)
1. A radio frequency mixer comprising an amplifier having an input whereto a first signal to be mixed may be applied and an output, control means for controlling the gain of the amplifier, and a second input to the control means whereto a second signal to be mixed with the first signal may be applied, the second signal causing the control means to vary the gain of the amplifier.
2. A mixer as claimed in claim 1 wherein the control means comprises an active load of the amplifier.
3. A mixer as claimed in claim 1 or 2 wherein the amplifier comprises a first transistor in common emitter configuration to the base of which is input the first signal to be mixed.
4. A mixer as claimed in claim 3 wherein a collector of the transistor has the control means in its circuit.
5. A mixer is claimed in claim 4 wherein the control means comprises a second transistor to the base of which the second signal to be mixed is applied.
6. A mixer as claimed in any preceding claim having enabling means for enabling the control means.
6. A mixer as claimed in any proceeding claim having enabling means for enabling the control means.
7. A mixer as claimed in claims 5 and 6 wherein the enabling means comprises a diode connected transistor connected to the base of the second transistor for switching the same between off and its operating range.
8. A mixer as claimed in any preceding claim wherein the mixed signal output of the amplifier is buffered by a transistor from a next stage.
9. A mixer as claimed in claim 8 wherein the buffering transistor is an emitter follower.
10. A radio frequency mixer substantially as hereinbefore described with reference to and as illustrated in the accompanying drawing.
11. A method of mixing two signals of radio frequency comprising the steps of amplifying a first of the signals in an amplifier and simultaneously varying the transconductance of the amplifier in accordance with the second signal to be mixed.
Amendments to the claims have been filed as follows
CLAIMS 1. A radio frequency mixer comprising a bipolar amplifier having an input whereto a first signal to be mixed may be applied and an output, bipolar control means for controlling the gain of the amplifier, and a second input to the control means whereto a second signal to be mixed with the first signal may be applied, the second signal causing the bipolar control means to vary the gain of the amplifier.
2. A mixer as claimed in claim 1 wherein the bipolar control means comprises an active load of the amplifier.
3. A mixer as claimed in claim 1 or 2 wherein the amplifier comprises a first bipolar transistor in commom emitter configuration to the base of which is input the first signal to be mixed.
4. A mixer as claimed in claim 3 wherein a collector of the transistor has the bipolar control means in its circuit.
5. A mixer as claimed in claim 4 wherein the bipolar control means comprises a second bipolar transistor to the base of which the second signal to be mixed is applied.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9000215A GB2239752B (en) | 1990-01-05 | 1990-01-05 | An improved mixer circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9000215A GB2239752B (en) | 1990-01-05 | 1990-01-05 | An improved mixer circuit |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9000215D0 GB9000215D0 (en) | 1990-03-07 |
GB2239752A true GB2239752A (en) | 1991-07-10 |
GB2239752B GB2239752B (en) | 1993-10-06 |
Family
ID=10668868
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9000215A Expired - Fee Related GB2239752B (en) | 1990-01-05 | 1990-01-05 | An improved mixer circuit |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2239752B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5933771A (en) * | 1997-06-20 | 1999-08-03 | Nortel Networks Corporation | Low voltage gain controlled mixer |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB954947A (en) * | 1961-04-12 | 1964-04-08 | Fairchild Camera Instr Co | Surface-potential controlled semiconductor device |
GB1152278A (en) * | 1967-04-13 | 1969-05-14 | Marconi Co Ltd | Improvements in or relating to Mixers and Frequency Changers |
US3539947A (en) * | 1968-05-10 | 1970-11-10 | Western Electric Co | Method of operating a single stage as a linear amplitude modulator |
EP0087336A1 (en) * | 1982-02-12 | 1983-08-31 | Thomson-Csf | Transistor mixer for microwave frequency transmitters |
EP0223287A1 (en) * | 1985-11-05 | 1987-05-27 | Laboratoires D'electronique Philips | Semiconductor device for use as a mixer |
-
1990
- 1990-01-05 GB GB9000215A patent/GB2239752B/en not_active Expired - Fee Related
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB954947A (en) * | 1961-04-12 | 1964-04-08 | Fairchild Camera Instr Co | Surface-potential controlled semiconductor device |
GB1152278A (en) * | 1967-04-13 | 1969-05-14 | Marconi Co Ltd | Improvements in or relating to Mixers and Frequency Changers |
US3539947A (en) * | 1968-05-10 | 1970-11-10 | Western Electric Co | Method of operating a single stage as a linear amplitude modulator |
EP0087336A1 (en) * | 1982-02-12 | 1983-08-31 | Thomson-Csf | Transistor mixer for microwave frequency transmitters |
EP0223287A1 (en) * | 1985-11-05 | 1987-05-27 | Laboratoires D'electronique Philips | Semiconductor device for use as a mixer |
US4727597A (en) * | 1985-11-05 | 1988-02-23 | U.S. Philips Corporation | Mixer arrangement |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5933771A (en) * | 1997-06-20 | 1999-08-03 | Nortel Networks Corporation | Low voltage gain controlled mixer |
Also Published As
Publication number | Publication date |
---|---|
GB9000215D0 (en) | 1990-03-07 |
GB2239752B (en) | 1993-10-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5929710A (en) | Cascode single-ended to differential converter | |
JP3288723B2 (en) | Differential pair gain control stage | |
US5949286A (en) | Linear high frequency variable gain amplifier | |
US6744319B2 (en) | Exponential function generator embodied by using a CMOS process and variable gain amplifier employing the same | |
US7245890B2 (en) | High frequency variable gain amplification device, control device, high frequency variable gain frequency-conversion device, and communication device | |
JPH0718180Y2 (en) | Transistorized amplification and mixed input stage for radio frequency receiver | |
KR20050027993A (en) | Switchable gain amplifier | |
US6768379B2 (en) | Amplifier circuit | |
JP2002510888A (en) | Wide dynamic range variable gain amplifier | |
US6144254A (en) | Low-noise amplifier with switched gain and method | |
KR19990062583A (en) | Soft-Limiting Control Circuits for Variable Gain Amplifiers | |
US6650883B1 (en) | Mixer with adjustable linearity | |
JP2002076805A (en) | Agc amplifier circuit and receiver employing it | |
US6445251B1 (en) | Variable gain amplifier with high linearity and low noise | |
US5805988A (en) | System and method for switching an RF signal between mixers | |
EP0025977B1 (en) | Gain controlled amplifier | |
US6922556B2 (en) | System and method for establishing a bias current using a feedback loop | |
US6744308B1 (en) | System and method for establishing the input impedance of an amplifier in a stacked configuration | |
US6078219A (en) | Wide range single stage variable gain amplifier | |
US6710657B2 (en) | Gain control circuit with well-defined gain states | |
GB2239752A (en) | Radio frequency mixer circuit | |
US6278299B1 (en) | Voltage to current converter | |
US20010013811A1 (en) | Grounded emitter amplifier and a radio communication device using the same | |
KR20030086437A (en) | Signal processing stage and radio frequency tuner | |
JP2000059147A (en) | Mixer circuit |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
730A | Proceeding under section 30 patents act 1977 | ||
732 | Registration of transactions, instruments or events in the register (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 19940106 |