GB2234854A - Manufacture of electronic components of cadmium mercury telluride - Google Patents

Manufacture of electronic components of cadmium mercury telluride Download PDF

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GB2234854A
GB2234854A GB9018970A GB9018970A GB2234854A GB 2234854 A GB2234854 A GB 2234854A GB 9018970 A GB9018970 A GB 9018970A GB 9018970 A GB9018970 A GB 9018970A GB 2234854 A GB2234854 A GB 2234854A
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layer
type
heating treatment
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cadmium mercury
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Maurice Victor Blackman
Graham Joseph Crimes
Ian Kenworthy
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Philips Electronics UK Ltd
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Philips Electronic and Associated Industries Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8254—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using II-VI technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/38—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions
    • H01L21/383—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions using diffusion into or out of a solid from or into a gaseous phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/42—Bombardment with radiation
    • H01L21/423—Bombardment with radiation with high-energy radiation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264—Inorganic materials
    • H01L31/0296—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe
    • H01L31/02966—Inorganic materials including, apart from doping material or other impurities, only AIIBVI compounds, e.g. CdS, ZnS, HgCdTe including ternary compounds, e.g. HgCdTe
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • H01L31/1032—Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type the devices comprising active layers formed only by AIIBVI compounds, e.g. HgCdTe IR photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/11—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors
    • H01L31/1105—Devices sensitive to infrared, visible or ultraviolet radiation characterised by two potential barriers, e.g. bipolar phototransistors the device being a bipolar phototransistor
    • H—ELECTRICITY
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    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1828—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIBVI compounds, e.g. CdS, ZnS, CdTe
    • H01L31/1836—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof the active layers comprising only AIIBVI compounds, e.g. CdS, ZnS, CdTe comprising a growth substrate not being an AIIBVI compound

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Abstract

An electronic component such as an infrared photodiode D or bipolar transistor T of cadmium mercury tellurkie has an active region of p type conductivity formed from an n type portion of a layer 1 of cadmium mercury telluride by ion beam etching 50 using masks 51 and then heating in a mercury-deficient ambient to drive mercury out through the surface of the layer 1 until said n type portion is converted into p type material throughout its thickness. The layer 1 of cadmium mercury telluride is provided on a substrate 2 of different material, for example sapphire, so as to inhibit extraction and introduction of donors and acceptors between the layer 1 and the substrate 2 during the heating treatment. By controlling the heating treatment at a low temperature a low acceptor concentration (less than 10<16> cm<-3>) is provided in a reliable and reproduceable manner for the p type active region over a major part of the thickness of the layer 1 so providing a p type bulk region having a low acceptor concentration. The invention permits conversion to p type material after the cadmium mercury telluride has been patterned throughout its thickness by ion beam etching into a desired shape for an electronic component, even though an excess concentration of mercury results from the ion beam etching. <IMAGE>

Description

MANUFACTURE OF ELECTRONIC COMPONENTS This invention relates to methods of manufacturing electronic components of cadmium mercury telluride, and particularly but not exclusively bipolar transistors and infrared detector elements having a r n junction formed with a p type active region of the component. The invention relates also to such electronic components.
In this specification, unless otherwise specified, reference to cadmium mercury telluride having the characteristics of a certain conductivity type are to be understood as relating to those characteristics which are present at the operating temperature of the detector element, because such characteristics are temperature dependant in the sense that for material of a specific composition there exists a temperature at which inversion of conductivity type characteristics occurs. Thus, some material compositions used for forming the elements of infrared detectors for operation at a temperature of, for example, 77K will exhibit n type characteristics at room temperature and will exhibit p type characteristics at the temperature of operation.Furthermore for some material compositions in which the conductivity type characteristics of a particular region in the body result from an excess or a deficiency of one of the constituent elements (for example as mercury interstitials or mercury vacancies), it is possible that the presence of Ern junction characteristics may not be observable at one temperature, for example at room temperature, but such Ern junction characteristics can be observed and of course utilised at another temperature, namely the intended operating temperature. Additionally it is to be understood that reference to characteristics of a certain conductivity type at a specified temperature is to be interpreted broadly in the sense that these characteristics may prevail over a range of temperatures within which that specified temperature is present.
Infrared detector elements in general may be grouped in two broad classes, these being (1) detectors in which the operation is based on the intrinsic photoconductivity of the infrared sensitive material of the detector element, so-called photoconductive detectors, and (2) detectors the operation of which is based on the generation of a photovoltage by a photosensitive rn junction present in the infrared sensitive material of the detector element, so-called photo-voltaic detectors. Particular examples of class (1) detectors are given in published European patent applications EP-A-O 007 668 (our reference: PHB 32630) and EP-A-O 061 801 (our reference: PHB 32769).Particular examples of class (2) detectors are given in United Kingdom patent GB-A-1 600 599 (our reference: PHB 32578) and published European patent applications EP-A-O 062 367 (PHB 32766) and EP-A-O 061 803 (PHB 32767). The whole contents of these patents and published applications are hereby incorporated as reference material in the present specification.
The properties of the ternary compound cadmium mercury telluride Hg(1~x)CdxTe where x is between 0 and 1, as regards variation in infrared sensitivity and cut-off wavelength with material composition are now well established. By using material with a selected value of x between 0.15 and 0.45, detectors can be produced for operation in important infrared wavebands, especially in the 3 to Sum (micrometre) wavelength range and in the 8 to 14um wavelength range.
Various methods have been developed to produce high quality cadmium mercury telluride material of desired composition for the manufacture of detector elements. The preparation of the material involves a growth process and usually an annealing treatment involving a heating step. Examples of such treatments together with further experiments to understand the nature of the annealing are described in, for example, the article by M. Chu entitled: "Effects of annealing on H90,79Cd0,2iTe epilayers" in Journal Applied Physics 51(11), November 1980 pages 5876 to 5879, the article by A. J. Syllaios et al entitled: "Conductivity type conversion in (Hg,Cd)Te" in Journal Vacuum Science Technology 21(1), May/June 1982 pages 201 to 204, and the article by C. L.Jones et al entitled: "Effects of annealing on the electrical properties of CdxHgl,xTe" in Journal Applied Physics 53(12), December 1982 pages 9080 to 9092. The whole contents of these articles are hereby incorporated as a reference material in the present specification. The material is prepared so as to have at the detector operating temperature bulk characteristics of n type material or of p type material depending upon the particular application to be made of the material. The material prepared for class (1) detectors is generally n type, whereas class (1) detectors are usually formed from p type material.
After preparing the cadmium mercury telluride material with the desired bulk characteristics, detector-element fabrication steps are carried out on the material usually in the form of a layer (either a slice of bulk material, or an epitaxial layer).
These fabrication steps usually include removing part of the material to pattern the layer into a desired shape for each detector element before or/and after depositing metallization for electrodes for each detector element; depending on the type of detector, they may also include forming a Ern junction.
Cadmium mercury telluride is a difficult material to dope in a reproduceable and reliable manner either to form a n junction or to form a particular acceptor or donor concentration for a respective p type or n type active region of an infrared detector or other component. Instead of deliberately doping with electrically active impurities, it is very common practice to use native defect levels in the material to obtain either g type conductivity (normally as mercury vacancies) or n type conductivity (frequently as interstitial mercury). The previously mentioned GB-A-1 600 599 and EP-A-O 062 367 describe two processes for forming surface-adjacent n type active regions in p type cadmium mercury telluride material, apparently by in-diffusion of an excess concentration of mercury derived from either an anodised or ion-milled surface part of the material. The n type active region forms a grn junction with a remaining z type bulk part whose acceptor concentration is largely unaffected by the n type doping treatment.
In a modified form of the method described in GB-A-1 600 599, the n type doping treatment is performed locally at part of an n type surface layer which was previously formed in part of the p type body by in-diffusion of mercury. The acceptor concentration of the p type body is typically 2 x 1017 cam~3, measured at the detector operating temperature (77K), and the bulk of this body is retained as the p type active region of the component. The p type body with the n type surface layer and the localized anodic layer is subjected to a heating treatment at 1800C (degrees Celsius) for 1 hour in a mercury-deficient ambient.As a result the part of the surface layer covered by the anodic layer remains n-type by doping from the anodic layer, but the uncovered part of the surface layer is converted to p type conductivity throughout its thickness. This reconversion to p type material seems to result from the mercury concentration being driven out through the surface of the layer and being dispersed into the p type bulk of the body. The resulting acceptor concentration of both the p type bulk and the reconverted p type surface part typically exceeds 1017 cm~3. The methods disclosed in GB-A-1 600 599 relate to type conversion of surface regions but not bulk regions of cadmium mercury telluride, and furthermore are concerned with the formation of p-n junctions in the material.
The present invention permits the provision in a reliable and reproduceable manner of a low acceptor concentration (less than 1016 cm~3) for the p type active region of a cadmium mercury telluride electronic component, and furthermore permits such a low acceptor concentration to be obtained over a major part of its thickness so providing a p type bulk region having a low acceptor concentration. The invention also permits conversion to p type material after the cadmium mercury telluride has been patterned throughout its thickness by ion beam etching into a desired shape for an electronic component.
According to one aspect of the present invention, a method of manufacturing an electronic component comprising cadmium mercury telluride, the component having an active region of p type conductivity formed from an n type portion of a layer of cadmium mercury telluride by heating in a mercury-deficient ambient to drive mercury out through the surface of the layer until said n type portion is converted into g type material throughout its thickness, is characterised in that the layer of cadmium mercury telluride is provided on a substrate of different material so as to inhibit extraction and introduction of donors and acceptors between the layer and the substrate during the heating treatment, in that the n type portion extends through the thickness of the cadmium mercury telluride, and in that the heating treatment is performed at a sufficiently low temperature and for a sufficiently short time that the resulting acceptor concentration of the p type portion decreases with depth in the layer to be less than 1016 cm~3 over a major part of the thickness of the layer.
Thus, by using a method in accordance with the present invention a p type bulk region can be formed having a low acceptor concentration which is advantageous for different types of electronic component of cadmium mercury telluride, for example resulting in higher carrier lifetimes and longer diffusion lengths, especially for p-n junction infrared photodiodes and bipolar transistors having a p type base region. The invention is particularly suitable for use with thin components of cadmium mercury telluride, for example with the thickness of the layer being less than 15#m or preferably less than 10cm. The p type portion thus formed by the heating treatment may have a significantly higher acceptor concentration adjacent its surface.
Depending on the component being manufactured, this high-concentration surface part may be retained, or it may be converted into an n type active region of the component, or it may be removed after the heating treatment.
After the heating treatment the whole of the cadmium mercury telluride layer is preferably p type conductivity which may then be used as the starting material for further processing, although it is possible to retain part of the layer as n type material by masking. Thus, after the heating treatment, a part of the layer may be converted to n type to form a r n junction with an adjacent part of the low-concentration p type active region. The layer may be patterned into a desired shape for the electronic component either before or after the heating treatment.
A particularly attractive way of patterning the material is to use ion etching, for example as described in the published W. Germany patent application DE-A-2 708 792, and European patent applications EP-A-O 007 667, EP-A-O 007 668, EP-A-O 007 669, and EP-A-O 061 803. The whole contents of these patent applications are hereby incorporated as reference material into the present specification. However when p type cadmium mercury telluride is patterned in this way an excess concentration of mercury may be produced from the etched-away part of the p type layer and result in conductivity type conversion adjacent the etched surface. Even when ion-etching n type layers, the donor carrier concentration adjacent the etched surface may be increased to an undesirable extent.In accordance with the present invention, such a patterning treatment producing an excess concentration of mercury may be performed before the heating treatment which produces the low-concentration p type portion, and this heating treatment may also serve to drive away this excess mercury.
Thus, according to another aspect of the present invention there is provided a method of manufacturing electronic components of cadmium mercury telluride, comprising the steps of (a) providing a layer of cadmium mercury telluride on a substrate of different material, and (b) removing parts of the layer throughout its thickness by etching with an ion beam to pattern the layer into a desired shape for each component, the ion beam etching forming an excess concentration of mercury in at least a surface-adjacent portion of the patterned layer extending through the thickness of the patterned layer so that at least this surface-adjacent portion has n type conductivity throughout its thickness after the ion beam etching step, characterised by (c) heating the patterned layer in a mercury-deficient ambient after the ion beam etching step to drive out the excess mercury and so to convert said surface-adjacent portion from n type into g type material, the provision of the layer on the substrate of different material being such as to inhibit extraction and introduction of donors and acceptors between the layer and the substrate during the heating treatment.
According to a further aspect of the present invention there is provided an electronic component having an active region of p type conductivity, the active region being a portion of a layer of cadmium mercury telluride on a substrate of different material, which g type active region extends to the interface of the layer with the substrate, which component is characterised in that the p type conductivity of the active region is determined at least principally by mercury vacancies the concentration of which decreases with depth in the layer so to be less than 1016 cm~3 over a major part of the thickness of the layer.
These and other features in accordance with the invention are illustrated specifically in embodiments of the invention now to be described, by way of example, with reference to the accompanying drawings. In these drawings: Figure 1 is a cross-sectional view of an n type layer of cadmium mercury telluride on a substrate of different material in a method in accordance with the present invention; Figure 2 is a cross-sectional view of the layer on the substrate of Figure 1 after a heating treatment in a subsequent stage in the manufacture of an electronic component in accordance with the invention; Figure 3 is a graph showing a relationship between the resulting acceptor concentration C(p) at 77#K and the layer temperature T during the heating treatment;; Figure 4 is a graph illustrating the variation of the resulting acceptor concentration C(p) at 77 K with depth d in the layer; Figure 5 is a cross-sectional view of the substrate of Figure 3 after further processing to form electronic components from parts of the layer; Figure 6 is a cross-sectional view of an epitaxial layer of cadmium mercury telluride which may be used as a starting material for a method in accordance with the invention; Figure 7 is a cross-sectional view of a patterned layer of cadmium mercury telluride on a substrate of different material at a stage prior to a heating treatment in a method in accordance with the invention;; Figure 8 is a cross-sectional view of the patterned layer of Figure 7 after the heating treatment, and Figure 9 is a cross-sectional view of another layer of cadmium mercury telluride on a substrate of different material after a heating treatment in a method in accordance with the invention.
It should be noted that Figures 1 and 2 and 5 to 9 are diagrammatic and not drawn to scale. The relative dimensions and proportions of parts of these Figures have been shown exaggerated or diminished for the sake of convenience and clarity in the drawings. The same reference signs as used in one embodiment are generally used when referring to corresponding or similar parts in the other embodiments.
Figure 1 illustrates an example of a stage in the manufacture of electronic components by a method in accordance with the present invention. In this method a layer 1 of cadmium mercury telluride is provided on a substrate 2 of different material. As illustrated in Figure 1, one or more layers 3 may be present at the interface of the substrate 2 with the cadmium mercury telluride layer 1. In one particular form, which is commonly used for the manufacture of infrared detector elements and which was used as an experimental vehicle for deriving the results of Figures 3 and 4, the substrate 2 is of sapphire and a crystalline layer 1 typically less than 15 gm thick is secured thereon by an epoxy adhesive layer 3.
A passivating layer 3 of, for example, zinc sulphide may be provided on the back surface of the cadmium mercury telluride layer 1 before securing it to the substrate 2 by the adhesive layer 3.
However, other forms of the structure of Figure 1 may be used.
Thus, for example the substrate 2 may be of an electrically insulating material other than sapphire, or the bulk of the substrate may be of an electrically active material (for example silicon) having an electrically insulating upper surface with electrical connection areas for connecting the cadmium mercury telluride components to electronic circuitry in the substrate.
Instead of the cadmium mercury telluride layer 1 being attached as a body to the substrate 2 by an adhesive layer 3, the cadmium mercury telluride may be deposited in situ on the substrate 2.
In all these different forms, the substrate 2 is not of cadmium mercury telluride, and the material of the substrate 2 and/or its interface 3 with the cadmium mercury telluride layer 1 is such that, during subsequent heat treatment, it does not act (at least not to any significant extent) as either a source or drain of acceptors and/or donors for the cadmium mercury telluride layer 1, nor otherwise degrade the properties of either the cadmium mercury telluride or the other materials provided for the electronic component.
At least at the stage illustrated in Figure 1, the layer 1 is of n type conductivity. It may have been provided on the substrate 2 as n type material, or a a type layer 1 may have been provided and then converted to n type material, for example by annealing in mercury vapour or by etching with argon ions (for example as described in EP-A-O 062 367). Typically the donor concentration of such an n type layer 1 is in the range of about 1014 to 3 x 1015 cm~3 at 77K for Cd,Hg(l,,#Te material with x of 0.23. Material of this x composition is commonly used to manufacture infrared photosensors for the 8 to 14 pm waveband and operated at a temperature of 77K.The donor concentration results predominantly from native defects in the cadmium mercury telluride crystal Lattice, particularly excess mercury in the form of interstitials.
The n type cadmium mercury telluride layer 1 on the substrate 2 of different material is subjected to a heating treatment in a mercury-deficient ambient to drive mercury out through the surface 4 of the layer 1, until the n type material is converted to p type material throughout its thickness as illustrated in Figure 2. Typically the layer 1 is heated to a temperature below 2500C (degrees Celsius) during the treatment.
The optimum temperature or temperature range depends on the composition of the layer 1 and is higher for higher x values.
The heating treatment is performed at a sufficiently low temperature and for a sufficiently short time that the resulting acceptor concentration of the resulting p type layer 1 decreases with depth in the layer 1 to be less than 1016 cm~3 over a major part of its thickness. Although the heating treatment may be performed in a static inert ambient or, for example, in a vacuum, it is advantageous to effect the heating treatment with the layer 1 located in an inert fluid (for example a flow of nitrogen or other inert gas) to sweep away emissions from the cadmium mercury telluride layer 1 which occur during the conversion to g type material.
Figure 3 presents experimental results showing the resulting a type carrier concentration C(p) in cm~3 versus the inverse of the heating-treatment temperature T in K (degrees Kelvin). The concentrations C(p) are derived from Hall effect measurements at 77K on the resulting p type layers 1 and represent some sort of average value for the whole layer 1 in the measurement.
Connections for these measurements were made to the surface of the layer 1 and the nature of the measurements is such that they are influenced to a large extent by the high acceptor concentration (p+) at the surface 4. The layers 1 were bodies having a thickness of about 10 pm or less with a ZnS-coated back surface secured to a sapphire substrate 2 by an epoxy adhesive layer 3. The Cd,Hg(l,,#Te layers 1 had an x composition of about 0.23. The top surface of the layer 1 was freshly etched before the heating treatment which was carried out with the sample in a flow of nitrogen.
Different representations are used for the data in Figure 3 in accordance with the time for which the heating treatment was effected. An upright cross (+) denotes a 30 minute treatment, and a diagonal cross (x) denotes a 60 minute treatment. It will be noted that from the superimposition of these two crosses in three instances, that substantially the same result was obtained in these three cases. The triangle in Figure 1 denotes a 120 minute treatment, whereas the square denotes a 240 minute treatment. Most of the layers 1 were of originally p type material which was converted to n type by annealing in mercury or by ion etching and then subjected to the heating treatment. However, very similar results were obtained with originally n type material whose n type conductivity is due predominantly to native defects.
As can be seen from Figure 3, the data falls close to a line Ea corresponding to an acceptor activation energy of approximately 1eV. With this composition of Cd,Hg(l,,#Te (x = 0.23), the resulting p type layer 1 behaved overall in Hall measurements as having an effective acceptor concentration of about 3 x 1016 or less for heating treatment temperatures below 200to, and the effective acceptor concentration even fell below 1015 cam~3 for heating treatment temperatures of about 150~C and less.
However, these values are some sort of average over the whole layer under measurement, and further examination revealed that a significant contribution to these values is made by the high acceptor concentration p+ adjacent the surface 4 of the layer.
Figure 4 provides an indication of the depth profile of the resulting acceptor concentration C(p) for one particular sample which was heat treated at 180 C for 60 minutes. Hall measurements were made first with the original thickness (9 Sm) of the resulting a type layer 1, then after thinning the layer 1 to 7.25 gm and finally after thinning the layer 1 to 5.75 pm. This final measurement gave a value of 1.5 x 1015 cm~3 for the acceptor concentration C(p) in the bottom 5.75 Sm of the original layers1.
The C(p) values for the removed surface layers were calculated by subtracting the products of C(p) and thickness for the measurements before and after the removal of the respective surface layer, it being assumed that the value C(p) resulting from the measurement is a mathematical average for its respective thickness of the layer 1 It can be seen from the approximate depth profile (curve A) drawn in Figure 4 that the acceptor concentration at the surface is more than twice the average value (4.5 x 1015; line B) given by the Hall measurement on the original unthinned layer 1, and that the acceptor concentration falls to less than half its high surface value in the top third of the thickness of the layer 1, is less than about 3 x 1015 over the bottom half of the thickness of the layer 1 and is less than 1016 for about nine tenths of the thickness of the layer 1.
The precise mechanism which controls the resulting acceptor concentration and its profile in the p type layer 1 is not fully understood. However, the applicants believe that some understanding may be obtained from which may be termed an "equilibrium" model based on the concept that at a particular temperature there will be a certain concentration of mercury vacancies that is in chemical equilibrium with the surrounding cadmium mercury telluride material. It is reasonable to assume that the equilibrium vacancy concentration associated with the free surface 4 will be higher than that associated with the bulk. In this situation there will be in the layer 1 a steady state flow of mercury vacancies away from the surface 4, consistent with the p+ surface and vacancy concentration gradient depicted through the thickness of the layer in Figure 4.However, it is found that prolonged heating can increase the acceptor concentration and in particular can decrease the carrier lifetime in the low-concentration material, as is described subsequently.
Depending on the type of component being manufactured, the high concentration p+ of the surface part of layer 1 may be acceptable. It may be retained in the manufactured component, or in some instances, for example in infrared photodiodes having a horizontal r n junction, it may be converted into an n type active region for example by doping with mercury. The type-conversion process using ion etching as disclosed in EP-A-O 062 367 may be used to form such a horizontal p-n junction, and in this case the surface part is also partially etched away by the ion beam.
Figure 5 illustrates other types of electronic component in which g-n junctions 31, 32 and 33 are formed across the thickness of the layer 1 so that the components have p type active regions 11 and 12 extending to the top surface of the layer 1. In this case, it may be preferable to remove, after the heating treatment, the top surface part having the high acceptor concentration p+.
Thus, the device structure of Figure 5 may be formed by thinning the layer 1 of Figure 2, for example by chemical etching, so as to remove the p+ surface part and to Leave a g type layer whose acceptor concentration C(p) over its whole thickness is less than 1016 cm~3 or even if desired less than, for example, 5 x 1015 cm~3. Then, with a masking layer on the T and D areas of the layer 1, the non-masked parts of the layer 1 are removed by etching in known manner to pattern the layer 1 into the desired shape for each electronic component. Figure 5 illustrates two mesa shapes T and D formed from the patterned layer 1 on the substrate 2.Parts 21, 22 and 23 of these p type cadmium mercury telluride mesas T and D are converted to n type to form the p-n junctions 31, 32 and 33 with the remaining p type parts of the layer 1 of Figure 2. Electrical connections are made in known manner to the n type and p type active regions by metal-layer electrodes 41 to 44. The component D is a p-n junction diode, and the component T is a bipolar transistor whose active base region 11 may be either electrically floating or electrically connected with a base electrode (not shown). The diode D and the transistor T may be used as an infrared photodiode and an infrared phototransistor respectively, or either the diode D or transistor T may be optically shielded and serve to process signals from the photosensing, second component. However, if desired, an electrical circuit comprising electronic components of cadmium mercury telluride may be fabricated, all of which are optically shielded and not used for photosensing.
By forming p type active regions (for example 11 and 12) of such components with low acceptor concentrations, high quality diodes and transistors can be formed with high carrier lifetime and longer carrier diffusion lengths in the p type region, and high photodiode resistance can be obtained which is desirable for matching with silicon signal-processing circuits (for example charge coupled devices).
As can be seen from Figure 3, increasing the temperature T for the heating treatment tends to increase the acceptor concentration C(p) in the resulting p type layer 1, and it is found that this also reduces the carrier lifetime. The carrier lifetime results were obtained from photoconductive response to a laser pulse. It can also be seen from Figure 3 at 170'C and at 180'C that there was no strong dependance between acceptor concentration C(p) and the duration of the heating treatment in the range 30 to 240 minutes.
Thus, for example when one sample at 170'C was measured after heating for 30 minutes C(p) was 5 x 1015, after 60 minutes C(p) was still about 5 x 1015, after 120 minutes C(p) had fallen slightly to 3 x 1015 and after 240 minutes it had risen to 8 x 1015. Generally it will be acceptable to effect the treatment for a time less than 3 hours, and shorter times, for example preferably at most 1 hour, may be preferred for convenience in the manufacturing process. Furthermore, it has also been found that increasing the duration of the heating treatment tends to reduce the carrier lifetime without necessarily increasing carrier concentration.Thus, for the 170 C sample mentioned above the carrier lifetime at 77'K was about 30nS after a 30 minute treatment, about 17nS after 60 minutes, about 7nS after 120 minutes and less than 5nS after 240 minutes. On this basis a short duration for the heating treatment is to be preferred. Furthermore the carrier lifetime was observed to increase after removal of the high concentration surface part p+ of the layer 1, for example from about 60nS to 100nS after removal of the top 1 pm thick surface part of a layer 1 treated at 160'C for 60 minutes.
For photodiodes fabricated from the low-concentration p type layer 1 after the heating treatment, the photodiode resistance as indicated by the n.RO.AOpt product increased by about 15 times or more is observed. The comparison was made based on a batch of ordinary concentration p-type material, some of which was converted to n type and then heat treated to form the low concentration material, while the remainder was retained as control material.
The photodiodes then were formed with the same processing steps in both the low concentration samples and in the control samples.
Similar results of low acceptor concentration C(p), carrier lifetime etc. are obtained starting in Figure 1 with layers 1 which were originally bulk grown crystal material or epitaxial material.
Figure 6 illustrates a p type epitaxial layer 10 of crystalline cadmium mercury telluride grown on a substrate 20, of for example, cadmium telluride. The layer 30 at the interface of the layer 10 and substrate 20 may be an epitaxial buffer layer, for example also of cadmium telluride. Typically the acceptor concentration of the layer 10 as grown is of the order of 1017 cm~3, regardless of whether it is deposited by vapour phase epitaxy or liquid phase epitaxy. This p type layer 10 is then converted throughout its thickness into the n type layer 1 of Figure 1, for example by annealing in mercury vapour as described by M. Chu in the said Journal Applied Physics article or by etching with an argon ion beam as described in EP-A-O 062 367.The resulting n type layer 1 may then be secured via its free surface to the substrate 3 after which the substrate 20 and buffer layer 30 is etched away to form exposed surface 4 of the layer 1. Alternatively#the substrate 20 on which the layer 10 is grown may be retained to constitute the substrate 2 on which the heating treatment is performed. Having converted the epitaxial layer 10 to the structure of Figure 1 it may then be subjected to the heating treatment as previously described to form the structure of Figure 2 and then further processed to define the specific structure of each electronic component (for example as in Figure 5).
Figure 5 illustrates patterning the p type layer 1 into mesas T and D. However components of quite different shape may be formed from the p type layer 1 of Figure 2. Thus, for example, as described in EP-A-O 061 803 an array of infrared photodiodes may be formed by ion beam etching apertures through the p type layer 1 (preferably after thinning to remove the p+ surface part). The ion etching forms n type annular regions which extend around the side walls of the apertures and which form vertical annular r n junctions with the low-concentration p type active region formed by the heating treatment. Two examples of array geometries which may be formed are illustrated in Figures 1 and 6 of EP-A-O 061 803.
Figures 7 and 8 illustrate a modification to that of Figure 2, but starting again from the Figure 1 structure. The n type layer 1 may again be either epitaxial or bulk crystal material and may have been either p type or n type as originally grown. In this modified method the heating treatment (from Figure 7 to Figure 8) is performed after removing parts of the n type layer 1 of Figure 1 throughout its thickness to pattern the layer 1 into the desired shape for each electronic component. This patterning step may be effected in known manner by selectively etching the layer 1 with an ion beam 50, for example using 500eV argon ions after providing a masking pattern 51, for example of photoresist, on the surface 4.
By way of example Figure 7 illustrates the formation of two mesa shapes T and D on the substrate 2.
The ion beam etching forms an excess of mercury in surface-adjacent side portions 52 of the patterned layer 1 so that after the ion beam etching the whole of the mesas T and D not only retain n type conductivity but the side portions 52 are higher doped (n+) throughout their thickness. Furthermore, it should be noted that the Figure 7 structure may even be formed from a p type layer the ion beam etching producing an excess concentration of mercury diffused sideways through the mesas T and D to form n type material between the n+ side portions 52.
After the patterning step the photoresist masks 51 are removed, and the patterned layer 1 is then subjected to a heating treatment as previously described to convert the mesas T and D to a type conductivity having the low acceptor concentration in the bulk and a higher surface concentration p+ adjacent the top and side faces of the mesas T and D. The resulting structure is illustrated in Figure 8. The patterned layer 1 may then be further processed to complete the formation of the desired electronic components, for example by providing n-type active regions forming n junctions and then metal electrodes. Thus, for example the structure of Figure 8 may be used to provide transistor and diode components as illustrated in, for example, Figure 5.
In the embodiments so far described, the whole of the layer 1 (whether unpatterned as in Figure 1 or patterned as in Figure 7) was of n type conductivity at the start of the heating treatment in accordance with the invention, and the whole of this layer 1 was converted to p type material by the heating treatment. However, the heating treatment may also be used on layers 1 (whether unpatterned or patterned) in which a localized portion may be p type. Such a localized p type portion may even extend across the thickness of the layer, for example as a wholly p type mesa in Figure 7 in addition to the n type mesas T and D.Depending on the extent of such a localised p type portion and its location, it can have substantially no effect (or at least very little effect) on the value of the low acceptor concentration obtained in other portions of the layer 1 by the heating treatment. Furthermore, Figure 9 illustrates a modification in which the layer 1 after the heating treatment is partly p type and partly n type.
In the method of Figure 9, the layer 1 before the heating treatment is wholly n type predominantly due to mercury interstitials. An anodic oxide layer 61 is formed on part of the upper surface 4 of the layer 1, for example by an electrolytic process as described in GB-A-1 600 599. Such an anodic oxide layer 61 contains mercury which can be diffused into the layer 1 on heating. The structure is then subjected to a heating treatment in accordance with the present invention. During this treatment the anodic layer 61 present locally on the surface 4 masks an underlying portion of the n type layer against mercury drive out and supplies mercury thereto so that this underlying portion 62 remains n type after the heating treatment.Thus the n type portion 62 forms a p-n junction 63 with an adjacent part of the p type active region 64 formed by the heating treatment. As described hereinbefore with reference to the other embodiments.
This p type active region 64 has an acceptor concentration of less than 1016 cm~3 over a major part of the thickness of the layer 1.
The structure of Figure 9 is then further processed, for example by patterning the layer 1 and providing metal electrodes, to form the desired electronic component, for example a p-n junction infrared photodiode.
From reading the present disclosure, other modifications will be apparent to persons skilled in the art. Such modifications may involve other features which are already known for cadmium mercury telluride and/or in the manufacture and design and use of electronic components of cadmium mercury telluride or similar materials and which may be used instead of or in addition to features already described herein. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present application also includes any novel feature or any novel combination of features disclosed herein either explicitly or implicitly or any generalisation or modification of one or more of those features which would be obvious to persons skilled in the art, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims (16)

CLAIM(S)
1. A method of manufacturing electronic components of cadmium mercury telluride, comprising the steps of (a) providing a layer of cadmium mercury telluride on a substrate of different material, and (b) removing parts of the layer throughout its thickness by etching with an ion beam to pattern the layer into a desired shape for each component, the ion beam etching forming an excess concentration of mercury in at least a surface-adjacent portion of the patterned layer extending through the thickness of the patterned layer so that at least this surface-adjacent portion has n type conductivity throughout its thickness after the ion beam etching step, characterised by (c) heating the patterned layer in a mercury-deficient ambient after the ion beam etching step to drive out the excess mercury and so to convert said surface-adjacent portion from n type into p type material, the provision of the layer on the substrate of different material being such as to inhibit extraction and introduction of donors and acceptors between the layer and the substrate during the heating treatment.
2. A method of manufacturing an electronic component comprising cadmium mercury telluride, the component having an active region of p type conductivity formed from an n type portion of a layer of cadmium mercury telluride by heating in a mercury-deficient ambient to drive mercury out through the surface of the layer until said n type portion is converted into a type material throughout its thickness, characterised in that the layer of cadmium mercury telluride is provided on a substrate of different material so as to inhibit extraction and introduction of donors and acceptors between the layer and the substrate during the heating treatment, in that the n type portion extends through the thickness of the cadmium mercury telluride, and in that the heating treatment is performed at a sufficiently low temperature and for a sufficiently short time that the resulting acceptor concentration of the p type portion decreases with depth in the layer to be less than 1016 cm~3 over a major part of the thickness of the layer.
3 A method as claimed in claim 2, further characterised in that after the heating treatment a surface part of the p type portion having an acceptor concentration in excess of 1016 cam~3 is removed.
4. A method as claimed in claim 2 or claim 3, further characterised in that after the heating treatment the whole of the cadmium mercury telluride layer is of g type conductivity.
5. A method as claimed in claim 2 or claim 3, further characterised in that during the heating treatment a masking layer containing mercury is present locally on the surface of the cadmium mercury telluride layer and masks an underlying n type portion of the layer against the mercury drive out, which underlying portion remains n type after the heating treatment and forms a p-n junction with an adjacent part of the p type active region having an acceptor concentration of less than 1016 cm~3 over a major part of its thickness.
6. A method as claimed in anyone of claims 2 to 5, further characterised in that after the heating treatment a part of the cadmium mercury telluride layer is converted to n type to form a E n junction with an adjacent part of the type active region.
7. A method as claimed in anyone of claims 2 to 6, further characterised in that the heating treatment is effected after removing parts of the cadmium mercury telluride layer to pattern the layer into a desired shape for the electronic component.
8. A method as claimed in claim 7,further characterised in that the patterning step is effected by selectively etching the layer with an ion beam, in that the ion beam etching forms an excess concentration of mercury at least in the portion of the layer adjacent the etched surface, and in that the heating treatment serves to drive away this excess mercury.
9. A method as claimed in anyone of the preceding claims, further characterised in that the heating trek anent comprises heating the layer to a temperature below 200 C (degrees Celsius) and for a time less than 3 hours, or preferably at most 1 hour.
10. A method as claimed in claim 9, further characterised in that during the heating treatment the temperature of the layer is maintained in the range of 120 to 200'C (degrees Celsius).
11. A method as claimed in anyone of the preceding claims, further characterised in that during the heating treatment the layer is Located in a flow of inert gas to sweep away emissions from the cadmium mercury telluride layer which occur during the conversion to p type material.
12. A method as claimed in anyone of the preceding claims, further characterised in that the thickness of the layer is less than 15ym, or preferably even less than 10cm.
13. A method as claimed in anyone of the preceding claims, further characterised in that the layer is a thin body of cadmium mercury telluride attached to the substrate by means of an intermediate adhesive layer.
14. A method as claimed in anyone of claims 1 to 12, further characterised in that the layer is formed on the substrate by epitaxial growth of cadmium mercury telluride material.
15. An electronic component having an active region of etype conductivity, the active region being a portion of a layer of cadmium mercury telluride on a substrate of different material, which p type active region extends to the interface of the layer with the substrate, characterised in that the p type conductivity of the active region is determined at least principally by mercury vacancies the concentration of which decreases with depth in the layer so as to be less than 1016 cam~3 over a major part of the thickness of the layer.
16. An electronic component comprising cadmium mercury telluride, and manufactured by a method claimed in any one of the preceding claims.
16. A method as claimed in anyone of claims 1 to 14 or an electronic component as claimed in claim 15, further characterised in that the component is an infrared sensing element.
17. A method as claimed in anyone of cLaims 1 to 14 or 16 or an electronic component as claimed in claim 15 or claim 16, further characterised in that the component is a bipolar transistor having the p type active region as a transistor base region.
18. A method of manufacturing an electronic component comprising cadmium mercury telluride, substantially as described with reference to Figures 1 and 2, or anyone of Figures 3 to 6, or Figures 7 and 8, or Figure 9 of the accompanying drawings.
19. An electronic component comprising cadmium mercury telluride, and manufactured by a method claimed in anyone of claims 1 to 14 or of claims 16 to 18.
Amendments to the claims have been filed as follows 5
1. A method of manufacturing electronic components of cadmium mercury telluride, comprising the steps of (a) providing a layer of cadmium mercury telluride on a substrate of different material, and (b) removing parts of the layer throughout its thickness by etching with an ion beam to pattern the layer into a desired shape for each component, the ion beam etching forming an excess concentration of mercury in at least a surface-adjacent portion of the patterned layer extending through the thickness of the patterned layer so that at least this surface-adjacent portion has n type conductivity throughout its thickness after the ion beam etching step, characterised by (c) heating the patterned layer in a mercury-deficient ambient after the ion beam etching step to drive out the excess mercury and so to convert said surface-adjacent portion from n type into E type material, the provision of the layer on the substrate of different material being such as to inhibit extraction and introduction of donors and acceptors between the layer and the substrate during the heating treatment.
2. A method as claimed in Claim 1, further characterised in that the heating treatment comprises heating the layer to a temperature below 2000C (degrees Celsius) and for a time less than 3 hours, or preferably at most 1 hour.
3. A method as claimed in Claim 2, further characterised in that during the heating treatment the temperature of the layer is maintained in the range of 120 to 2000C (degrees Celsius).
4. A method as claimed in any one of the preceding claims, further characterised in that during the heating treatment the layer is located in a flow of inert gas to sweep away emissions from the cadmium mercury telluride layer which occur during the conversion to 2 type material.
5. A method as claimed in any one of the preceding claims, further characterised in that after the heating treatment the whole of the cadmium mercury telluride layer is of p type conductivity.
6. A method as claimed in any one of the preceding claims, further characterised in that the heating treatment is performed at a sufficiently low temperature and for a sufficiently short time that the resulting acceptor concentration of the 2 type portion decreases with depth from the surface to less than 1016cm~3.
7. A method as claimed in Claim 6, further characterised in that after the heating treatment a surface part of the 2 type portion having an acceptor concentration in excess of 1016cam~3 is removed.
8. A method as claimed in any one of the preceding claims, further characterised in that after the heating treatment a part of the cadmium mercury telluride layer is converted to n type to form a #-n junction with an adjacent part of the E type active region.
9. A method as claimed in any one of the preceding claims, further characterised in that the thickness of the layer is less than 15cm, or preferably even less than loom.
10. A method as claimed in any one of the preceding claims, further characterised in that the layer is a thin body of cadmium mercury telluride attached to the substrate by means of an intermediate adhesive layer.
11. A method as claimed in any one of Claims 1 to 9, further characterised in that the layer is formed on the substrate by epitaxial growth of cadmium mercury telluride material.
12. A method as claimed in any one of the preceding claims, further characterised in that the layer is patterned in step (b) into separate mesas on the substrate.
13. A method as claimed in any one of the preceding claims, further characterised in that the component is an infrared sensing element.
14. A method as claimed in any one of the preceding claims, further characterised in that the component is a bipolar transistor having a p type transistor base region.
15. A method of manufacturing an electronic component comprising cadmium mercury telluride, substantially as described with reference to Figures 7 and 8 of the accompanying drawings.
GB9018970A 1987-03-18 1990-08-31 Manufacture of electronic components of cadmium mercury telluride Expired - Lifetime GB2234854B (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0413159A2 (en) * 1989-07-19 1991-02-20 Fujitsu Limited Process for growing compound semiconductor layers and detector using such layers
US5647954A (en) * 1992-02-26 1997-07-15 Gec Marconi Limited Manufacture of etched substrates such as infrared detectors

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01239089A (en) * 1987-11-30 1989-09-25 Toshiba Corp Process for production of compound semiconductor single crystal and apparatus therefor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0413159A2 (en) * 1989-07-19 1991-02-20 Fujitsu Limited Process for growing compound semiconductor layers and detector using such layers
US5647954A (en) * 1992-02-26 1997-07-15 Gec Marconi Limited Manufacture of etched substrates such as infrared detectors

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GB2212976A (en) 1989-08-02

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